c16.tan.qmsg

基于QU II开发的8051处理器,有基本的操作指令.

{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "31 " "Warning: Found 31 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "uIR:inst6\|74273:inst1\|14 " "Info: Detected ripple clock \"uIR:inst6\|74273:inst1\|14\" as buffer" {  } { { "74273.bdf" "" { Schematic "e:/altera/quartus50/libraries/others/maxplus2/74273.bdf" { { 648 320 384 728 "14" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "uIR:inst6\|74273:inst1\|14" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "timer:inst\|74273:125\|14 " "Info: Detected ripple clock \"timer:inst\|74273:125\|14\" as buffer" {  } { { "74273.bdf" "" { Schematic "e:/altera/quartus50/libraries/others/maxplus2/74273.bdf" { { 648 320 384 728 "14" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "timer:inst\|74273:125\|14" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "controller:inst11\|inst11 " "Info: Detected gated clock \"controller:inst11\|inst11\" as buffer" {  } { { "controller.bdf" "" { Schematic "E:/c16final/controller.bdf" { { 352 336 400 400 "inst11" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "controller:inst11\|inst11" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "uIR:inst6\|74273:inst1\|17 " "Info: Detected ripple clock \"uIR:inst6\|74273:inst1\|17\" as buffer" {  } { { "74273.bdf" "" { Schematic "e:/altera/quartus50/libraries/others/maxplus2/74273.bdf" { { 288 320 384 368 "17" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "uIR:inst6\|74273:inst1\|17" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "uIR:inst6\|74273:inst3\|19 " "Info: Detected ripple clock \"uIR:inst6\|74273:inst3\|19\" as buffer" {  } { { "74273.bdf" "" { Schematic "e:/altera/quartus50/libraries/others/maxplus2/74273.bdf" { { 48 320 384 128 "19" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "uIR:inst6\|74273:inst3\|19" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "controller:inst11\|inst10 " "Info: Detected gated clock \"controller:inst11\|inst10\" as buffer" {  } { { "controller.bdf" "" { Schematic "E:/c16final/controller.bdf" { { 192 936 1000 240 "inst10" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "controller:inst11\|inst10" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "uIR:inst6\|74273:inst1\|19 " "Info: Detected ripple clock \"uIR:inst6\|74273:inst1\|19\" as buffer" {  } { { "74273.bdf" "" { Schematic "e:/altera/quartus50/libraries/others/maxplus2/74273.bdf" { { 48 320 384 128 "19" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "uIR:inst6\|74273:inst1\|19" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "controller:inst11\|inst18 " "Info: Detected gated clock \"controller:inst11\|inst18\" as buffer" {  } { { "controller.bdf" "" { Schematic "E:/c16final/controller.bdf" { { 40 552 616 88 "inst18" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "controller:inst11\|inst18" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "uIR:inst6\|74273:inst1\|12 " "Info: Detected ripple clock \"uIR:inst6\|74273:inst1\|12\" as buffer" {  } { { "74273.bdf" "" { Schematic "e:/altera/quartus50/libraries/others/maxplus2/74273.bdf" { { 888 320 384 968 "12" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "uIR:inst6\|74273:inst1\|12" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "uIR:inst6\|74273:inst1\|13 " "Info: Detected ripple clock \"uIR:inst6\|74273:inst1\|13\" as buffer" {  } { { "74273.bdf" "" { Schematic "e:/altera/quartus50/libraries/others/maxplus2/74273.bdf" { { 768 320 384 848 "13" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "uIR:inst6\|74273:inst1\|13" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "uIR:inst6\|74273:inst\|12 " "Info: Detected ripple clock \"uIR:inst6\|74273:inst\|12\" as buffer" {  } { { "74273.bdf" "" { Schematic "e:/altera/quartus50/libraries/others/maxplus2/74273.bdf" { { 888 320 384 968 "12" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "uIR:inst6\|74273:inst\|12" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "timer:inst\|74273:125\|19 " "Info: Detected ripple clock \"timer:inst\|74273:125\|19\" as buffer" {  } { { "74273.bdf" "" { Schematic "e:/altera/quartus50/libraries/others/maxplus2/74273.bdf" { { 48 320 384 128 "19" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "timer:inst\|74273:125\|19" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "controller:inst11\|inst7 " "Info: Detected gated clock \"controller:inst11\|inst7\" as buffer" {  } { { "controller.bdf" "" { Schematic "E:/c16final/controller.bdf" { { 288 936 1000 336 "inst7" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "controller:inst11\|inst7" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "uIR:inst6\|74273:inst\|14 " "Info: Detected ripple clock \"uIR:inst6\|74273:inst\|14\" as buffer" {  } { { "74273.bdf" "" { Schematic "e:/altera/quartus50/libraries/others/maxplus2/74273.bdf" { { 648 320 384 728 "14" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "uIR:inst6\|74273:inst\|14" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "uIR:inst6\|74273:inst3\|17 " "Info: Detected ripple clock \"uIR:inst6\|74273:inst3\|17\" as buffer" {  } { { "74273.bdf" "" { Schematic "e:/altera/quartus50/libraries/others/maxplus2/74273.bdf" { { 288 320 384 368 "17" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "uIR:inst6\|74273:inst3\|17" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "controller:inst11\|inst13 " "Info: Detected gated clock \"controller:inst11\|inst13\" as buffer" {  } { { "controller.bdf" "" { Schematic "E:/c16final/controller.bdf" { { -216 832 896 -168 "inst13" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "controller:inst11\|inst13" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "controller:inst11\|inst14 " "Info: Detected gated clock \"controller:inst11\|inst14\" as buffer" {  } { { "controller.bdf" "" { Schematic "E:/c16final/controller.bdf" { { -168 832 896 -120 "inst14" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "controller:inst11\|inst14" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "controller:inst11\|inst6~14 " "Info: Detected gated clock \"controller:inst11\|inst6~14\" as buffer" {  } { { "controller.bdf" "" { Schematic "E:/c16final/controller.bdf" { { 336 936 1000 384 "inst6" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "controller:inst11\|inst6~14" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "controller:inst11\|inst8 " "Info: Detected gated clock \"controller:inst11\|inst8\" as buffer" {  } { { "controller.bdf" "" { Schematic "E:/c16final/controller.bdf" { { 416 936 1000 464 "inst8" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "controller:inst11\|inst8" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "controller:inst11\|inst17 " "Info: Detected gated clock \"controller:inst11\|inst17\" as buffer" {  } { { "controller.bdf" "" { Schematic "E:/c16final/controller.bdf" { { -24 552 616 24 "inst17" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "controller:inst11\|inst17" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "timer:inst\|74273:125\|13 " "Info: Detected ripple clock \"timer:inst\|74273:125\|13\" as buffer" {  } { { "74273.bdf" "" { Schematic "e:/altera/quartus50/libraries/others/maxplus2/74273.bdf" { { 768 320 384 848 "13" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "timer:inst\|74273:125\|13" } } } }  } 0} { "Info" "ITAN_GATED_CLK" "controller:inst11\|inst21 " "Info: Detected gated clock \"controller:inst11\|inst21\" as buffer" {  } { { "controller.bdf" "" { Schematic "E:/c16final/controller.bdf" { { -352 240 304 -304 "inst21" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "controller:inst11\|inst21" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "uIR:inst6\|74273:inst2\|13 " "Info: Detected ripple clock \"uIR:inst6\|74273:inst2\|13\" as buffer" {  } { { "74273.bdf" "" { Schematic "e:/altera/quartus50/libraries/others/maxplus2/74273.bdf" { { 768 320 384 848 "13" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "uIR:inst6\|74273:inst2\|13" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "uIR:inst6\|74273:inst4\|15 " "Info: Detected ripple clock \"uIR:inst6\|74273:inst4\|15\" as buffer" {  } { { "74273.bdf" "" { Schematic "e:/altera/quartus50/libraries/others/maxplus2/74273.bdf" { { 528 320 384 608 "15" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "uIR:inst6\|74273:inst4\|15" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "timer:inst\|74273:125\|16 " "Info: Detected ripple clock \"timer:inst\|74273:125\|16\" as buffer" {  } { { "74273.bdf" "" { Schematic "e:/altera/quartus50/libraries/others/maxplus2/74273.bdf" { { 408 320 384 488 "16" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0