c16.map.qmsg

基于QU II开发的8051处理器,有基本的操作指令.

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "7408 reg2:inst8\|7408:inst8 " "Info: Elaborating entity \"7408\" for hierarchy \"reg2:inst8\|7408:inst8\"" {  } { { "reg2.bdf" "inst8" { Schematic "E:/c16final/reg2.bdf" { { -208 360 424 -168 "inst8" "" } } } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mem mem:inst3 " "Info: Elaborating entity \"mem\" for hierarchy \"mem:inst3\"" {  } { { "c16.bdf" "inst3" { Schematic "E:/c16final/c16.bdf" { { 424 1368 1504 968 "inst3" "" } } } }  } 0}
{ "Warning" "WGDFX_UNRESOLVED_PARAMETER" "LPM_FILE ram.mif " "Warning: Can't find a definition for parameter LPM_FILE -- assuming ram.mif was intended to be a quoted string" {  } { { "mem.bdf" "" { Schematic "E:/c16final/mem.bdf" { { 184 528 648 296 "inst3" "" } } } }  } 0}
{ "Warning" "WGDFX_INCONSISTENT_BASE_NAME" "" "Warning: Found multiple base names" {  } { { "mem.bdf" "" { Schematic "E:/c16final/mem.bdf" { { 376 264 432 392 "D15" "" } { 360 264 432 376 "D14" "" } { 344 264 432 360 "D13" "" } { 328 264 432 344 "D12" "" } { 312 264 432 328 "D11" "" } { 296 264 432 312 "D10" "" } { 280 264 432 296 "D9" "" } { 264 264 432 280 "D8" "" } { 376 80 248 392 "D7" "" } { 360 80 248 376 "D6" "" } { 344 80 248 360 "D5" "" } { 328 80 248 344 "D4" "" } { 312 80 248 328 "D3" "" } { 296 80 248 312 "D2" "" } { 280 80 248 296 "D1" "" } { 264 80 248 280 "D0" "" } { 192 448 528 208 "D\[15..0\]" "" } } } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../altera/quartus50/libraries/megafunctions/LPM_RAM_DQ.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../altera/quartus50/libraries/megafunctions/LPM_RAM_DQ.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_ram_dq " "Info: Found entity 1: lpm_ram_dq" {  } { { "LPM_RAM_DQ.tdf" "" { Text "e:/altera/quartus50/libraries/megafunctions/LPM_RAM_DQ.tdf" 57 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "LPM_RAM_DQ mem:inst3\|LPM_RAM_DQ:inst3 " "Info: Elaborating entity \"LPM_RAM_DQ\" for hierarchy \"mem:inst3\|LPM_RAM_DQ:inst3\"" {  } { { "mem.bdf" "inst3" { Schematic "E:/c16final/mem.bdf" { { 184 528 648 296 "inst3" "" } } } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../altera/quartus50/libraries/megafunctions/altram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../altera/quartus50/libraries/megafunctions/altram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altram " "Info: Found entity 1: altram" {  } { { "altram.tdf" "" { Text "e:/altera/quartus50/libraries/megafunctions/altram.tdf" 88 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altram mem:inst3\|LPM_RAM_DQ:inst3\|altram:sram " "Info: Elaborating entity \"altram\" for hierarchy \"mem:inst3\|LPM_RAM_DQ:inst3\|altram:sram\"" {  } { { "LPM_RAM_DQ.tdf" "sram" { Text "e:/altera/quartus50/libraries/megafunctions/LPM_RAM_DQ.tdf" 98 6 0 } }  } 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "mem:inst3\|LPM_RAM_DQ:inst3\|altram:sram mem:inst3\|LPM_RAM_DQ:inst3 " "Info: Issued messages during elaboration of megafunction \"mem:inst3\|LPM_RAM_DQ:inst3\|altram:sram\", which is child of megafunction \"mem:inst3\|LPM_RAM_DQ:inst3\"" {  } { { "LPM_RAM_DQ.tdf" "" { Text "e:/altera/quartus50/libraries/megafunctions/LPM_RAM_DQ.tdf" 98 6 0 } } { "mem.bdf" "" { Schematic "E:/c16final/mem.bdf" { { 184 528 648 296 "inst3" "" } } } }  } 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "mem:inst3\|LPM_RAM_DQ:inst3 " "Info: Instantiated megafunction \"mem:inst3\|LPM_RAM_DQ:inst3\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_ADDRESS_CONTROL REGISTERED " "Info: Parameter \"LPM_ADDRESS_CONTROL\" = \"REGISTERED\"" {  } {  } 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_FILE ram.mif " "Info: Parameter \"LPM_FILE\" = \"ram.mif\"" {  } {  } 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_INDATA REGISTERED " "Info: Parameter \"LPM_INDATA\" = \"REGISTERED\"" {  } {  } 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_OUTDATA REGISTERED " "Info: Parameter \"LPM_OUTDATA\" = \"REGISTERED\"" {  } {  } 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 16 " "Info: Parameter \"LPM_WIDTH\" = \"16\"" {  } {  } 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHAD 8 " "Info: Parameter \"LPM_WIDTHAD\" = \"8\"" {  } {  } 0}  } { { "mem.bdf" "" { Schematic "E:/c16final/mem.bdf" { { 184 528 648 296 "inst3" "" } } } }  } 0}
{ "Warning" "WTDFX_ASSERTION" "altram does not support Cyclone II device family -- attempting best-case memory conversions, but power-up states and read during write behavior will be different for Cyclone II devices " "Warning: Assertion warning: altram does not support Cyclone II device family -- attempting best-case memory conversions, but power-up states and read during write behavior will be different for Cyclone II devices" {  } { { "altram.tdf" "" { Text "e:/altera/quartus50/libraries/megafunctions/altram.tdf" 226 2 0 } } { "LPM_RAM_DQ.tdf" "" { Text "e:/altera/quartus50/libraries/megafunctions/LPM_RAM_DQ.tdf" 98 6 0 } } { "mem.bdf" "" { Schematic "E:/c16final/mem.bdf" { { 184 528 648 296 "inst3" "" } } } } { "c16.bdf" "" { Schematic "E:/c16final/c16.bdf" { { 424 1368 1504 968 "inst3" "" } } } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../altera/quartus50/libraries/megafunctions/altsyncram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../altera/quartus50/libraries/megafunctions/altsyncram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram " "Info: Found entity 1: altsyncram" {  } { { "altsyncram.tdf" "" { Text "e:/altera/quartus50/libraries/megafunctions/altsyncram.tdf" 425 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram mem:inst3\|LPM_RAM_DQ:inst3\|altram:sram\|altsyncram:ram_block " "Info: Elaborating entity \"altsyncram\" for hierarchy \"mem:inst3\|LPM_RAM_DQ:inst3\|altram:sram\|altsyncram:ram_block\"" {  } { { "altram.tdf" "ram_block" { Text "e:/altera/quartus50/libraries/megafunctions/altram.tdf" 102 5 0 } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_2601.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_2601.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_2601 " "Info: Found entity 1: altsyncram_2601" {  } { { "db/altsyncram_2601.tdf" "" { Text "E:/c16final/db/altsyncram_2601.tdf" 34 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_2601 mem:inst3\|LPM_RAM_DQ:inst3\|altram:sram\|altsyncram:ram_block\|altsyncram_2601:auto_generated " "Info: Elaborating entity \"altsyncram_2601\" for hierarchy \"mem:inst3\|LPM_RAM_DQ:inst3\|altram:sram\|altsyncram:ram_block\|altsyncram_2601:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "e:/altera/quartus50/libraries/megafunctions/altsyncram.tdf" 903 3 0 } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "1612 1612:inst5 " "Info: Elaborating entity \"1612\" for hierarchy \"1612:inst5\"" {  } { { "c16.bdf" "inst5" { Schematic "E:/c16final/c16.bdf" { { 1144 1368 1480 1368 "inst5" "" } } } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../altera/quartus50/libraries/others/maxplus2/74161.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../altera/quartus50/libraries/others/maxplus2/74161.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 74161 " "Info: Found entity 1: 74161" {  } { { "74161.tdf" "" { Text "e:/altera/quartus50/libraries/others/maxplus2/74161.tdf" 13 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "74161 1612:inst5\|74161:1 " "Info: Elaborating entity \"74161\" for hierarchy \"1612:inst5\|74161:1\"" {  } { { "1612.bdf" "1" { Schematic "E:/c16final/1612.bdf" { { 232 320 440 416 "1" "" } } } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../altera/quartus50/libraries/others/maxplus2/f74161.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../altera/quartus50/libraries/others/maxplus2/f74161.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 f74161 " "Info: Found entity 1: f74161" {  } { { "f74161.bdf" "" { Schematic "e:/altera/quartus50/libraries/others/maxplus2/f74161.bdf" { } } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "f74161 1612:inst5\|74161:1\|f74161:sub " "Info: Elaborating entity \"f74161\" for hierarchy \"1612:inst5\|74161:1\|f74161:sub\"" {  } { { "74161.tdf" "sub" { Text "e:/altera/quartus50/libraries/others/maxplus2/74161.tdf" 33 3 0 } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "74161 1612:inst5\|74161:2 " "Info: Elaborating entity \"74161\" for hierarchy \"1612:inst5\|74161:2\"" {  } { { "1612.bdf" "2" { Schematic "E:/c16final/1612.bdf" { { 480 320 440 664 "2" "" } } } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "iopr iopr:inst10 " "Info: Elaborating entity \"iopr\" for hierarchy \"iopr:inst10\"" {  } { { "c16.bdf" "inst10" { Schematic "E:/c16final/c16.bdf" { { 80 1784 1896 304 "inst10" "" } } } }  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PORT" "1A4 74244 inst12 " "Warning: Port \"1A4\" of type 74244 and instance \"inst12\" is missing source signal" {  } { { "iopr.bdf" "" { Schematic "E:/c16final/iopr.bdf" { { 248 512 616 440 "inst12" "" } } } }  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PORT" "1A3 74244 inst12 " "Warning: Port \"1A3\" of type 74244 and instance \"inst12\" is missing source signal" {  } { { "iopr.bdf" "" { Schematic "E:/c16final/iopr.bdf" { { 248 512 616 440 "inst12" "" } } } }  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PORT" "2A3 74244 inst12 " "Warning: Port \"2A3\" of type 74244 and instance \"inst12\" is missing source signal" {  } { { "iopr.bdf" "" { Schematic "E:/c16final/iopr.bdf" { { 248 512 616 440 "inst12" "" } } } }  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PORT" "2GN 74244 inst12 " "Warning: Port \"2GN\" of type 74244 and instance \"inst12\" is missing source signal" {  } { { "iopr.bdf" "" { Schematic "E:/c16final/iopr.bdf" { { 248 512 616 440 "inst12" "" } } } }  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PORT" "2A1 74244 inst12 " "Warning: Port \"2A1\" of type 74244 and instance \"inst12\" is missing source signal" {  } { { "iopr.bdf" "" { Schematic "E:/c16final/iopr.bdf" { { 248 512 616 440 "inst12" "" } } } }  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PORT" "2A4 74244 inst12 " "Warning: Port \"2A4\" of type 74244 and instance \"inst12\" is missing source signal" {  } { { "iopr.bdf" "" { Schematic "E:/c16final/iopr.bdf" { { 248 512 616 440 "inst12" "" } } } }  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PORT" "2A2 74244 inst12 " "Warning: Port \"2A2\" of type 74244 and instance \"inst12\" is missing source signal" {  } { { "iopr.bdf" "" { Schematic "E:/c16final/iopr.bdf" { { 248 512 616 440 "inst12" "" } } } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ir ir:inst2 " "Info: Elaborating entity \"ir\" for hierarchy \"ir:inst2\"" {  } { { "c16.bdf" "inst2" { Schematic "E:/c16final/c16.bdf" { { 184 1280 1456 280 "inst2" "" } } } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "timer timer:inst " "Info: Elaborating entity \"timer\" for hierarchy \"timer:inst\"" {  } { { "c16.bdf" "inst" { Schematic "E:/c16final/c16.bdf" { { 344 16 112 536 "inst" "" } } } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "uIR uIR:inst6 " "Info: Elaborating entity \"uIR\" for hierarchy \"uIR:inst6\"" {  } { { "c16.bdf" "inst6" { Schematic "E:/c16final/c16.bdf" { { 96 240 392 192 "inst6" "" } } } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "urom urom:inst9 " "Info: Elaborating entity \"urom\" for hierarchy \"urom:inst9\"" {  } { { "c16.bdf" "inst9" { Schematic "E:/c16final/c16.bdf" { { 96 -8 168 192 "inst9" "" } } } }  } 0}
{ "Warning" "WGDFX_UNRESOLVED_PARAMETER" "LPM_FILE rom.mif " "Warning: Can't find a definition for parameter LPM_FILE -- assuming rom.mif was intended to be a quoted string" {  } { { "urom.bdf" "" { Schematic "E:/c16final/urom.bdf" { { 136 320 432 232 "inst" "" } } } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../altera/quartus50/libraries/megafunctions/LPM_ROM.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../altera/quartus50/libraries/megafunctions/LPM_ROM.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_rom " "Info: Found entity 1: lpm_rom" {  } { { "LPM_ROM.tdf" "" { Text "e:/altera/quartus50/libraries/megafunctions/LPM_ROM.tdf" 40 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "LPM_ROM urom:inst9\|LPM_ROM:inst " "Info: Elaborating entity \"LPM_ROM\" for hierarchy \"urom:inst9\|LPM_ROM:inst\"" {  } { { "urom.bdf" "inst" { Schematic "E:/c16final/urom.bdf" { { 136 320 432 232 "inst" "" } } } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../altera/quartus50/libraries/megafunctions/altrom.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../altera/quartus50/libraries/megafunctions/altrom.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altrom " "Info: Found entity 1: altrom" {  } { { "altrom.tdf" "" { Text "e:/altera/quartus50/libraries/megafunctions/altrom.tdf" 75 1 0 } }  } 0}  } {  } 0}