mpa_mem.h

三星ic 9980的源代码. 718版.

/*
 *  mpa_mem.h
 *
 *  MPEG/audio multichannel decoder.
 *	Copyright (C) 2003 Optical Player P/J, Samsung Electronics.
 *
 */
.list off

.ifndef _MPA_MEM_H_
.defvar	_MPA_MEM_H_


/* addressing index value */
TYPE_INT				equ 	2
TYPE_LONG				equ 	4


/* Stack pointer */

/* STACK_POINTER			equ		0x010000 */	//moved to pre-defined symbol


/* Program memory area */

PM_CODE_START			equ		0x007000
PM_DATA_START			equ		PM_CODE_START
PM_SIZE					equ		0x020000	// ROM size = 128 KB
PM_LIMIT				equ		0x400000	// MAX 4 MB


/* Data memory area */

DM_DATA_START			equ		0x000000
DM_SIZE					equ		0x020000	// RAM size = 128 KB
DM_LIMIT				equ		0x400000	// MAX 4 MB


/* X memory area */

INT_XM_SIZE				equ		0x10000
INT_XM_BASE				equ		0x200000
INT_XM_BASE_MAC			equ		0x0
INT_XM_LIMIT			equ		INT_XM_BASE+INT_XM_SIZE
INT_XMX_BASE			equ		0x210000
INT_XMX_LIMIT			equ		INT_XMX_BASE+INT_XM_SIZE


/* Y memory area */

INT_YM_SIZE				equ		0x10000
INT_YM_BASE				equ		0x220000
INT_YM_BASE_MAC			equ		0x8000
INT_YM_LIMIT			equ		INT_YM_BASE+INT_YM_SIZE
INT_YMX_BASE			equ		0x230000
INT_YMX_LIMIT			equ		INT_YMX_BASE+INT_YM_SIZE


/* Sequential buffer SB0/1 memory area */

SB0_BASE				equ		0x240000
SB0_SIZE				equ		0x40000
SB0_LIMIT				equ		0x280000
SB1_BASE				equ		0x280000
SB1_SIZE				equ		0x40000
SB1_LIMIT				equ		0x2c0000


/* In short direct addressing mode, availible block size */
sDIRECT_ADDR_BLOCKS		equ		0x20		// 32 words, RPD0.offset


/* In short direct associated addressing mode, 
 * availible block size 
 */
sDIRECT_ASSO_BLOCKS		equ		0x10		// 16 words, RPD1.offset

PAGE_SIZE				equ		0x40




/* SDRAM memory map from host */
ADM_BASE				equ		0x00200000
SDRAM_IBASE				equ		ADM_BASE+0x0
SDRAM_DBASE				equ		ADM_BASE+0x00010000
SDRAM_XBASE				equ		ADM_BASE+0x00020000
SDRAM_YBASE				equ		ADM_BASE+0x00038000
SDRAM_S0BASE			equ		ADM_BASE+0x00050000
SDRAM_S1BASE			equ		ADM_BASE+0x00060000


/* X, Y memory mapping */
.if( _DECODER_TYPE == MPEG_1_AUDIO )
xmem_SYNTH_BUF			equ		0x0000		// 0x800
xmem_FRACTION			equ		0x0800		// 0x900
xmem_DCT32_BUF			equ		0x1100		// 0x20
.else
xmem_FRACTION			equ		0x0000		// 001F80H(0008064)LW
xmem_DCT32_BUF			equ		0x1FC0		// 000020H(0000032)LW
xmem_SYNTH_BUF			equ		0x2000		// 001C00H(0007168)LW
xmem_LFE_FILTER			equ		0x3C00		// 000020H(0000032)LW
.endif

.if( _DECODER_TYPE == MPEG_1_AUDIO )
ymem_WINDOW_TBL			equ		0x8000		// 000200H(0000512)LW 
ymem_DCT32_TBL			equ		0x8200		// 000180H(0000384)LW
ymem_MPEG_INFO			equ		0x8380		// 000040H(0000064)LW
ymem_BACKUP_REG			equ		0x83C0		// 000020H(0000032)LW
ymem_BITSTREAM			equ		0x83E0		// 000010H(0000016)LW 
ymem_BUFFERPTR			equ		0x83F0		// 000010H(0000016)LW 
ymem_TABLES				equ		0x8400		// 0004A4H(0001188)LW 
ymem_SEPCODE_TBL		equ		0x88B0		// 000254H(0000596)LW 
ymem_DECODE_BUF			equ		0x89B0		// 000428H(0001064)LW
ymem_PCM_BUF			equ		0x89B0		// 000900H(0002304)LW, overlay
.else
ymem_WINDOW_TBL			equ		0x8000		// 000200H(0000512)LW 
ymem_DCT32_TBL			equ		0x8200		// 000180H(0000384)LW
ymem_TABLES				equ		0x8400		// 0004A4H(0001188)LW 
ymem_SEPCODE_TBL		equ		0x8A00		// 000254H(0000596)LW 
ymem_DRC_TBL			equ		0x8C60		// 0000F8H(0000248)LW 
ymem_LFE_TBL			equ		0x8D60		// 000090H(0000144)LW 
ymem_MPEG_INFO			equ		0x8E00		// 000040H(0000064)LW
ymem_BACKUP_REG			equ		0x8EC0		// 000020H(0000032)LW
ymem_BITSTREAM			equ		0x8EE0		// 000010H(0000016)LW 
ymem_BUFFERPTR			equ		0x8EF0		// 000010H(0000016)LW 
ymem_DECODE_BUF			equ		0x9000		// 000428H(0001064)LW
ymem_PCM_BUF			equ		0x9000		// 002D00H(0011520)LW, overlay
.endif


MAX_BS_SIZE				equ		0x0800

.if( 0 )
s0mem_MPG_BUF			equ		0x00000
s0mem_MPG_BUF_LIMIT		equ		s0mem_MPG_BUF + INPUT_BUF_SIZE
s0mem_EXT_BUF			equ		s0mem_MPG_BUF_LIMIT
s0mem_EXT_BUF_LIMIT		equ		s0mem_EXT_BUF + INPUT_BUF_SIZE
s0mem_BS_MPG			equ		s0mem_EXT_BUF_LIMIT
s0mem_BS_EXT			equ		s0mem_BS_MPG + MAX_BS_SIZE
s0mem_BS_MC				equ		s0mem_BS_EXT + MAX_BS_SIZE
s0mem_BS_SPDIF0			equ		s0mem_BS_MC  + MAX_BS_SIZE*2
s0mem_BS_SPDIF1			equ		s0mem_BS_SPDIF0 + 0x1000
s0mem_LIMIT				equ		s0mem_BS_SPDIF1 + 0x1000
.else
MPG_BUF_BASE			equ		SB0_BASE
.if( 0 )
MPG_BUF_LIMIT			equ		MPG_BUF_BASE+INPUT_CHUNK_SIZE
EXT_BUF_BASE			equ		MPG_BUF_LIMIT
EXT_BUF_LIMIT			equ		EXT_BUF_BASE+INPUT_CHUNK_SIZE
BS_MAIN					equ		EXT_BUF_LIMIT
BS_EXTENSION			equ		BS_MAIN+MAX_BS_SIZE			; used of layer 1
BS_MULTICHANNEL			equ		BS_EXTENSION+MAX_BS_SIZE
BS_SPDIF_BASE			equ		SB0_BASE
.endif
.endif


s1mem_PCM_BUF			equ		0x0000		/* buffer 0 */
s1mem_PCM_HALF			equ		0x5A00		/* buffer 1 */


.endif /* _MPA_MEM_H_ */

.list on