📄 infones_define.h
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#ifndef __INFONES_DEFINE_INCLUDED
#define __INFONES_DEFINE_INCLUDED
#include "gpio_api.h"
#define _ENABLE_DMC 0
#define _ENABLE_APU_EXT 0
#define _SUPPORT_GAME_EXIT_THROUGH_JOYPAD 1
#define malloc SysMalloc
#define free SysFree
#define RAM_SIZE 0x2000
#define SRAM_SIZE 0x2000
#define PPURAM_SIZE 0x4000
#define SPRRAM_SIZE 256
#define APU_EVENT_MAX 50
#define NAME_TABLE0 8
#define NAME_TABLE1 9
#define NAME_TABLE2 10
#define NAME_TABLE3 11
#define NAME_TABLE0_10shift 0x2000
#define NAME_TABLE1_10shift 0x2400
#define NAME_TABLE2_10shift 0x2800
#define NAME_TABLE3_10shift 0x2c00
#define NAME_TABLE_V_MASK 2
#define NAME_TABLE_H_MASK 1
/* Sprite RAM */
#define SPR_Y 0
#define SPR_CHR 1
#define SPR_ATTR 2
#define SPR_X 3
#define SPR_ATTR_COLOR 0x3
#define SPR_ATTR_V_FLIP 0x80
#define SPR_ATTR_H_FLIP 0x40
#define SPR_ATTR_PRI 0x20
#define SPR_ATTR_PRI_COLOR 0x23
/* PPU Register */
#define R0_NMI_VB 0x80
#define R0_NMI_SP 0x40
#define R0_SP_SIZE 0x20
#define R0_BG_ADDR 0x10
#define R0_SP_ADDR 0x08
#define R0_INC_ADDR 0x04
#define R0_NAME_ADDR 0x03
#define R1_BACKCOLOR 0xe0
#define R1_SHOW_SP 0x10
#define R1_SHOW_SCR 0x08
#define R1_CLIP_SP 0x04
#define R1_CLIP_BG 0x02
#define R1_MONOCHROME 0x01
#define R2_IN_VBLANK 0x80
#define R2_HIT_SP 0x40
#define R2_MAX_SP 0x20
#define R2_WRITE_FLAG 0x10
#define SCAN_TOP_OFF_SCREEN 0
#define SCAN_ON_SCREEN 1
#define SCAN_BOTTOM_OFF_SCREEN 2
#define SCAN_UNKNOWN 3
#define SCAN_VBLANK 4
#define SCAN_TOP_OFF_SCREEN_START 0
#define SCAN_ON_SCREEN_START 8
#define SCAN_BOTTOM_OFF_SCREEN_START 232
#define SCAN_UNKNOWN_START 240
#define SCAN_VBLANK_START 241
#define SCAN_VBLANK_END 261
#define JOYPAD_SCAN_START 120
#define STEP_PER_SCANLINE 113
#define STEP_PER_FRAME 29828
/*-----------------------------------*/
/* Develop Scroll Registers */
#define InfoNES_SetupScr() \
{ \
/* V-Scroll Register */ \
PPU_Scr_V_Next = ( BYTE )( PPU_Addr & 0x001f ); \
PPU_Scr_V_Byte_Next = PPU_Scr_V_Next >> 3; \
PPU_Scr_V_Bit_Next = PPU_Scr_V_Next & 0x07; \
\
/* H-Scroll Register */ \
PPU_Scr_H_Next = ( BYTE )( ( PPU_Addr & 0x03e0 ) >> 5 ); \
PPU_Scr_H_Byte_Next = PPU_Scr_H_Next >> 3; \
PPU_Scr_H_Bit_Next = PPU_Scr_H_Next & 0x07; \
}
/*************** VP RELATED DEFINES ******************/
#define VP_BASE 0x310000
#define rVP_Y_PTR_H (*(volatile unsigned int *)(VP_BASE+0x2C))
#define rVP_Y_PTR_L (*(volatile unsigned int*)(VP_BASE+0x2E))
#define rVP_C_PTR_H (*(volatile unsigned int *) (VP_BASE +0x30))
#define rVP_C_PTR_L (*(volatile unsigned int *) (VP_BASE +0x32))
/**************************************************/
/******************* jOY PAD*******/
#define USE_JOYPAD 1
#define GPIO_PORT_BASE 0x39e000 //0x3cf00000
#define Port_PCON0_H GPIO_PORT_BASE + 0x00 /* port0 Control Register*/
#define Port_PCON0_L GPIO_PORT_BASE + 0x02 /* port0 Control Register*/
#define Port_PDAT0_H GPIO_PORT_BASE + 0x04 /* port0 Data Register*/
#define Port_PDAT0_L GPIO_PORT_BASE + 0x06 /* port0 Data Register*/
#define PCON0_H ( *(volatile unsigned *) (Port_PCON0_H) )
#define PCON0_L ( *(volatile unsigned *) (Port_PCON0_L) )
#define PDAT0_H ( *(volatile unsigned *) (Port_PDAT0_H) )
#define PDAT0_L ( *(volatile unsigned *) (Port_PDAT0_L) )
#define GAME_PAD_BASE 0x38c000 // 0x3c600000
#define Port_rGP_D0_H GAME_PAD_BASE + 0x00
#define Port_rGP_D0_L GAME_PAD_BASE + 0x02
#define Port_rGP_D1_H GAME_PAD_BASE + 0x04
#define Port_rGP_D1_L GAME_PAD_BASE + 0x06
#define Port_rGP_ENB GAME_PAD_BASE + 0x0C
#define Port_rGP_ST_DUR GAME_PAD_BASE + 0x10
#define Port_rGP_STRB_CON GAME_PAD_BASE + 0x14
#define Port_rGP_CLK_CON GAME_PAD_BASE + 0x18
#define Port_rGP_SCAN_INT GAME_PAD_BASE + 0x1c
#define rGP_D0_H ( *(volatile unsigned *) (Port_rGP_D0_H) )
#define rGP_D0_L ( *(volatile unsigned *) (Port_rGP_D0_L) )
#define rGP_D1_H ( *(volatile unsigned *) (Port_rGP_D1_H) )
#define rGP_D1_L ( *(volatile unsigned *) (Port_rGP_D1_L) )
#define rGP_ENB ( *(volatile unsigned *) (Port_rGP_ENB) )
#define rGP_ST_DUR ( *(volatile unsigned *) (Port_rGP_ST_DUR) )
#define rGP_STRB_CON ( *(volatile unsigned *) (Port_rGP_STRB_CON) )
#define rGP_CLK_CON ( *(volatile unsigned *) (Port_rGP_CLK_CON) )
#define rGP_SCAN_INT ( *(volatile unsigned *) (Port_rGP_SCAN_INT) )
/*--------------------------------------------------------------------------------*/
//extern void IO_WData32_EX(unsigned char *addr,unsigned int high,unsigned int low);
#define Game_IODMA0_Command(x) Gamew_IO_WData32_EX((unsigned char *)&rDMACOM0_H,(unsigned int)(x>>16) ,(unsigned int)x )
//extern unsigned long IO_RData32_EX(unsigned char *addr);
#define CLK_BIT 0x10 // 4
#define STB_BIT 0x08 // 3
/**********************************/
/*----- Game Type-------------------------*/
#define GCD_TYPE_300GAME 0
#define GCD_TYPE_196GAME 1
#define GCD_TYPE_MALATA 2
#define GCD_TYPE_GUN 3
/****************************************************
CPU EMULATION
**********************************************************/
#ifndef NULL
#define NULL 0
#endif
#if 0
#ifdef CLOCK
#undef CLOCK
#endif
#endif
/* 6502 Flags */
#define FLAG_C 0x01
#define FLAG_Z 0x02
#define FLAG_I 0x04
#define FLAG_D 0x08
#define FLAG_B 0x10
#define FLAG_R 0x20
#define FLAG_V 0x40
#define FLAG_N 0x80
#define FLAG_NZ 0x82
#define FLAG_NZC 0x83
#define FLAG_NVZ 0xC2
#define FLAG_NVZC 0xC3
#define FLAG_NV 0xC0
/* Stack Address */
#define BASE_STACK 0x100
/* Interrupt Vectors */
#define VECTOR_NMI 0xfffa
#define VECTOR_RESET 0xfffc
#define VECTOR_IRQ 0xfffe
/* Added by Vijay to remove some K6502_Read calls */
#define VECTOR_NMI_MASK 0x1ffa
#define VECTOR_NMI_MASK_1 0x1ffb
#define VECTOR_IRQ_MASK 0x1ffe
#define VECTOR_IRQ_MASK_1 0x1fff
// NMI Request
#define NMI_REQ NMI_State = 0;
// IRQ Request
#define IRQ_REQ IRQ_State = 0;
/***********************AUDIO**************************/
#define __SUPPORT_GAME_AUDIO 1
#define SOUND __SUPPORT_GAME_AUDIO //vinay VCD
#if __SUPPORT_GAME_AUDIO
#define USE_SOUND 1
#else
#define USE_SOUND 0
#endif
#define GCD_SOUND_OUT
#endif
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