cstartup_s5l9908_irtos.s

三星ic 9980的源代码. 718版.

;--------------------------------------------------------
; Description	: This is startup file for calmRISC16
; History	:
;			2001.3.29 change sp initialization
;			2000.11.24 ld ...$$SIZE  at A-register
;			2000.3.7   change interrupt number => 1fh	
;			1999.11.8  init SP = FFF0h , Call stack 
;			1999.10.08 first edited
; BY		: Han Sung Hui
;--------------------------------------------------------
		INCLUDE		"S5L9908F.REG"		
	 
_SUPPORT_MAPFILE_ 		equ	1
	
;-------------------------------------------------------
; Vector and Option area (0x0 ~ 0xFE)
; - This area might be modified by user
;-------------------------------------------------------
      vector  0,Reset_handler        ;Reset vector address
 ;    vector  2,Reset_handler        ;Reset vector address
 ;    vector  4,Reset_handler        ;Reset vector address
   	  vector  4,_9908_IRQHandler         ;IRQ vector address
   ;  vector  4,_IRQ_handler
     
      
ResetSec        SECTION CODE
        ResetSec
        ;EXTERN	_IRQ_handler;_FIQ_handler         
       	EXTERN	_9908_IRQHandler;_FIQ_handler         
        EXTERN  _main
        EXTERN  _INIT_CPADWALTZ        
        EXTERN  |IMAGE$$IDATALOAD$$BASE|
        EXTERN  |IMAGE$$IDATA$$BASE|
        EXTERN  |IMAGE$$IDATA$$SIZE|
        EXTERN  |IMAGE$$ZDATA$$BASE|
        EXTERN  |IMAGE$$ZDATA$$SIZE|
        EXTERN  |IMAGE$$UDATA$$BASE|
		EXTERN  |IMAGE$$STACK$$LIMIT|
	
;JSY added 00-11-03
        EXTERN  |IMAGE$$DM$$BASE|
        EXTERN _sub_startup
        EXTERN _unrar_and_idata_copy
        
	org 0x200
	;org 0x50
	;org 0x126
Reset_handler
	;Disable all interrupt
	
	//CLRSR	FE	;FRQ disable

	CLRSR	IE	;IRQ disable
	CLRSR	TE	;TRQ disable
	
	JSR		_INIT_CPADWALTZ

;--------------------------------------------------------
; Initialize memory required by C code
;--------------------------------------------------------
; 1. Copy ROM's IDATA block to RAM(Data Memory)'s IDATA block
	; Get IDATA size
	LD		A9, #|IMAGE$$IDATA$$SIZE|
	; Check that they are different
	CMP		EQ, A9,#0
	BRT		_a
 
_CopyIDATA

	LD		R6,E9		;high byte of |IMAGE$$IDATA$$SIZE|
	; Get from_startaddress to from_pointer
	LD		A11, #|IMAGE$$IDATALOAD$$BASE|
	
	; Get to_startaddress to to_pointer
	LD		A8,#|IMAGE$$IDATA$$BASE|
	; index for data memory A8
	
_b

	; LDC(Load @[IL] in PM(Program Memory) to [0..1] addr in DM(Data Memory) )
	LDC		R2,@A11                
	LDW		@[A8],R2
	ADD		A11,#2		;byte code memory
	ADD		A8,#2
	;-------------------------------------------------------------------------
	; => Notice : following block can be modified as compiler data alignment.
	;-------------------------------------------------------------------------


	SUB		R9,#2
	SBC		R6,#0
	CMPU	GT,R6,#0
	BRT		_b
	CMPU	GT,R9,#0
	BRT		_b

; 2. Initialize RAM's ZDATA block with zero

_a
	
	; Get ZDATA size
	LD		A9, #|IMAGE$$ZDATA$$SIZE|
       
	; Check that they are different
	CMP		EQ,A9,#0        
	BRT		_e
_InitZDATA
	LD		R6,E9		;high byte of |IMAGE$$ZDATA$$SIZE|
	LD		R4,#0			;Zero data	
	LD		A8,#|IMAGE$$ZDATA$$BASE|
_d
	LDW		@[A8],R4     ; Zero init
	ADD		A8,#2
	SUB		R9,#2
	SBC		R6,#0	 
	CMPU	GT,R6,#0
	BRT		_d
	CMPU	GT,R9,#0
	BRT		_d


;--------------------------------------------------------
; Initialize special register
;--------------------------------------------------------
_e
		
	; stack sp initialization
	.ifdef ___CALLSTACKSIZE

	LD	SP, #|IMAGE$$STACK$$LIMIT|-4*32 ;

	; Callstack sp initialization
	LD	A8,#|IMAGE$$STACK$$LIMIT|-8
        
	
	LD	R0,E8
	LDW	@[A8+4],R0			;high
	LDW	@[A8+6],R8			;low

	.else
	LD	SP, #|IMAGE$$STACK$$LIMIT|;
	.endif
	




	// watchdog timer enable
	ld		a8, #0x390000		//0x390000
	ld		r0, #0xf
	ld		r1, #0x0a00
	ldw		@[a8+0], r0
	ldw		@[a8+0+2], r1

	
	
.if(_SUPPORT_MAPFILE_)	
	push r2,r3
	push r4,r5
	push r6,r7
	push a8,a9
	push a10,a11
	push a12,a13
	push a14
	jsr _unrar_and_idata_copy
	pop a14
	pop a13,a12
	pop a11,a10
	pop a9,a8
	pop r7,r6
	pop r5,r4
	pop r3,r2


	jsr _sub_startup
.endif
	
	; Initialize global data head pointer
	LD	A9,#0
	LD	A8,#0x3F0000
	
	// watchdog timer enable
	ld		a8, #0x390000		//0x390000
	ld		r0, #0xf
	ld		r1, #0x0a00
	ldw		@[a8+0], r0
	ldw		@[a8+0+2], r1
;--------------------------------------------------------
;   call the main() function
;--------------------------------------------------------
;JSY added 00-11-03
	LD	R1,#<|IMAGE$$IDATA$$BASE|
	LD	E9,R1
;end
	JSR     _main


------------------------------------------------------------------------
;------------------------------------------------------------------------
 PUBLIC _CopyPM2
	; A10(source_address), A11(destination_address), R2(size)
_CopyPM2::
	; Check that they are different
	CMP		EQ, r2,#0
	BRT		_f2
 
_p2

	; LDC(Load @[IL] in PM(Program Memory) to [0..1] addr in DM(Data Memory) )
	LDC		R6,@A10                
//	LDW		R6, @[A10]
	LDW		@[A11],R6
	ADD		A10,#2		;byte code memory
	ADD		A11,#2
;-------------------------------------------------------------------------
; => Notice : following block can be modified as compiler data alignment.
;-------------------------------------------------------------------------

	SUB		R2,#1
	CMPU	GT,R2,#0
	BRT		_p2

	////////////////////////cache flush by kang kee jin 1207
	nop
	ld 		A10, #adm_base

	ldw		r2, @[a10+cachestat]		// 0x4c
	ld		r6, r2
 	and		r2, #0x007			// check if YC is disabled
	cmp		eq,r2,#0x003
 	brt		%f1

	ld		R2, #0x004			// YC flush	with IE Off and On
	clrsr		IE
	ldw		@[A10+cachecon], R2

%3 	
	ldw		r2, @[a10+cachestat]		// 0x4c

 	and		r2, #0x7
	cmp		eq,r2,#0x4			// Check if YC flush has done
	brt		%b3
	setsr	IE

%1								
 	and		r6, #0x070			// check if XC is disabled
	cmp		eq,r6,#0x030
 	brt		%f2

	ld		R6, #0x040			// XC flush	with IE Off and On
	clrsr		IE
	ldw		@[A10+cachecon], R6
%4 	
	ldw		r6, @[a10+cachestat]		// 0x4c

 	and		r6, #0x70
	cmp		eq,r6,#0x40			// Check if XC flush has done
	brt		%b4
	setsr	IE
%2
	NOP	
	/////////////////////////////////////////////////////////////////

_f2	RET


;--------------------------------------------------------
;   termination 
;--------------------------------------------------------

;	BREAK + SYS #SWI_num
	LD	R10,#3
	DL	#0x9E999E3F	;SWI_num: 0x1F, Halt interrupt

SWISEC2        SECTION CODE,abs 0x8
	SWISEC2
	jmp	$__pushregs_swi
SWISEC3        SECTION CODE,abs 0xc
	SWISEC3
	jmp	$__popregs_swi	
	

	END