📄 t8.rpt
字号:
t8
** BURIED LOGIC **
Fan-In Fan-Out
IOC LC EC Row Col Primitive Code INP FBK OUT FBK Name
- 1 - A 06 DFFE + 0 3 1 6 count0
- 3 - A 03 DFFE + 0 2 1 7 count1
- 8 - A 01 DFFE + 0 3 1 6 count2
- 1 - A 01 DFFE + 0 3 1 8 count3
- 4 - B 02 DFFE + 0 3 1 6 count4
- 1 - B 02 DFFE + 0 3 1 8 count5
- 7 - A 03 DFFE + 0 3 1 7 count6
- 3 - A 04 DFFE + 0 4 1 5 count7
- 4 - A 09 DFFE + 0 4 0 4 subadd
- 2 - A 09 AND2 2 1 0 1 :166
- 3 - A 13 AND2 0 3 0 3 :177
- 6 - A 01 AND2 0 2 0 1 :181
- 5 - A 04 AND2 0 3 0 3 :185
- 6 - A 04 OR2 0 4 0 1 :195
- 7 - A 09 AND2 s 0 4 0 1 ~229~1
- 1 - A 09 AND2 s 0 4 0 1 ~229~2
- 1 - A 05 OR2 0 3 0 4 :245
- 3 - B 02 OR2 0 2 0 1 :250
- 2 - B 02 OR2 0 3 0 1 :256
- 1 - A 10 OR2 0 4 0 2 :261
- 6 - A 09 OR2 s 0 4 0 1 ~308~1
- 5 - A 09 OR2 ! 0 4 0 1 :308
- 3 - A 09 AND2 2 2 0 1 :311
- 2 - C 08 AND2 ! 2 0 0 8 :315
- 2 - A 07 OR2 s 2 1 0 8 ~341~1
- 2 - A 11 OR2 s 2 1 0 8 ~341~2
- 1 - A 03 OR2 s 0 4 0 1 ~341~3
- 3 - A 01 OR2 s 0 4 0 1 ~344~1
- 4 - A 01 OR2 s 0 4 0 1 ~344~2
- 5 - A 01 OR2 s 0 4 0 1 ~347~1
- 2 - A 01 OR2 s 0 4 0 1 ~350~1
- 1 - A 04 OR2 s 0 4 0 1 ~354~1
- 2 - A 04 OR2 s 0 4 0 1 ~357~1
- 2 - A 03 OR2 s 0 4 0 1 ~357~2
- 4 - A 04 OR2 0 4 0 1 :359
- 7 - A 04 OR2 s 0 4 0 1 ~360~1
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register
Device-Specific Information: c:\edatest\altera\test8\t8.rpt
t8
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 4/ 96( 4%) 12/ 48( 25%) 0/ 48( 0%) 0/16( 0%) 6/16( 37%) 0/16( 0%)
B: 0/ 96( 0%) 6/ 48( 12%) 0/ 48( 0%) 0/16( 0%) 1/16( 6%) 0/16( 0%)
C: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
02: 3/24( 12%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
03: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
04: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
05: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
06: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
10: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
13: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
18: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
19: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
20: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
21: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
22: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: c:\edatest\altera\test8\t8.rpt
t8
** CLOCK SIGNALS **
Type Fan-out Name
INPUT 9 clk
Device-Specific Information: c:\edatest\altera\test8\t8.rpt
t8
** CLEAR SIGNALS **
Type Fan-out Name
INPUT 9 reset
Device-Specific Information: c:\edatest\altera\test8\t8.rpt
t8
** EQUATIONS **
clk : INPUT;
model0 : INPUT;
model1 : INPUT;
reset : INPUT;
-- Node name is 'count0' from file "t8.tdf" line 8, column 10
-- Equation name is 'count0', location is LC1_A6, type is buried.
count0 = DFFE( _EQ001, GLOBAL( clk), GLOBAL( reset), VCC, VCC);
_EQ001 = count0 & !_LC2_C8
# !count0 & _LC2_A7
# !count0 & _LC2_A11;
-- Node name is 'count1' from file "t8.tdf" line 8, column 10
-- Equation name is 'count1', location is LC3_A3, type is buried.
count1 = DFFE( _EQ002, GLOBAL( clk), GLOBAL( reset), VCC, VCC);
_EQ002 = _LC1_A3
# count1 & !_LC2_C8;
-- Node name is 'count2' from file "t8.tdf" line 8, column 10
-- Equation name is 'count2', location is LC8_A1, type is buried.
count2 = DFFE( _EQ003, GLOBAL( clk), GLOBAL( reset), VCC, VCC);
_EQ003 = _LC3_A1
# _LC4_A1
# count2 & !_LC2_C8;
-- Node name is 'count3' from file "t8.tdf" line 8, column 10
-- Equation name is 'count3', location is LC1_A1, type is buried.
count3 = DFFE( _EQ004, GLOBAL( clk), GLOBAL( reset), VCC, VCC);
_EQ004 = !count3 & !_LC1_A5 & _LC2_A7
# count3 & _LC1_A5 & _LC2_A7
# _LC5_A1;
-- Node name is 'count4' from file "t8.tdf" line 8, column 10
-- Equation name is 'count4', location is LC4_B2, type is buried.
count4 = DFFE( _EQ005, GLOBAL( clk), GLOBAL( reset), VCC, VCC);
_EQ005 = !count4 & _LC2_A7 & !_LC3_B2
# count4 & _LC2_A7 & _LC3_B2
# _LC2_A1;
-- Node name is 'count5' from file "t8.tdf" line 8, column 10
-- Equation name is 'count5', location is LC1_B2, type is buried.
count5 = DFFE( _EQ006, GLOBAL( clk), GLOBAL( reset), VCC, VCC);
_EQ006 = !count5 & _LC2_A7 & !_LC2_B2
# count5 & _LC2_A7 & _LC2_B2
# _LC1_A4;
-- Node name is 'count6' from file "t8.tdf" line 8, column 10
-- Equation name is 'count6', location is LC7_A3, type is buried.
count6 = DFFE( _EQ007, GLOBAL( clk), GLOBAL( reset), VCC, VCC);
_EQ007 = !count6 & !_LC1_A10 & _LC2_A7
# count6 & _LC1_A10 & _LC2_A7
# _LC2_A3;
-- Node name is 'count7' from file "t8.tdf" line 8, column 10
-- Equation name is 'count7', location is LC3_A4, type is buried.
count7 = DFFE( _EQ008, GLOBAL( clk), GLOBAL( reset), VCC, VCC);
_EQ008 = _LC7_A4
# _LC2_A11 & _LC6_A4
# _LC4_A4;
-- Node name is 'daout0' from file "t8.tdf" line 15, column 10
-- Equation name is 'daout0', type is output
daout0 = count0;
-- Node name is 'daout1' from file "t8.tdf" line 15, column 10
-- Equation name is 'daout1', type is output
daout1 = count1;
-- Node name is 'daout2' from file "t8.tdf" line 15, column 10
-- Equation name is 'daout2', type is output
daout2 = count2;
-- Node name is 'daout3' from file "t8.tdf" line 15, column 10
-- Equation name is 'daout3', type is output
daout3 = count3;
-- Node name is 'daout4' from file "t8.tdf" line 15, column 10
-- Equation name is 'daout4', type is output
daout4 = count4;
-- Node name is 'daout5' from file "t8.tdf" line 15, column 10
-- Equation name is 'daout5', type is output
daout5 = count5;
-- Node name is 'daout6' from file "t8.tdf" line 15, column 10
-- Equation name is 'daout6', type is output
daout6 = count6;
-- Node name is 'daout7' from file "t8.tdf" line 15, column 10
-- Equation name is 'daout7', type is output
daout7 = count7;
-- Node name is 'subadd' from file "t8.tdf" line 8, column 17
-- Equation name is 'subadd', location is LC4_A9, type is buried.
subadd = DFFE( _EQ009, GLOBAL( clk), GLOBAL( reset), VCC, VCC);
_EQ009 = _LC3_A9
# !count0 & count1 & _LC1_A9;
-- Node name is ':166' from file "t8.tdf" line 23, column 17
-- Equation name is '_LC2_A9', type is buried
_LC2_A9 = LCELL( _EQ010);
_EQ010 = !model0 & model1 & !subadd;
-- Node name is ':177' from file "t8.tdf" line 24, column 39
-- Equation name is '_LC3_A13', type is buried
_LC3_A13 = LCELL( _EQ011);
_EQ011 = count0 & count1 & count2;
-- Node name is ':181' from file "t8.tdf" line 24, column 39
-- Equation name is '_LC6_A1', type is buried
_LC6_A1 = LCELL( _EQ012);
_EQ012 = count3 & _LC3_A13;
-- Node name is ':185' from file "t8.tdf" line 24, column 39
-- Equation name is '_LC5_A4', type is buried
_LC5_A4 = LCELL( _EQ013);
_EQ013 = count3 & count4 & _LC3_A13;
-- Node name is ':195' from file "t8.tdf" line 24, column 39
-- Equation name is '_LC6_A4', type is buried
_LC6_A4 = LCELL( _EQ014);
_EQ014 = !count5 & count7
# count7 & !_LC5_A4
# !count6 & count7
# count5 & count6 & !count7 & _LC5_A4;
-- Node name is '~229~1' from file "t8.tdf" line 25, column 8
-- Equation name is '~229~1', location is LC7_A9, type is buried.
-- synthesized logic cell
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -