📄 cslr_pmx.h
字号:
/* ============================================================================
* Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005
*
* Use of this software is controlled by the terms and conditions found in the
* license agreement under which this software has been supplied.
* ===========================================================================
*/
#ifndef _CSLR_PMX_H_
#define _CSLR_PMX_H_
/** \file cslr_pmx.h
* Path: \\(CSLPATH)\\soc\\davinci\\arm9\\src
* \brief This file contains the Register Desciptions for PMX
*
*********************************************************************/
#include <cslr.h>
#include <tistdtypes.h>
/**************************************************************************\
* Register Overlay Structure
\**************************************************************************/
typedef struct {
volatile Uint32 PinMux0;
volatile Uint32 PinMux1;
} CSL_PmxRegs;
/**************************************************************************\
* Overlay structure typedef definition
\**************************************************************************/
typedef volatile CSL_PmxRegs *CSL_PmxRegsOvly;
/**************************************************************************\
* Field Definition Macros
\**************************************************************************/
/* PinMux0 */
#define CSL_PMX_PINMUX0_EMACEN_MASK (0x80000000u)
#define CSL_PMX_PINMUX0_EMACEN_SHIFT (0x0000001Fu)
#define CSL_PMX_PINMUX0_EMACEN_RESETVAL (0x00000000u)
/*----EMACEN Tokens----*/
#define CSL_PMX_PINMUX0_EMACEN_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX0_EMACEN_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX0_1394EN_MASK (0x40000000u)
#define CSL_PMX_PINMUX0_1394EN_SHIFT (0x0000001Eu)
#define CSL_PMX_PINMUX0_1394EN_RESETVAL (0x00000000u)
/*----1394EN Tokens----*/
#define CSL_PMX_PINMUX0_1394EN_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX0_1394EN_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX0_HPIEN_MASK (0x20000000u)
#define CSL_PMX_PINMUX0_HPIEN_SHIFT (0x0000001Du)
#define CSL_PMX_PINMUX0_HPIEN_RESETVAL (0x00000000u)
/*----HPIEN Tokens----*/
#define CSL_PMX_PINMUX0_HPIEN_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX0_HPIEN_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX0_RESERVED_MASK (0x10000000u)
#define CSL_PMX_PINMUX0_RESERVED_SHIFT (0x0000001Cu)
#define CSL_PMX_PINMUX0_RESERVED_RESETVAL (0x00000000u)
#define CSL_PMX_PINMUX0_CFLDEN_MASK (0x08000000u)
#define CSL_PMX_PINMUX0_CFLDEN_SHIFT (0x0000001Bu)
#define CSL_PMX_PINMUX0_CFLDEN_RESETVAL (0x00000000u)
/*----CFLDEN Tokens----*/
#define CSL_PMX_PINMUX0_CFLDEN_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX0_CFLDEN_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX0_CWEN_MASK (0x04000000u)
#define CSL_PMX_PINMUX0_CWEN_SHIFT (0x0000001Au)
#define CSL_PMX_PINMUX0_CWEN_RESETVAL (0x00000000u)
/*----CWEN Tokens----*/
#define CSL_PMX_PINMUX0_CWEN_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX0_CWEN_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX0_LFLDEN_MASK (0x02000000u)
#define CSL_PMX_PINMUX0_LFLDEN_SHIFT (0x00000019u)
#define CSL_PMX_PINMUX0_LFLDEN_RESETVAL (0x00000000u)
/*----LFLDEN Tokens----*/
#define CSL_PMX_PINMUX0_LFLDEN_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX0_LFLDEN_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX0_LOEEN_MASK (0x01000000u)
#define CSL_PMX_PINMUX0_LOEEN_SHIFT (0x00000018u)
#define CSL_PMX_PINMUX0_LOEEN_RESETVAL (0x00000000u)
/*----LOEEN Tokens----*/
#define CSL_PMX_PINMUX0_LOEEN_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX0_LOEEN_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX0_RGB888_MASK (0x00800000u)
#define CSL_PMX_PINMUX0_RGB888_SHIFT (0x00000017u)
#define CSL_PMX_PINMUX0_RGB888_RESETVAL (0x00000000u)
/*----RGB888 Tokens----*/
#define CSL_PMX_PINMUX0_RGB888_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX0_RGB888_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX0_ATAEN_MASK (0x00020000u)
#define CSL_PMX_PINMUX0_ATAEN_SHIFT (0x00000011u)
#define CSL_PMX_PINMUX0_ATAEN_RESETVAL (0x00000000u)
/*----ATAEN Tokens----*/
#define CSL_PMX_PINMUX0_ATAEN_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX0_ATAEN_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX0_HDIREN_MASK (0x00010000u)
#define CSL_PMX_PINMUX0_HDIREN_SHIFT (0x00000010u)
#define CSL_PMX_PINMUX0_HDIREN_RESETVAL (0x00000000u)
/*----HDIREN Tokens----*/
#define CSL_PMX_PINMUX0_HDIREN_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX0_HDIREN_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX0_VLYNQEN_MASK (0x00008000u)
#define CSL_PMX_PINMUX0_VLYNQEN_SHIFT (0x0000000Fu)
#define CSL_PMX_PINMUX0_VLYNQEN_RESETVAL (0x00000000u)
/*----VLYNQEN Tokens----*/
#define CSL_PMX_PINMUX0_VLYNQEN_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX0_VLYNQEN_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX0_VLSCREN_MASK (0x00004000u)
#define CSL_PMX_PINMUX0_VLSCREN_SHIFT (0x0000000Eu)
#define CSL_PMX_PINMUX0_VLSCREN_RESETVAL (0x00000000u)
/*----VLSCREN Tokens----*/
#define CSL_PMX_PINMUX0_VLSCREN_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX0_VLSCREN_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX0_VLYNQWD_MASK (0x00003000u)
#define CSL_PMX_PINMUX0_VLYNQWD_SHIFT (0x0000000Cu)
#define CSL_PMX_PINMUX0_VLYNQWD_RESETVAL (0x00000000u)
/*----VLYNQWD Tokens----*/
#define CSL_PMX_PINMUX0_VLYNQWD_VLYNQWD0 (0x00000000u)
#define CSL_PMX_PINMUX0_VLYNQWD_VLYNQWD1 (0x00000001u)
#define CSL_PMX_PINMUX0_VLYNQWD_VLYNQWD2 (0x00000002u)
#define CSL_PMX_PINMUX0_VLYNQWD_VLYNQWD3 (0x00000003u)
#define CSL_PMX_PINMUX0_AECS5_MASK (0x00000800u)
#define CSL_PMX_PINMUX0_AECS5_SHIFT (0x0000000Bu)
#define CSL_PMX_PINMUX0_AECS5_RESETVAL (0x00000000u)
/*----AECS5 Tokens----*/
#define CSL_PMX_PINMUX0_AECS5_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX0_AECS5_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX0_AECS4_MASK (0x00000400u)
#define CSL_PMX_PINMUX0_AECS4_SHIFT (0x0000000Au)
#define CSL_PMX_PINMUX0_AECS4_RESETVAL (0x00000000u)
/*----AECS4 Tokens----*/
#define CSL_PMX_PINMUX0_AECS4_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX0_AECS4_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX0_AEAW_MASK (0x0000001Fu)
#define CSL_PMX_PINMUX0_AEAW_SHIFT (0x00000000u)
#define CSL_PMX_PINMUX0_AEAW_RESETVAL (0x00000000u)
/*----AEAW Tokens----*/
#define CSL_PMX_PINMUX0_AEAW_AEAW0 (0x00000000u)
#define CSL_PMX_PINMUX0_AEAW_AEAW1 (0x00000001u)
#define CSL_PMX_PINMUX0_AEAW_AEAW2 (0x00000002u)
#define CSL_PMX_PINMUX0_AEAW_AEAW3 (0x00000003u)
#define CSL_PMX_PINMUX0_AEAW_AEAW4 (0x00000004u)
#define CSL_PMX_PINMUX0_AEAW_AEAW5 (0x00000005u)
#define CSL_PMX_PINMUX0_AEAW_AEAW6 (0x00000006u)
#define CSL_PMX_PINMUX0_AEAW_AEAW7 (0x00000007u)
#define CSL_PMX_PINMUX0_AEAW_AEAW8 (0x00000008u)
#define CSL_PMX_PINMUX0_AEAW_AEAW9 (0x00000009u)
#define CSL_PMX_PINMUX0_AEAW_AEAW10 (0x0000000Au)
#define CSL_PMX_PINMUX0_AEAW_AEAW11 (0x0000000Bu)
#define CSL_PMX_PINMUX0_AEAW_AEAW12 (0x0000000Cu)
#define CSL_PMX_PINMUX0_AEAW_AEAW13 (0x0000000Du)
#define CSL_PMX_PINMUX0_AEAW_AEAW14 (0x0000000Eu)
#define CSL_PMX_PINMUX0_AEAW_AEAW15 (0x0000000Fu)
#define CSL_PMX_PINMUX0_AEAW_AEAW16 (0x00000010u)
#define CSL_PMX_PINMUX0_AEAW_AEAW17 (0x00000011u)
#define CSL_PMX_PINMUX0_AEAW_AEAW18 (0x00000012u)
#define CSL_PMX_PINMUX0_AEAW_AEAW19 (0x00000013u)
#define CSL_PMX_PINMUX0_AEAW_AEAW20 (0x00000014u)
#define CSL_PMX_PINMUX0_AEAW_AEAW21 (0x00000015u)
#define CSL_PMX_PINMUX0_AEAW_AEAW22 (0x00000016u)
#define CSL_PMX_PINMUX0_AEAW_AEAW23 (0x00000017u)
#define CSL_PMX_PINMUX0_RESETVAL (0x00000000u)
/* PinMux1 */
#define CSL_PMX_PINMUX1_TIMIN_MASK (0x00040000u)
#define CSL_PMX_PINMUX1_TIMIN_SHIFT (0x00000012u)
#define CSL_PMX_PINMUX1_TIMIN_RESETVAL (0x00000000u)
/*----TIMIN Tokens----*/
#define CSL_PMX_PINMUX1_TIMIN_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX1_TIMIN_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX1_CLK1_MASK (0x00020000u)
#define CSL_PMX_PINMUX1_CLK1_SHIFT (0x00000011u)
#define CSL_PMX_PINMUX1_CLK1_RESETVAL (0x00000000u)
/*----CLK1 Tokens----*/
#define CSL_PMX_PINMUX1_CLK1_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX1_CLK1_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX1_CLK0_MASK (0x00010000u)
#define CSL_PMX_PINMUX1_CLK0_SHIFT (0x00000010u)
#define CSL_PMX_PINMUX1_CLK0_RESETVAL (0x00000000u)
/*----CLK0 Tokens----*/
#define CSL_PMX_PINMUX1_CLK0_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX1_CLK0_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX1_MCBSP_MASK (0x00000400u)
#define CSL_PMX_PINMUX1_MCBSP_SHIFT (0x0000000Au)
#define CSL_PMX_PINMUX1_MCBSP_RESETVAL (0x00000000u)
/*----McBSP Tokens----*/
#define CSL_PMX_PINMUX1_MCBSP_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX1_MCBSP_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX1_MSTK_MASK (0x00000200u)
#define CSL_PMX_PINMUX1_MSTK_SHIFT (0x00000009u)
#define CSL_PMX_PINMUX1_MSTK_RESETVAL (0x00000000u)
/*----MSTK Tokens----*/
#define CSL_PMX_PINMUX1_MSTK_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX1_MSTK_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX1_SPI_MASK (0x00000100u)
#define CSL_PMX_PINMUX1_SPI_SHIFT (0x00000008u)
#define CSL_PMX_PINMUX1_SPI_RESETVAL (0x00000000u)
/*----SPI Tokens----*/
#define CSL_PMX_PINMUX1_SPI_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX1_SPI_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX1_I2C_MASK (0x00000080u)
#define CSL_PMX_PINMUX1_I2C_SHIFT (0x00000007u)
#define CSL_PMX_PINMUX1_I2C_RESETVAL (0x00000000u)
/*----I2C Tokens----*/
#define CSL_PMX_PINMUX1_I2C_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX1_I2C_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX1_PWM2_MASK (0x00000040u)
#define CSL_PMX_PINMUX1_PWM2_SHIFT (0x00000006u)
#define CSL_PMX_PINMUX1_PWM2_RESETVAL (0x00000000u)
/*----PWM2 Tokens----*/
#define CSL_PMX_PINMUX1_PWM2_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX1_PWM2_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX1_PWM1_MASK (0x00000020u)
#define CSL_PMX_PINMUX1_PWM1_SHIFT (0x00000005u)
#define CSL_PMX_PINMUX1_PWM1_RESETVAL (0x00000000u)
/*----PWM1 Tokens----*/
#define CSL_PMX_PINMUX1_PWM1_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX1_PWM1_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX1_PWM0_MASK (0x00000010u)
#define CSL_PMX_PINMUX1_PWM0_SHIFT (0x00000004u)
#define CSL_PMX_PINMUX1_PWM0_RESETVAL (0x00000000u)
/*----PWM0 Tokens----*/
#define CSL_PMX_PINMUX1_PWM0_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX1_PWM0_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX1_U2FLO_MASK (0x00000008u)
#define CSL_PMX_PINMUX1_U2FLO_SHIFT (0x00000003u)
#define CSL_PMX_PINMUX1_U2FLO_RESETVAL (0x00000000u)
/*----U2FLO Tokens----*/
#define CSL_PMX_PINMUX1_U2FLO_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX1_U2FLO_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX1_UART2_MASK (0x00000004u)
#define CSL_PMX_PINMUX1_UART2_SHIFT (0x00000002u)
#define CSL_PMX_PINMUX1_UART2_RESETVAL (0x00000000u)
/*----UART2 Tokens----*/
#define CSL_PMX_PINMUX1_UART2_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX1_UART2_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX1_UART1_MASK (0x00000002u)
#define CSL_PMX_PINMUX1_UART1_SHIFT (0x00000001u)
#define CSL_PMX_PINMUX1_UART1_RESETVAL (0x00000000u)
/*----UART1 Tokens----*/
#define CSL_PMX_PINMUX1_UART1_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX1_UART1_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX1_UART0_MASK (0x00000001u)
#define CSL_PMX_PINMUX1_UART0_SHIFT (0x00000000u)
#define CSL_PMX_PINMUX1_UART0_RESETVAL (0x00000000u)
/*----UART0 Tokens----*/
#define CSL_PMX_PINMUX1_UART0_DISABLE (0x00000000u)
#define CSL_PMX_PINMUX1_UART0_ENABLE (0x00000001u)
#define CSL_PMX_PINMUX1_RESETVAL (0x00000000u)
#endif
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -