cslr_sys.h

ccs下对dm6446的测试程序

#define CSL_SYS_DAC_DEMEN_DAC_DMEN_RESETVAL (0x00000000u)

/*----DAC_DMEN Tokens----*/
#define CSL_SYS_DAC_DEMEN_DAC_DMEN_DISABLE (0x00000000u)
#define CSL_SYS_DAC_DEMEN_DAC_DMEN_ENABLE (0x00000001u)

#define CSL_SYS_DAC_DEMEN_RESETVAL       (0x00000000u)

/* UHPI_CTRL */

#define CSL_SYS_UHPI_CTRL_ADDMODE_MASK   (0x00000200u)
#define CSL_SYS_UHPI_CTRL_ADDMODE_SHIFT  (0x00000009u)
#define CSL_SYS_UHPI_CTRL_ADDMODE_RESETVAL (0x00000000u)

/*----ADDMODE Tokens----*/
#define CSL_SYS_UHPI_CTRL_ADDMODE_HOSTWRITE (0x00000000u)
#define CSL_SYS_UHPI_CTRL_ADDMODE_CPUWRITE (0x00000001u)

#define CSL_SYS_UHPI_CTRL_CTLMODE_MASK   (0x00000100u)
#define CSL_SYS_UHPI_CTRL_CTLMODE_SHIFT  (0x00000008u)
#define CSL_SYS_UHPI_CTRL_CTLMODE_RESETVAL (0x00000000u)

/*----CTLMODE Tokens----*/
#define CSL_SYS_UHPI_CTRL_CTLMODE_HOSTWRITE (0x00000000u)
#define CSL_SYS_UHPI_CTRL_CTLMODE_CPUWRITE (0x00000001u)

#define CSL_SYS_UHPI_CTRL_TIMOUT_MASK    (0x000000FFu)
#define CSL_SYS_UHPI_CTRL_TIMOUT_SHIFT   (0x00000000u)
#define CSL_SYS_UHPI_CTRL_TIMOUT_RESETVAL (0x00000080u)

#define CSL_SYS_UHPI_CTRL_RESETVAL       (0x00000080u)

/* USB_PHY_CTRL */

#define CSL_SYS_USB_PHY_CTRL_PHYCLKGD_MASK (0x00000100u)
#define CSL_SYS_USB_PHY_CTRL_PHYCLKGD_SHIFT (0x00000008u)
#define CSL_SYS_USB_PHY_CTRL_PHYCLKGD_RESETVAL (0x00000000u)

/*----PHYCLKGD Tokens----*/
#define CSL_SYS_USB_PHY_CTRL_PHYCLKGD_BAD (0x00000000u)
#define CSL_SYS_USB_PHY_CTRL_PHYCLKGD_GOOD (0x00000001u)

#define CSL_SYS_USB_PHY_CTRL_SESNDEN_MASK (0x00000080u)
#define CSL_SYS_USB_PHY_CTRL_SESNDEN_SHIFT (0x00000007u)
#define CSL_SYS_USB_PHY_CTRL_SESNDEN_RESETVAL (0x00000001u)

/*----SESNDEN Tokens----*/
#define CSL_SYS_USB_PHY_CTRL_SESNDEN_DISABLE (0x00000000u)
#define CSL_SYS_USB_PHY_CTRL_SESNDEN_ENABLE (0x00000001u)

#define CSL_SYS_USB_PHY_CTRL_VBDTCTEN_MASK (0x00000040u)
#define CSL_SYS_USB_PHY_CTRL_VBDTCTEN_SHIFT (0x00000006u)
#define CSL_SYS_USB_PHY_CTRL_VBDTCTEN_RESETVAL (0x00000001u)

/*----VBDTCTEN Tokens----*/
#define CSL_SYS_USB_PHY_CTRL_VBDTCTEN_DISABLE (0x00000000u)
#define CSL_SYS_USB_PHY_CTRL_VBDTCTEN_ENABLE (0x00000001u)

#define CSL_SYS_USB_PHY_CTRL_VBUSENS_MASK (0x00000020u)
#define CSL_SYS_USB_PHY_CTRL_VBUSENS_SHIFT (0x00000005u)
#define CSL_SYS_USB_PHY_CTRL_VBUSENS_RESETVAL (0x00000000u)

/*----VBUSENS Tokens----*/
#define CSL_SYS_USB_PHY_CTRL_VBUSENS_ABSENT (0x00000000u)
#define CSL_SYS_USB_PHY_CTRL_VBUSENS_PRESENT (0x00000001u)

#define CSL_SYS_USB_PHY_CTRL_PHYPLLON_MASK (0x00000010u)
#define CSL_SYS_USB_PHY_CTRL_PHYPLLON_SHIFT (0x00000004u)
#define CSL_SYS_USB_PHY_CTRL_PHYPLLON_RESETVAL (0x00000000u)

/*----PHYPLLON Tokens----*/
#define CSL_SYS_USB_PHY_CTRL_PHYPLLON_NORMAL_OPER (0x00000000u)
#define CSL_SYS_USB_PHY_CTRL_PHYPLLON_OVERRIDE_SUSP_STATE (0x00000001u)

#define CSL_SYS_USB_PHY_CTRL_CLKO1SEL_MASK (0x00000008u)
#define CSL_SYS_USB_PHY_CTRL_CLKO1SEL_SHIFT (0x00000003u)
#define CSL_SYS_USB_PHY_CTRL_CLKO1SEL_RESETVAL (0x00000000u)

/*----CLKO1SEL Tokens----*/
#define CSL_SYS_USB_PHY_CTRL_CLKO1SEL_24MHZ (0x00000000u)
#define CSL_SYS_USB_PHY_CTRL_CLKO1SEL_12MHZ (0x00000001u)

#define CSL_SYS_USB_PHY_CTRL_OSCPDWN_MASK (0x00000004u)
#define CSL_SYS_USB_PHY_CTRL_OSCPDWN_SHIFT (0x00000002u)
#define CSL_SYS_USB_PHY_CTRL_OSCPDWN_RESETVAL (0x00000001u)

/*----OSCPDWN Tokens----*/
#define CSL_SYS_USB_PHY_CTRL_OSCPDWN_PWRED (0x00000000u)
#define CSL_SYS_USB_PHY_CTRL_OSCPDWN_PWROFF (0x00000001u)

#define CSL_SYS_USB_PHY_CTRL_OTGPDWN_MASK (0x00000002u)
#define CSL_SYS_USB_PHY_CTRL_OTGPDWN_SHIFT (0x00000001u)
#define CSL_SYS_USB_PHY_CTRL_OTGPDWN_RESETVAL (0x00000001u)

/*----OTGPDWN Tokens----*/
#define CSL_SYS_USB_PHY_CTRL_OTGPDWN_PWRED (0x00000000u)
#define CSL_SYS_USB_PHY_CTRL_OTGPDWN_PWROFF (0x00000001u)

#define CSL_SYS_USB_PHY_CTRL_PHYPDWN_MASK (0x00000001u)
#define CSL_SYS_USB_PHY_CTRL_PHYPDWN_SHIFT (0x00000000u)
#define CSL_SYS_USB_PHY_CTRL_PHYPDWN_RESETVAL (0x00000001u)

/*----PHYPDWN Tokens----*/
#define CSL_SYS_USB_PHY_CTRL_PHYPDWN_PWRED (0x00000000u)
#define CSL_SYS_USB_PHY_CTRL_PHYPDWN_PWROFF (0x00000001u)

#define CSL_SYS_USB_PHY_CTRL_RESETVAL    (0x000000C7u)

/* CHIP_SHORT_SWITCH */

#define CSL_SYS_CHIP_SHORT_SWITCH_DSPPWRON_MASK (0x00000001u)
#define CSL_SYS_CHIP_SHORT_SWITCH_DSPPWRON_SHIFT (0x00000000u)
#define CSL_SYS_CHIP_SHORT_SWITCH_DSPPWRON_RESETVAL (0x00000000u)

/*----DSPPWRON Tokens----*/
#define CSL_SYS_CHIP_SHORT_SWITCH_DSPPWRON_OFF (0x00000000u)
#define CSL_SYS_CHIP_SHORT_SWITCH_DSPPWRON_ON (0x00000001u)

#define CSL_SYS_CHIP_SHORT_SWITCH_RESETVAL (0x00000000u)

/* MSTPRI0 */

#define CSL_SYS_MSTPRI0_IMCOPP_MASK      (0x00070000u)
#define CSL_SYS_MSTPRI0_IMCOPP_SHIFT     (0x00000010u)
#define CSL_SYS_MSTPRI0_IMCOPP_RESETVAL  (0x00000005u)

#define CSL_SYS_MSTPRI0_GEM_CFGP_MASK    (0x00000700u)
#define CSL_SYS_MSTPRI0_GEM_CFGP_SHIFT   (0x00000008u)
#define CSL_SYS_MSTPRI0_GEM_CFGP_RESETVAL (0x00000001u)

#define CSL_SYS_MSTPRI0_ARM_CFGP_MASK    (0x00000070u)
#define CSL_SYS_MSTPRI0_ARM_CFGP_SHIFT   (0x00000004u)
#define CSL_SYS_MSTPRI0_ARM_CFGP_RESETVAL (0x00000001u)

#define CSL_SYS_MSTPRI0_ARM_DMAP_MASK    (0x00000007u)
#define CSL_SYS_MSTPRI0_ARM_DMAP_SHIFT   (0x00000000u)
#define CSL_SYS_MSTPRI0_ARM_DMAP_RESETVAL (0x00000001u)

#define CSL_SYS_MSTPRI0_RESETVAL         (0x00050111u)

/* MSTPRI1 */

#define CSL_SYS_MSTPRI1_HPIP_MASK        (0x00700000u)
#define CSL_SYS_MSTPRI1_HPIP_SHIFT       (0x00000014u)
#define CSL_SYS_MSTPRI1_HPIP_RESETVAL    (0x00000004u)

#define CSL_SYS_MSTPRI1_VLYNQP_MASK      (0x00070000u)
#define CSL_SYS_MSTPRI1_VLYNQP_SHIFT     (0x00000010u)
#define CSL_SYS_MSTPRI1_VLYNQP_RESETVAL  (0x00000004u)

#define CSL_SYS_MSTPRI1_ATAP_MASK        (0x00007000u)
#define CSL_SYS_MSTPRI1_ATAP_SHIFT       (0x0000000Cu)
#define CSL_SYS_MSTPRI1_ATAP_RESETVAL    (0x00000004u)

#define CSL_SYS_MSTPRI1_USBP_MASK        (0x00000700u)
#define CSL_SYS_MSTPRI1_USBP_SHIFT       (0x00000008u)
#define CSL_SYS_MSTPRI1_USBP_RESETVAL    (0x00000004u)

#define CSL_SYS_MSTPRI1_1394P_MASK       (0x00000070u)
#define CSL_SYS_MSTPRI1_1394P_SHIFT      (0x00000004u)
#define CSL_SYS_MSTPRI1_1394P_RESETVAL   (0x00000004u)

#define CSL_SYS_MSTPRI1_EMACP_MASK       (0x00000007u)
#define CSL_SYS_MSTPRI1_EMACP_SHIFT      (0x00000000u)
#define CSL_SYS_MSTPRI1_EMACP_RESETVAL   (0x00000004u)

#define CSL_SYS_MSTPRI1_RESETVAL         (0x00444444u)

/* VDD3P3V_PWRDN */

#define CSL_SYS_VDD3P3V_PWRDN_MS_IO_PWRDN_MASK (0x00000002u)
#define CSL_SYS_VDD3P3V_PWRDN_MS_IO_PWRDN_SHIFT (0x00000001u)
#define CSL_SYS_VDD3P3V_PWRDN_MS_IO_PWRDN_RESETVAL (0x00000000u)

/*----MS_IO_PWRDN Tokens----*/
#define CSL_SYS_VDD3P3V_PWRDN_MS_IO_PWRDN_NORMAL (0x00000000u)
#define CSL_SYS_VDD3P3V_PWRDN_MS_IO_PWRDN_PWRDN (0x00000001u)

#define CSL_SYS_VDD3P3V_PWRDN_EMAC_IO_PWRDN_MASK (0x00000001u)
#define CSL_SYS_VDD3P3V_PWRDN_EMAC_IO_PWRDN_SHIFT (0x00000000u)
#define CSL_SYS_VDD3P3V_PWRDN_EMAC_IO_PWRDN_RESETVAL (0x00000000u)

/*----EMAC_IO_PWRDN Tokens----*/
#define CSL_SYS_VDD3P3V_PWRDN_EMAC_IO_PWRDN_NORMAL (0x00000000u)
#define CSL_SYS_VDD3P3V_PWRDN_EMAC_IO_PWRDN_PWRDN (0x00000001u)

#define CSL_SYS_VDD3P3V_PWRDN_RESETVAL   (0x00000000u)

/* VPSS_CLK_CTRL */

#define CSL_SYS_VPSS_CLK_CTRL_CLK_DAC_EN_MASK (0x00000010u)
#define CSL_SYS_VPSS_CLK_CTRL_CLK_DAC_EN_SHIFT (0x00000004u)
#define CSL_SYS_VPSS_CLK_CTRL_CLK_DAC_EN_RESETVAL (0x00000000u)

/*----CLK_DAC_EN Tokens----*/
#define CSL_SYS_VPSS_CLK_CTRL_CLK_DAC_EN_DISABLE (0x00000000u)
#define CSL_SYS_VPSS_CLK_CTRL_CLK_DAC_EN_ENABLE (0x00000001u)

#define CSL_SYS_VPSS_CLK_CTRL_CLK_VENC_EN_MASK (0x00000008u)
#define CSL_SYS_VPSS_CLK_CTRL_CLK_VENC_EN_SHIFT (0x00000003u)
#define CSL_SYS_VPSS_CLK_CTRL_CLK_VENC_EN_RESETVAL (0x00000000u)

/*----CLK_VENC_EN Tokens----*/
#define CSL_SYS_VPSS_CLK_CTRL_CLK_VENC_EN_DISABLE (0x00000000u)
#define CSL_SYS_VPSS_CLK_CTRL_CLK_VENC_EN_ENABLE (0x00000001u)

#define CSL_SYS_VPSS_CLK_CTRL_PCLK_INV_MASK (0x00000004u)
#define CSL_SYS_VPSS_CLK_CTRL_PCLK_INV_SHIFT (0x00000002u)
#define CSL_SYS_VPSS_CLK_CTRL_PCLK_INV_RESETVAL (0x00000000u)

/*----PCLK_INV Tokens----*/
#define CSL_SYS_VPSS_CLK_CTRL_PCLK_INV_DISABLE (0x00000000u)
#define CSL_SYS_VPSS_CLK_CTRL_PCLK_INV_ENABLE (0x00000001u)

#define CSL_SYS_VPSS_CLK_CTRL_VPSS_MUXSEL_MASK (0x00000003u)
#define CSL_SYS_VPSS_CLK_CTRL_VPSS_MUXSEL_SHIFT (0x00000000u)
#define CSL_SYS_VPSS_CLK_CTRL_VPSS_MUXSEL_RESETVAL (0x00000000u)

/*----VPSS_MUXSEL Tokens----*/
#define CSL_SYS_VPSS_CLK_CTRL_VPSS_MUXSEL_27MHZ (0x00000000u)
#define CSL_SYS_VPSS_CLK_CTRL_VPSS_MUXSEL_54MHZ (0x00000001u)

#define CSL_SYS_VPSS_CLK_CTRL_RESETVAL   (0x00000000u)

/* PSC_LOCK_REG */

#define CSL_SYS_PSC_LOCK_REG_PSC_LOCK_MASK (0x00000001u)
#define CSL_SYS_PSC_LOCK_REG_PSC_LOCK_SHIFT (0x00000000u)
#define CSL_SYS_PSC_LOCK_REG_PSC_LOCK_RESETVAL (0x00000001u)

/*----PSC_LOCK Tokens----*/
#define CSL_SYS_PSC_LOCK_REG_PSC_LOCK_UNLOCKED (0x00000000u)
#define CSL_SYS_PSC_LOCK_REG_PSC_LOCK_LOCKED (0x00000001u)

#define CSL_SYS_PSC_LOCK_REG_RESETVAL    (0x00000001u)

/* SEC_SCAN_REG */

#define CSL_SYS_SEC_SCAN_REG_SEC_OV_REQ_MASK (0x00000010u)
#define CSL_SYS_SEC_SCAN_REG_SEC_OV_REQ_SHIFT (0x00000004u)
#define CSL_SYS_SEC_SCAN_REG_SEC_OV_REQ_RESETVAL (0x00000000u)

#define CSL_SYS_SEC_SCAN_REG_TEST_AS_SEC_SC_MASK (0x00000008u)
#define CSL_SYS_SEC_SCAN_REG_TEST_AS_SEC_SC_SHIFT (0x00000003u)
#define CSL_SYS_SEC_SCAN_REG_TEST_AS_SEC_SC_RESETVAL (0x00000000u)

#define CSL_SYS_SEC_SCAN_REG_DEVICE_TYPE_MASK (0x00000007u)
#define CSL_SYS_SEC_SCAN_REG_DEVICE_TYPE_SHIFT (0x00000000u)
#define CSL_SYS_SEC_SCAN_REG_DEVICE_TYPE_RESETVAL (0x00000000u)

/*----DEVICE_TYPE Tokens----*/
#define CSL_SYS_SEC_SCAN_REG_DEVICE_TYPE_TEST (0x00000000u)
#define CSL_SYS_SEC_SCAN_REG_DEVICE_TYPE_EMULATOR (0x00000001u)
#define CSL_SYS_SEC_SCAN_REG_DEVICE_TYPE_SECURE (0x00000002u)
#define CSL_SYS_SEC_SCAN_REG_DEVICE_TYPE_NON_SECURE (0x00000003u)
#define CSL_SYS_SEC_SCAN_REG_DEVICE_TYPE_BAD (0x00000004u)

#define CSL_SYS_SEC_SCAN_REG_RESETVAL    (0x00000000u)

/* SEC_TEST_REG */

#define CSL_SYS_SEC_TEST_REG_RWIR_MASK_EN_MASK (0x00000010u)
#define CSL_SYS_SEC_TEST_REG_RWIR_MASK_EN_SHIFT (0x00000004u)
#define CSL_SYS_SEC_TEST_REG_RWIR_MASK_EN_RESETVAL (0x00000000u)

/*----RWIR_MASK_EN Tokens----*/
#define CSL_SYS_SEC_TEST_REG_RWIR_MASK_EN_ICEPICK_IGNORED (0x00000001u)

#define CSL_SYS_SEC_TEST_REG_SEC_ROM_FAIL_MASK (0x00000008u)
#define CSL_SYS_SEC_TEST_REG_SEC_ROM_FAIL_SHIFT (0x00000003u)
#define CSL_SYS_SEC_TEST_REG_SEC_ROM_FAIL_RESETVAL (0x00000000u)

/*----SEC_ROM_FAIL Tokens----*/
#define CSL_SYS_SEC_TEST_REG_SEC_ROM_FAIL_SEC_ROM_FAILED (0x00000001u)

#define CSL_SYS_SEC_TEST_REG_SEC_ROM_DONE_MASK (0x00000004u)
#define CSL_SYS_SEC_TEST_REG_SEC_ROM_DONE_SHIFT (0x00000002u)
#define CSL_SYS_SEC_TEST_REG_SEC_ROM_DONE_RESETVAL (0x00000000u)

/*----SEC_ROM_DONE Tokens----*/
#define CSL_SYS_SEC_TEST_REG_SEC_ROM_DONE_SEC_SETUP_DONE (0x00000001u)

#define CSL_SYS_SEC_TEST_REG_TEST_AS_SEC_MASK (0x00000002u)
#define CSL_SYS_SEC_TEST_REG_TEST_AS_SEC_SHIFT (0x00000001u)
#define CSL_SYS_SEC_TEST_REG_TEST_AS_SEC_RESETVAL (0x00000000u)

#define CSL_SYS_SEC_TEST_REG_SEC_OV_MASK (0x00000001u)
#define CSL_SYS_SEC_TEST_REG_SEC_OV_SHIFT (0x00000000u)
#define CSL_SYS_SEC_TEST_REG_SEC_OV_RESETVAL (0x00000000u)

#define CSL_SYS_SEC_TEST_REG_RESETVAL    (0x00000000u)

/* SEC_TAP_CTL */

#define CSL_SYS_SEC_TAP_CTL_TEST_TAP_EN_MASK (0xFFFF0000u)
#define CSL_SYS_SEC_TAP_CTL_TEST_TAP_EN_SHIFT (0x00000010u)
#define CSL_SYS_SEC_TAP_CTL_TEST_TAP_EN_RESETVAL (0x0000FFFFu)

#define CSL_SYS_SEC_TAP_CTL_EMU_TAP_EN_MASK (0x0000FFFFu)
#define CSL_SYS_SEC_TAP_CTL_EMU_TAP_EN_SHIFT (0x00000000u)
#define CSL_SYS_SEC_TAP_CTL_EMU_TAP_EN_RESETVAL (0x0000FFFFu)

#define CSL_SYS_SEC_TAP_CTL_RESETVAL     (0xFFFFFFFFu)

/* PUBLIC_KEY0 */

#define CSL_SYS_PUBLIC_KEY0_PUBLIC_KEY0_MASK (0xFFFFFFFFu)
#define CSL_SYS_PUBLIC_KEY0_PUBLIC_KEY0_SHIFT (0x00000000u)
#define CSL_SYS_PUBLIC_KEY0_PUBLIC_KEY0_RESETVAL (0x00000000u)

#define CSL_SYS_PUBLIC_KEY0_RESETVAL     (0x00000000u)

/* PUBLIC_KEY1 */

#define CSL_SYS_PUBLIC_KEY1_PUBLIC_KEY1_MASK (0xFFFFFFFFu)
#define CSL_SYS_PUBLIC_KEY1_PUBLIC_KEY1_SHIFT (0x00000000u)
#define CSL_SYS_PUBLIC_KEY1_PUBLIC_KEY1_RESETVAL (0x00000000u)

#define CSL_SYS_PUBLIC_KEY1_RESETVAL     (0x00000000u)

/* PUBLIC_KEY2 */

#define CSL_SYS_PUBLIC_KEY2_PUBLIC_KEY2_MASK (0xFFFFFFFFu)
#define CSL_SYS_PUBLIC_KEY2_PUBLIC_KEY2_SHIFT (0x00000000u)
#define CSL_SYS_PUBLIC_KEY2_PUBLIC_KEY2_RESETVAL (0x00000000u)

#define CSL_SYS_PUBLIC_KEY2_RESETVAL     (0x00000000u)

/* PUBLIC_KEY3 */

#define CSL_SYS_PUBLIC_KEY3_PUBLIC_KEY3_MASK (0xFFFFFFFFu)
#define CSL_SYS_PUBLIC_KEY3_PUBLIC_KEY3_SHIFT (0x00000000u)
#define CSL_SYS_PUBLIC_KEY3_PUBLIC_KEY3_RESETVAL (0x00000000u)

#define CSL_SYS_PUBLIC_KEY3_RESETVAL     (0x00000000u)

#endif