cslr_edmacc.h

ccs下对dm6446的测试程序

#define CSL_EDMACC_EMCR_E28_SHIFT        (0x0000001Cu)
#define CSL_EDMACC_EMCR_E28_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E27_MASK         (0x08000000u)
#define CSL_EDMACC_EMCR_E27_SHIFT        (0x0000001Bu)
#define CSL_EDMACC_EMCR_E27_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E26_MASK         (0x04000000u)
#define CSL_EDMACC_EMCR_E26_SHIFT        (0x0000001Au)
#define CSL_EDMACC_EMCR_E26_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E25_MASK         (0x02000000u)
#define CSL_EDMACC_EMCR_E25_SHIFT        (0x00000019u)
#define CSL_EDMACC_EMCR_E25_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E24_MASK         (0x01000000u)
#define CSL_EDMACC_EMCR_E24_SHIFT        (0x00000018u)
#define CSL_EDMACC_EMCR_E24_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E23_MASK         (0x00800000u)
#define CSL_EDMACC_EMCR_E23_SHIFT        (0x00000017u)
#define CSL_EDMACC_EMCR_E23_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E22_MASK         (0x00400000u)
#define CSL_EDMACC_EMCR_E22_SHIFT        (0x00000016u)
#define CSL_EDMACC_EMCR_E22_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E21_MASK         (0x00200000u)
#define CSL_EDMACC_EMCR_E21_SHIFT        (0x00000015u)
#define CSL_EDMACC_EMCR_E21_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E20_MASK         (0x00100000u)
#define CSL_EDMACC_EMCR_E20_SHIFT        (0x00000014u)
#define CSL_EDMACC_EMCR_E20_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E19_MASK         (0x00080000u)
#define CSL_EDMACC_EMCR_E19_SHIFT        (0x00000013u)
#define CSL_EDMACC_EMCR_E19_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E18_MASK         (0x00040000u)
#define CSL_EDMACC_EMCR_E18_SHIFT        (0x00000012u)
#define CSL_EDMACC_EMCR_E18_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E17_MASK         (0x00020000u)
#define CSL_EDMACC_EMCR_E17_SHIFT        (0x00000011u)
#define CSL_EDMACC_EMCR_E17_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E16_MASK         (0x00010000u)
#define CSL_EDMACC_EMCR_E16_SHIFT        (0x00000010u)
#define CSL_EDMACC_EMCR_E16_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E15_MASK         (0x00008000u)
#define CSL_EDMACC_EMCR_E15_SHIFT        (0x0000000Fu)
#define CSL_EDMACC_EMCR_E15_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E14_MASK         (0x00004000u)
#define CSL_EDMACC_EMCR_E14_SHIFT        (0x0000000Eu)
#define CSL_EDMACC_EMCR_E14_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E13_MASK         (0x00002000u)
#define CSL_EDMACC_EMCR_E13_SHIFT        (0x0000000Du)
#define CSL_EDMACC_EMCR_E13_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E12_MASK         (0x00001000u)
#define CSL_EDMACC_EMCR_E12_SHIFT        (0x0000000Cu)
#define CSL_EDMACC_EMCR_E12_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E11_MASK         (0x00000800u)
#define CSL_EDMACC_EMCR_E11_SHIFT        (0x0000000Bu)
#define CSL_EDMACC_EMCR_E11_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E10_MASK         (0x00000400u)
#define CSL_EDMACC_EMCR_E10_SHIFT        (0x0000000Au)
#define CSL_EDMACC_EMCR_E10_RESETVAL     (0x00000000u)

#define CSL_EDMACC_EMCR_E9_MASK          (0x00000200u)
#define CSL_EDMACC_EMCR_E9_SHIFT         (0x00000009u)
#define CSL_EDMACC_EMCR_E9_RESETVAL      (0x00000000u)

#define CSL_EDMACC_EMCR_E8_MASK          (0x00000100u)
#define CSL_EDMACC_EMCR_E8_SHIFT         (0x00000008u)
#define CSL_EDMACC_EMCR_E8_RESETVAL      (0x00000000u)

#define CSL_EDMACC_EMCR_E7_MASK          (0x00000080u)
#define CSL_EDMACC_EMCR_E7_SHIFT         (0x00000007u)
#define CSL_EDMACC_EMCR_E7_RESETVAL      (0x00000000u)

#define CSL_EDMACC_EMCR_E6_MASK          (0x00000040u)
#define CSL_EDMACC_EMCR_E6_SHIFT         (0x00000006u)
#define CSL_EDMACC_EMCR_E6_RESETVAL      (0x00000000u)

#define CSL_EDMACC_EMCR_E5_MASK          (0x00000020u)
#define CSL_EDMACC_EMCR_E5_SHIFT         (0x00000005u)
#define CSL_EDMACC_EMCR_E5_RESETVAL      (0x00000000u)

#define CSL_EDMACC_EMCR_E4_MASK          (0x00000010u)
#define CSL_EDMACC_EMCR_E4_SHIFT         (0x00000004u)
#define CSL_EDMACC_EMCR_E4_RESETVAL      (0x00000000u)

#define CSL_EDMACC_EMCR_E3_MASK          (0x00000008u)
#define CSL_EDMACC_EMCR_E3_SHIFT         (0x00000003u)
#define CSL_EDMACC_EMCR_E3_RESETVAL      (0x00000000u)

#define CSL_EDMACC_EMCR_E2_MASK          (0x00000004u)
#define CSL_EDMACC_EMCR_E2_SHIFT         (0x00000002u)
#define CSL_EDMACC_EMCR_E2_RESETVAL      (0x00000000u)

#define CSL_EDMACC_EMCR_E1_MASK          (0x00000002u)
#define CSL_EDMACC_EMCR_E1_SHIFT         (0x00000001u)
#define CSL_EDMACC_EMCR_E1_RESETVAL      (0x00000000u)

#define CSL_EDMACC_EMCR_E0_MASK          (0x00000001u)
#define CSL_EDMACC_EMCR_E0_SHIFT         (0x00000000u)
#define CSL_EDMACC_EMCR_E0_RESETVAL      (0x00000000u)

#define CSL_EDMACC_EMCR_RESETVAL         (0x00000000u)

/* EMCRH */

#define CSL_EDMACC_EMCRH_E63_MASK        (0x80000000u)
#define CSL_EDMACC_EMCRH_E63_SHIFT       (0x0000001Fu)
#define CSL_EDMACC_EMCRH_E63_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E62_MASK        (0x40000000u)
#define CSL_EDMACC_EMCRH_E62_SHIFT       (0x0000001Eu)
#define CSL_EDMACC_EMCRH_E62_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E61_MASK        (0x20000000u)
#define CSL_EDMACC_EMCRH_E61_SHIFT       (0x0000001Du)
#define CSL_EDMACC_EMCRH_E61_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E60_MASK        (0x10000000u)
#define CSL_EDMACC_EMCRH_E60_SHIFT       (0x0000001Cu)
#define CSL_EDMACC_EMCRH_E60_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E59_MASK        (0x08000000u)
#define CSL_EDMACC_EMCRH_E59_SHIFT       (0x0000001Bu)
#define CSL_EDMACC_EMCRH_E59_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E58_MASK        (0x04000000u)
#define CSL_EDMACC_EMCRH_E58_SHIFT       (0x0000001Au)
#define CSL_EDMACC_EMCRH_E58_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E57_MASK        (0x02000000u)
#define CSL_EDMACC_EMCRH_E57_SHIFT       (0x00000019u)
#define CSL_EDMACC_EMCRH_E57_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E56_MASK        (0x01000000u)
#define CSL_EDMACC_EMCRH_E56_SHIFT       (0x00000018u)
#define CSL_EDMACC_EMCRH_E56_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E55_MASK        (0x00800000u)
#define CSL_EDMACC_EMCRH_E55_SHIFT       (0x00000017u)
#define CSL_EDMACC_EMCRH_E55_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E54_MASK        (0x00400000u)
#define CSL_EDMACC_EMCRH_E54_SHIFT       (0x00000016u)
#define CSL_EDMACC_EMCRH_E54_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E53_MASK        (0x00200000u)
#define CSL_EDMACC_EMCRH_E53_SHIFT       (0x00000015u)
#define CSL_EDMACC_EMCRH_E53_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E52_MASK        (0x00100000u)
#define CSL_EDMACC_EMCRH_E52_SHIFT       (0x00000014u)
#define CSL_EDMACC_EMCRH_E52_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E51_MASK        (0x00080000u)
#define CSL_EDMACC_EMCRH_E51_SHIFT       (0x00000013u)
#define CSL_EDMACC_EMCRH_E51_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E50_MASK        (0x00040000u)
#define CSL_EDMACC_EMCRH_E50_SHIFT       (0x00000012u)
#define CSL_EDMACC_EMCRH_E50_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E49_MASK        (0x00020000u)
#define CSL_EDMACC_EMCRH_E49_SHIFT       (0x00000011u)
#define CSL_EDMACC_EMCRH_E49_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E48_MASK        (0x00010000u)
#define CSL_EDMACC_EMCRH_E48_SHIFT       (0x00000010u)
#define CSL_EDMACC_EMCRH_E48_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E47_MASK        (0x00008000u)
#define CSL_EDMACC_EMCRH_E47_SHIFT       (0x0000000Fu)
#define CSL_EDMACC_EMCRH_E47_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E46_MASK        (0x00004000u)
#define CSL_EDMACC_EMCRH_E46_SHIFT       (0x0000000Eu)
#define CSL_EDMACC_EMCRH_E46_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E45_MASK        (0x00002000u)
#define CSL_EDMACC_EMCRH_E45_SHIFT       (0x0000000Du)
#define CSL_EDMACC_EMCRH_E45_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E44_MASK        (0x00001000u)
#define CSL_EDMACC_EMCRH_E44_SHIFT       (0x0000000Cu)
#define CSL_EDMACC_EMCRH_E44_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E43_MASK        (0x00000800u)
#define CSL_EDMACC_EMCRH_E43_SHIFT       (0x0000000Bu)
#define CSL_EDMACC_EMCRH_E43_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E42_MASK        (0x00000400u)
#define CSL_EDMACC_EMCRH_E42_SHIFT       (0x0000000Au)
#define CSL_EDMACC_EMCRH_E42_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E41_MASK        (0x00000200u)
#define CSL_EDMACC_EMCRH_E41_SHIFT       (0x00000009u)
#define CSL_EDMACC_EMCRH_E41_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E40_MASK        (0x00000100u)
#define CSL_EDMACC_EMCRH_E40_SHIFT       (0x00000008u)
#define CSL_EDMACC_EMCRH_E40_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E39_MASK        (0x00000080u)
#define CSL_EDMACC_EMCRH_E39_SHIFT       (0x00000007u)
#define CSL_EDMACC_EMCRH_E39_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E38_MASK        (0x00000040u)
#define CSL_EDMACC_EMCRH_E38_SHIFT       (0x00000006u)
#define CSL_EDMACC_EMCRH_E38_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E37_MASK        (0x00000020u)
#define CSL_EDMACC_EMCRH_E37_SHIFT       (0x00000005u)
#define CSL_EDMACC_EMCRH_E37_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E36_MASK        (0x00000010u)
#define CSL_EDMACC_EMCRH_E36_SHIFT       (0x00000004u)
#define CSL_EDMACC_EMCRH_E36_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E35_MASK        (0x00000008u)
#define CSL_EDMACC_EMCRH_E35_SHIFT       (0x00000003u)
#define CSL_EDMACC_EMCRH_E35_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E34_MASK        (0x00000004u)
#define CSL_EDMACC_EMCRH_E34_SHIFT       (0x00000002u)
#define CSL_EDMACC_EMCRH_E34_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E33_MASK        (0x00000002u)
#define CSL_EDMACC_EMCRH_E33_SHIFT       (0x00000001u)
#define CSL_EDMACC_EMCRH_E33_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_E32_MASK        (0x00000001u)
#define CSL_EDMACC_EMCRH_E32_SHIFT       (0x00000000u)
#define CSL_EDMACC_EMCRH_E32_RESETVAL    (0x00000000u)

#define CSL_EDMACC_EMCRH_RESETVAL        (0x00000000u)

/* QEMR */

#define CSL_EDMACC_QEMR_E7_MASK          (0x00000080u)
#define CSL_EDMACC_QEMR_E7_SHIFT         (0x00000007u)
#define CSL_EDMACC_QEMR_E7_RESETVAL      (0x00000000u)

#define CSL_EDMACC_QEMR_E6_MASK          (0x00000040u)
#define CSL_EDMACC_QEMR_E6_SHIFT         (0x00000006u)
#define CSL_EDMACC_QEMR_E6_RESETVAL      (0x00000000u)

#define CSL_EDMACC_QEMR_E5_MASK          (0x00000020u)
#define CSL_EDMACC_QEMR_E5_SHIFT         (0x00000005u)
#define CSL_EDMACC_QEMR_E5_RESETVAL      (0x00000000u)

#define CSL_EDMACC_QEMR_E4_MASK          (0x00000010u)
#define CSL_EDMACC_QEMR_E4_SHIFT         (0x00000004u)
#define CSL_EDMACC_QEMR_E4_RESETVAL      (0x00000000u)

#define CSL_EDMACC_QEMR_E3_MASK          (0x00000008u)
#define CSL_EDMACC_QEMR_E3_SHIFT         (0x00000003u)
#define CSL_EDMACC_QEMR_E3_RESETVAL      (0x00000000u)

#define CSL_EDMACC_QEMR_E2_MASK          (0x00000004u)
#define CSL_EDMACC_QEMR_E2_SHIFT         (0x00000002u)
#define CSL_EDMACC_QEMR_E2_RESETVAL      (0x00000000u)

#define CSL_EDMACC_QEMR_E1_MASK          (0x00000002u)
#define CSL_EDMACC_QEMR_E1_SHIFT         (0x00000001u)
#define CSL_EDMACC_QEMR_E1_RESETVAL      (0x00000000u)

#define CSL_EDMACC_QEMR_E0_MASK          (0x00000001u)
#define CSL_EDMACC_QEMR_E0_SHIFT         (0x00000000u)
#define CSL_EDMACC_QEMR_E0_RESETVAL      (0x00000000u)

#define CSL_EDMACC_QEMR_RESETVAL         (0x00000000u)

/* QEMCR */

#define CSL_EDMACC_QEMCR_E7_MASK         (0x00000080u)
#define CSL_EDMACC_QEMCR_E7_SHIFT        (0x00000007u)
#define CSL_EDMACC_QEMCR_E7_RESETVAL     (0x00000000u)

#define CSL_EDMACC_QEMCR_E6_MASK         (0x00000040u)
#define CSL_EDMACC_QEMCR_E6_SHIFT        (0x00000006u)
#define CSL_EDMACC_QEMCR_E6_RESETVAL     (0x00000000u)

#define CSL_EDMACC_QEMCR_E5_MASK         (0x00000020u)
#define CSL_EDMACC_QEMCR_E5_SHIFT        (0x00000005u)
#define CSL_EDMACC_QEMCR_E5_RESETVAL     (0x00000000u)

#define CSL_EDMACC_QEMCR_E4_MASK         (0x00000010u)
#define CSL_EDMACC_QEMCR_E4_SHIFT        (0x00000004u)
#define CSL_EDMACC_QEMCR_E4_RESETVAL     (0x00000000u)

#define CSL_EDMACC_QEMCR_E3_MASK         (0x00000008u)
#define CSL_EDMACC_QEMCR_E3_SHIFT        (0x00000003u)
#define CSL_EDMACC_QEMCR_E3_RESETVAL     (0x00000000u)

#define CSL_EDMACC_QEMCR_E2_MASK         (0x00000004u)
#define CSL_EDMACC_QEMCR_E2_SHIFT        (0x00000002u)
#define CSL_EDMACC_QEMCR_E2_RESETVAL     (0x00000000u)

#define CSL_EDMACC_QEMCR_E1_MASK         (0x00000002u)
#define CSL_EDMACC_QEMCR_E1_SHIFT        (0x00000001u)
#define CSL_EDMACC_QEMCR_E1_RESETVAL     (0x00000000u)

#define CSL_EDMACC_QEMCR_E0_MASK         (0x00000001u)
#define CSL_EDMACC_QEMCR_E0_SHIFT        (0x00000000u)
#define CSL_EDMACC_QEMCR_E0_RESETVAL     (0x00000000u)

#define CSL_EDMACC_QEMCR_RESETVAL        (0x00000000u)

/* CCERR */

#define CSL_EDMACC_CCERR_TCCERR_MASK     (0x00010000u)
#define CSL_EDMACC_CCERR_TCCERR_SHIFT    (0x00000010u)
#define CSL_EDMACC_CCERR_TCCERR_RESETVAL (0x00000000u)

#define CSL_EDMACC_CCERR_QTHRXCD1_MASK   (0x00000002u)
#define CSL_EDMACC_CCERR_QTHRXCD1_SHIFT  (0x00000001u)
#define CSL_EDMACC_CCERR_QTHRXCD1_RESETVAL (0x00000000u)

#define CSL_EDMACC_CCERR_QTHRXCD0_MASK   (0x00000001u)
#define CSL_EDMACC_CCERR_QTHRXCD0_SHIFT  (0x00000000u)