📄 hal_nrf_l01.lst
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C51 COMPILER V8.08 HAL_NRF_L01 01/02/2009 11:50:57 PAGE 1
C51 COMPILER V8.08, COMPILATION OF MODULE HAL_NRF_L01
OBJECT MODULE PLACED IN .\obj\hal_nrf_l01.obj
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE ..\..\..\arch\hal\nrf24l01\hal_nrf_l01.c LARGE OMF2 OPTIMIZE(9,SPEED) BROWS
-E INCDIR(l01_bfb;..\..\..\arch\hal\include) DEFINE(nRF24L01__) DEBUG PRINT(.\lst\hal_nrf_l01.lst) OBJECT(.\obj\hal_nrf_l
-01.obj)
line level source
1 /* Copyright (c) 2007 Nordic Semiconductor. All Rights Reserved.
2 *
3 * The information contained herein is property of Nordic Semiconductor ASA.
4 * Terms and conditions of usage are described in detail in NORDIC
5 * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
6 *
7 * Licensees are granted free, non-transferable use of the information. NO
8 * WARRENTY of ANY KIND is provided. This heading must NOT be removed from
9 * the file.
10 *
11 * $LastChangedRevision: 2132 $
12 */
13
14 /** @file
15 *
16 * @author Runar Kjellhaug
17 *
18 */
19
20 #include <stdint.h>
21 #include <stdbool.h>
22
23 #include "nordic_common.h"
24 #include "hal_nrf.h"
25
26 #define SET_BIT(pos) ((uint8_t) (1<<( (uint8_t) (pos) )))
27 #define UINT8(t) ((uint8_t) (t))
28
29 void hal_nrf_set_irq_mode(hal_nrf_irq_source_t int_source, bool irq_state)
30 {
31 1 if(irq_state)
32 1 {
33 2 hal_nrf_write_reg(CONFIG, hal_nrf_read_reg(CONFIG) & ~SET_BIT(int_source));
34 2 }
35 1 else
36 1 {
37 2 hal_nrf_write_reg(CONFIG, hal_nrf_read_reg(CONFIG) | SET_BIT(int_source));
38 2 }
39 1 }
40
41 uint8_t hal_nrf_get_clear_irq_flags(void)
42 {
43 1 return hal_nrf_write_reg(STATUS, (BIT_6|BIT_5|BIT_4)) & (BIT_6|BIT_5|BIT_4);
44 1 }
45
46 void hal_nrf_clear_irq_flag(hal_nrf_irq_source_t int_source)
47 {
48 1 hal_nrf_write_reg(STATUS, SET_BIT(int_source));
49 1 }
50
51 bool hal_nrf_get_irq_mode(uint8_t int_type)
52 {
53 1 if(hal_nrf_read_reg(CONFIG) & SET_BIT(int_type))
C51 COMPILER V8.08 HAL_NRF_L01 01/02/2009 11:50:57 PAGE 2
54 1 return false;
55 1 else
56 1 return true;
57 1 }
58
59 uint8_t hal_nrf_get_irq_flags(void)
60 {
61 1 return hal_nrf_nop() & (BIT_6|BIT_5|BIT_4);
62 1 }
63
64 void hal_nrf_set_crc_mode(hal_nrf_crc_mode_t crc_mode)
65 {
66 1 hal_nrf_write_reg(CONFIG, (hal_nrf_read_reg(CONFIG) & ~(BIT_3|BIT_2)) | (UINT8(crc_mode)<<2));
67 1 }
68
69 void hal_nrf_open_pipe(hal_nrf_address_t pipe_num, bool auto_ack)
70 {
71 1 switch(pipe_num)
72 1 {
73 2 case HAL_NRF_PIPE0:
74 2 case HAL_NRF_PIPE1:
75 2 case HAL_NRF_PIPE2:
76 2 case HAL_NRF_PIPE3:
77 2 case HAL_NRF_PIPE4:
78 2 case HAL_NRF_PIPE5:
79 2 hal_nrf_write_reg(EN_RXADDR, hal_nrf_read_reg(EN_RXADDR) | SET_BIT(pipe_num));
80 2
81 2 if(auto_ack)
82 2 hal_nrf_write_reg(EN_AA, hal_nrf_read_reg(EN_AA) | SET_BIT(pipe_num));
83 2 else
84 2 hal_nrf_write_reg(EN_AA, hal_nrf_read_reg(EN_AA) & ~SET_BIT(pipe_num));
85 2 break;
86 2
87 2 case HAL_NRF_ALL:
88 2 hal_nrf_write_reg(EN_RXADDR, ~(BIT_7|BIT_6));
89 2
90 2 if(auto_ack)
91 2 hal_nrf_write_reg(EN_AA, ~(BIT_7|BIT_6));
92 2 else
93 2 hal_nrf_write_reg(EN_AA, 0);
94 2 break;
95 2
96 2 default:
97 2 break;
98 2 }
99 1 }
100
101 void hal_nrf_close_pipe(hal_nrf_address_t pipe_num)
102 {
103 1 switch(pipe_num)
104 1 {
105 2 case HAL_NRF_PIPE0:
106 2 case HAL_NRF_PIPE1:
107 2 case HAL_NRF_PIPE2:
108 2 case HAL_NRF_PIPE3:
109 2 case HAL_NRF_PIPE4:
110 2 case HAL_NRF_PIPE5:
111 2 hal_nrf_write_reg(EN_RXADDR, hal_nrf_read_reg(EN_RXADDR) & ~SET_BIT(pipe_num));
112 2 hal_nrf_write_reg(EN_AA, hal_nrf_read_reg(EN_AA) & ~SET_BIT(pipe_num));
113 2 break;
114 2
115 2 case HAL_NRF_ALL:
C51 COMPILER V8.08 HAL_NRF_L01 01/02/2009 11:50:57 PAGE 3
116 2 hal_nrf_write_reg(EN_RXADDR, 0);
117 2 hal_nrf_write_reg(EN_AA, 0);
118 2 break;
119 2
120 2 default:
121 2 break;
122 2 }
123 1 }
124
125 void hal_nrf_set_address(hal_nrf_address_t address, uint8_t *addr)
126 {
127 1 switch(address)
128 1 {
129 2 case HAL_NRF_TX:
130 2 case HAL_NRF_PIPE0:
131 2 case HAL_NRF_PIPE1:
132 2 hal_nrf_write_multibyte_reg((uint8_t) address, addr, 0);
133 2 break;
134 2
135 2 case HAL_NRF_PIPE2:
136 2 case HAL_NRF_PIPE3:
137 2 case HAL_NRF_PIPE4:
138 2 case HAL_NRF_PIPE5:
139 2 hal_nrf_write_reg(RX_ADDR_P0 + (uint8_t) address, *addr);
140 2 break;
141 2
142 2 default:
143 2 break;
144 2 }
145 1 }
146
147 void hal_nrf_set_auto_retr(uint8_t retr, uint16_t delay)
148 {
149 1 hal_nrf_write_reg(SETUP_RETR, (((delay/250)-1)<<4) | retr);
150 1 }
151
152 void hal_nrf_set_address_width(hal_nrf_address_width_t address_width)
153 {
154 1 hal_nrf_write_reg(SETUP_AW, (UINT8(address_width) - 2));
155 1 }
156
157 void hal_nrf_set_rx_pload_width(uint8_t pipe_num, uint8_t pload_width)
158 {
159 1 hal_nrf_write_reg(RX_PW_P0 + pipe_num, pload_width);
160 1 }
161
162 uint8_t hal_nrf_get_crc_mode(void)
163 {
164 1 return (hal_nrf_read_reg(CONFIG) & (BIT_3|BIT_2)) >> CRCO;
165 1 }
166
167 uint8_t hal_nrf_get_pipe_status(uint8_t pipe_num)
168 {
169 1 uint8_t en_rx, en_aa;
170 1
171 1 en_rx = hal_nrf_read_reg(EN_RXADDR) & (1<<pipe_num);
172 1 en_aa = hal_nrf_read_reg(EN_AA) & (1<<pipe_num);
173 1
174 1 en_rx >>= pipe_num;
175 1 en_aa >>= pipe_num;
176 1
177 1 return (en_aa << 1) + en_rx;
C51 COMPILER V8.08 HAL_NRF_L01 01/02/2009 11:50:57 PAGE 4
178 1 }
179
180 uint8_t hal_nrf_get_address(uint8_t address, uint8_t *addr)
181 {
182 1 switch(address)
183 1 {
184 2 case HAL_NRF_PIPE0:
185 2 case HAL_NRF_PIPE1:
186 2 case HAL_NRF_TX:
187 2 return hal_nrf_read_multibyte_reg(address, addr);
188 2
189 2 default:
190 2 *addr = hal_nrf_read_reg(RX_ADDR_P0 + address);
191 2 return hal_nrf_get_address_width();
192 2 }
193 1 }
194
195 uint8_t hal_nrf_get_auto_retr_status(void)
196 {
197 1 return hal_nrf_read_reg(OBSERVE_TX);
198 1 }
199
200 uint8_t hal_nrf_get_packet_lost_ctr(void)
201 {
202 1 return (hal_nrf_read_reg(OBSERVE_TX) & (BIT_7|BIT_6|BIT_5|BIT_4)) >> 4;
203 1 }
204
205 uint8_t hal_nrf_get_address_width(void)
206 {
207 1 return (hal_nrf_read_reg(SETUP_AW) + 2);
208 1 }
209
210 uint8_t hal_nrf_get_rx_pload_width(uint8_t pipe_num)
211 {
212 1 return hal_nrf_read_reg(RX_PW_P0 + pipe_num);
213 1 }
214
215 void hal_nrf_set_operation_mode(hal_nrf_operation_mode_t op_mode)
216 {
217 1 if(op_mode == HAL_NRF_PRX)
218 1 {
219 2 hal_nrf_write_reg(CONFIG, (hal_nrf_read_reg(CONFIG) | (1<<PRIM_RX)));
220 2 }
221 1 else
222 1 {
223 2 hal_nrf_write_reg(CONFIG, (hal_nrf_read_reg(CONFIG) & ~(1<<PRIM_RX)));
224 2 }
225 1 }
226
227 void hal_nrf_set_power_mode(hal_nrf_pwr_mode_t pwr_mode)
228 {
229 1 if(pwr_mode == HAL_NRF_PWR_UP)
230 1 {
231 2 hal_nrf_write_reg(CONFIG, (hal_nrf_read_reg(CONFIG) | (1<<PWR_UP)));
232 2 }
233 1 else
234 1 {
235 2 hal_nrf_write_reg(CONFIG, (hal_nrf_read_reg(CONFIG) & ~(1<<PWR_UP)));
236 2 }
237 1 }
238
239 void hal_nrf_set_rf_channel(uint8_t channel)
C51 COMPILER V8.08 HAL_NRF_L01 01/02/2009 11:50:57 PAGE 5
240 {
241 1 hal_nrf_write_reg(RF_CH, channel);
242 1 }
243
244 void hal_nrf_set_output_power(hal_nrf_output_power_t power)
245 {
246 1 hal_nrf_write_reg(RF_SETUP, (hal_nrf_read_reg(RF_SETUP) & ~((1<<RF_PWR1)|(1<<RF_PWR0))) | (UINT8(power)<
-<1));
247 1 }
248
249 void hal_nrf_set_datarate(hal_nrf_datarate_t datarate)
250 {
251 1 if(datarate == HAL_NRF_1MBPS)
252 1 {
253 2 hal_nrf_write_reg(RF_SETUP, (hal_nrf_read_reg(RF_SETUP) & ~(1<<RF_DR)));
254 2 }
255 1 else
256 1 {
257 2 hal_nrf_write_reg(RF_SETUP, (hal_nrf_read_reg(RF_SETUP) | (1<<RF_DR)));
258 2 }
259 1 }
260
261 uint8_t hal_nrf_get_operation_mode(void)
262 {
263 1 return (hal_nrf_read_reg(CONFIG) & (1<<PRIM_RX)) >> PRIM_RX;
264 1 }
265
266 uint8_t hal_nrf_get_power_mode(void)
267 {
268 1 return (hal_nrf_read_reg(CONFIG) & (1<<PWR_UP)) >> PWR_UP;
269 1 }
270
271 uint8_t hal_nrf_get_rf_channel(void)
272 {
273 1 return hal_nrf_read_reg(RF_CH);
274 1 }
275
276 uint8_t hal_nrf_get_output_power(void)
277 {
278 1 return (hal_nrf_read_reg(RF_SETUP) & ((1<<RF_PWR1)|(1<<RF_PWR0))) >> RF_PWR0;
279 1 }
280
281 uint8_t hal_nrf_get_datarate(void)
282 {
283 1 return (hal_nrf_read_reg(RF_SETUP) & (1<<RF_DR)) >> RF_DR;
284 1 }
285
286 bool hal_nrf_rx_fifo_empty(void)
287 {
288 1 if(hal_nrf_get_rx_data_source()==7)
289 1 {
290 2 return true;
291 2 }
292 1 else
293 1 {
294 2 return false;
295 2 }
296 1 }
297
298 bool hal_nrf_rx_fifo_full(void)
299 {
300 1 return (bool)((hal_nrf_read_reg(FIFO_STATUS) >> RX_EMPTY) & 1);
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