📄 cout40.fit
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-- MAX+plus II Compiler Fit File
-- Version 10.12 09/21/2001
-- Compiled: 11/23/2007 13:22:01
-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "cout40"
BEGIN
DEVICE = "EPM7032SLC44-5";
"CLK" : INPUT_PIN = 43 ;
"DIRCH" : INPUT_PIN = 4 ; -- LC1
"ADDRESS0" : OUTPUT_PIN = 24 ; -- LC32
"ADDRESS1" : OUTPUT_PIN = 33 ; -- LC24
"ADDRESS2" : OUTPUT_PIN = 27 ; -- LC29
"ADDRESS3" : OUTPUT_PIN = 6 ; -- LC3
"AD0" : OUTPUT_PIN = 26 ; -- LC30
"AD1" : OUTPUT_PIN = 25 ; -- LC31
"AD2" : OUTPUT_PIN = 11 ; -- LC7
"|LPM_ADD_SUB:120|addcore:adder|addcore:adder0|result_node1" : LOCATION = LC17 ; -- PIN 41
"|LPM_ADD_SUB:120|addcore:adder|addcore:adder0|result_node2" : LOCATION = LC2 ; -- PIN 5
"|LPM_ADD_SUB:120|addcore:adder|addcore:adder0|result_node3" : LOCATION = LC8 ; -- PIN 12
"|LPM_ADD_SUB:147|addcore:adder|addcore:adder0|result_node1" : LOCATION = LC20 ; -- PIN 38
"|LPM_ADD_SUB:147|addcore:adder|addcore:adder0|result_node2" : LOCATION = LC28 ; -- PIN 28
"|LPM_ADD_SUB:186|addcore:adder|addcore:adder0|result_node1" : LOCATION = LC18 ; -- PIN 40
"|LPM_ADD_SUB:186|addcore:adder|addcore:adder0|result_node2" : LOCATION = LC1 ; -- PIN 4
"|LPM_ADD_SUB:186|addcore:adder|addcore:adder0|result_node3" : LOCATION = LC6 ; -- PIN 9
"|LPM_ADD_SUB:213|addcore:adder|addcore:adder0|result_node1" : LOCATION = LC23 ; -- PIN 34
"|LPM_ADD_SUB:213|addcore:adder|addcore:adder0|result_node2" : LOCATION = LC22 ; -- PIN 36
":23" : LOCATION = LC5 ; -- PIN 8 -- addr_temp3
":24" : LOCATION = LC27 ; -- PIN 29 -- addr_temp2
":25" : LOCATION = LC19 ; -- PIN 39 -- addr_temp1
":26" : LOCATION = LC21 ; -- PIN 37 -- addr_temp0
":27" : LOCATION = LC4 ; -- PIN 7 -- add_temp2
":28" : LOCATION = LC25 ; -- PIN 32 -- add_temp1
":29" : LOCATION = LC26 ; -- PIN 31 -- add_temp0
END;
INTERNAL_INFO "cout40"
BEGIN
DEVICE = EPM7032SLC44-5;
LC7 : LORAX = "G28R0";
LC31 : LORAX = "G57R0";
LC30 : LORAX = "G56R0";
LC3 : LORAX = "G11R0";
LC29 : LORAX = "G55R0";
LC24 : LORAX = "G33R0";
LC32 : LORAX = "G58R0";
OH0R0P4 : LORAX = "G43R0,PA20R0C1,PA20R0C0";
LC21 : LORAX = "G30R0,PA16R0C1,PA16R0C0";
LC4 : LORAX = "G12R0,PA0R0C0,PA0R0C1";
LC1 : LORAX = "G9R0,PA2R0C0,PA2R0C1";
LC19 : LORAX = "G15R0,PA3R0C1,PA3R0C0";
LC17 : LORAX = "G13R0,PA7R0C1,PA7R0C0";
LC18 : LORAX = "G14R0,PA5R0C0,PA5R0C1";
LC27 : LORAX = "G40R0,PA19R0C0";
LC2 : LORAX = "G10R0,PA1R0C0,PA6R0C1";
LC22 : LORAX = "G31R0,PA14R0C0";
LC26 : LORAX = "G39R0,PA21R0C1";
LC25 : LORAX = "G38R0,PA18R0C1";
LC23 : LORAX = "G32R0,PA12R0C1";
LC20 : LORAX = "G16R0,PA1R0C1";
LC28 : LORAX = "G41R0,PA22R0C0";
LC8 : LORAX = "G29R0,PA9R0C0";
LC5 : LORAX = "G26R0,PA11R0C0";
LC6 : LORAX = "G27R0,PA10R0C0";
END;
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