i2c.p1

来自「PSOC 电动自行车代码 器件采用CYPRESS新电动自行车器件CY8C245」· P1 代码 · 共 993 行 · 第 1/2 页

"457
[v _PRT3IC1 `Auc 1 e@271 ]
[; ;CY8C24~3\m8c.h: 457: BYTE PRT3IC1;

"465
[v _DBB00FN `Auc 1 e@288 ]
[; ;CY8C24~3\m8c.h: 465: BYTE DBB00FN;

"467
[v _DBB00IN `Auc 1 e@289 ]
[; ;CY8C24~3\m8c.h: 467: BYTE DBB00IN;

"469
[v _DBB00OU `Auc 1 e@290 ]
[; ;CY8C24~3\m8c.h: 469: BYTE DBB00OU;

"473
[v _DBB01FN `Auc 1 e@292 ]
[; ;CY8C24~3\m8c.h: 473: BYTE DBB01FN;

"475
[v _DBB01IN `Auc 1 e@293 ]
[; ;CY8C24~3\m8c.h: 475: BYTE DBB01IN;

"477
[v _DBB01OU `Auc 1 e@294 ]
[; ;CY8C24~3\m8c.h: 477: BYTE DBB01OU;

"481
[v _DCB02FN `Auc 1 e@296 ]
[; ;CY8C24~3\m8c.h: 481: BYTE DCB02FN;

"483
[v _DCB02IN `Auc 1 e@297 ]
[; ;CY8C24~3\m8c.h: 483: BYTE DCB02IN;

"485
[v _DCB02OU `Auc 1 e@298 ]
[; ;CY8C24~3\m8c.h: 485: BYTE DCB02OU;

"489
[v _DCB03FN `Auc 1 e@300 ]
[; ;CY8C24~3\m8c.h: 489: BYTE DCB03FN;

"491
[v _DCB03IN `Auc 1 e@301 ]
[; ;CY8C24~3\m8c.h: 491: BYTE DCB03IN;

"493
[v _DCB03OU `Auc 1 e@302 ]
[; ;CY8C24~3\m8c.h: 493: BYTE DCB03OU;

"501
[v _CLK_CR0 `Auc 1 e@352 ]
[; ;CY8C24~3\m8c.h: 501: BYTE CLK_CR0;

"506
[v _CLK_CR1 `Auc 1 e@353 ]
[; ;CY8C24~3\m8c.h: 506: BYTE CLK_CR1;

"512
[v _ABF_CR0 `Auc 1 e@354 ]
[; ;CY8C24~3\m8c.h: 512: BYTE ABF_CR0;

"520
[v _AMD_CR0 `Auc 1 e@355 ]
[; ;CY8C24~3\m8c.h: 520: BYTE AMD_CR0;

"525
[v _AMD_CR1 `Auc 1 e@358 ]
[; ;CY8C24~3\m8c.h: 525: BYTE AMD_CR1;

"530
[v _ALT_CR0 `Auc 1 e@359 ]
[; ;CY8C24~3\m8c.h: 530: BYTE ALT_CR0;

"539
[v _GDI_O_IN `Auc 1 e@464 ]
[; ;CY8C24~3\m8c.h: 539: BYTE GDI_O_IN;

"541
[v _GDI_E_IN `Auc 1 e@465 ]
[; ;CY8C24~3\m8c.h: 541: BYTE GDI_E_IN;

"543
[v _GDI_O_OU `Auc 1 e@466 ]
[; ;CY8C24~3\m8c.h: 543: BYTE GDI_O_OU;

"545
[v _GDI_E_OU `Auc 1 e@467 ]
[; ;CY8C24~3\m8c.h: 545: BYTE GDI_E_OU;

"552
[v _OSC_GO_EN `Auc 1 e@477 ]
[; ;CY8C24~3\m8c.h: 552: BYTE OSC_GO_EN;

"563
[v _OSC_CR4 `Auc 1 e@478 ]
[; ;CY8C24~3\m8c.h: 563: BYTE OSC_CR4;

"570
[v _OSC_CR3 `Auc 1 e@479 ]
[; ;CY8C24~3\m8c.h: 570: BYTE OSC_CR3;

"573
[v _OSC_CR0 `Auc 1 e@480 ]
[; ;CY8C24~3\m8c.h: 573: BYTE OSC_CR0;

"593
[v _OSC_CR1 `Auc 1 e@481 ]
[; ;CY8C24~3\m8c.h: 593: BYTE OSC_CR1;

"598
[v _OSC_CR2 `Auc 1 e@482 ]
[; ;CY8C24~3\m8c.h: 598: BYTE OSC_CR2;

"605
[v _VLT_CR `Auc 1 e@483 ]
[; ;CY8C24~3\m8c.h: 605: BYTE VLT_CR;

"620
[v _VLT_CMP `Auc 1 e@484 ]
[; ;CY8C24~3\m8c.h: 620: BYTE VLT_CMP;

"626
[v _IMO_TR `Auc 1 e@488 ]
[; ;CY8C24~3\m8c.h: 626: BYTE IMO_TR;

"628
[v _ILO_TR `Auc 1 e@489 ]
[; ;CY8C24~3\m8c.h: 628: BYTE ILO_TR;

"630
[v _BDG_TR `Auc 1 e@490 ]
[; ;CY8C24~3\m8c.h: 630: BYTE BDG_TR;

"632
[v _ECO_TR `Auc 1 e@491 ]
[; ;CY8C24~3\m8c.h: 632: BYTE ECO_TR;

"52 ./lib\CMPPRG.h
[v F162 `(v 1 tf1`uc ]
[; ;lib\CMPPRG.h: 52: extern void CMPPRG_Start(BYTE bPowerSetting);

"53
[v F165 `(v 1 tf1`uc ]
[; ;lib\CMPPRG.h: 53: extern void CMPPRG_SetPower(BYTE bPowerSetting);

"54
[v F168 `(v 1 tf1`uc ]
[; ;lib\CMPPRG.h: 54: extern void CMPPRG_SetRef(BYTE bRefValue);

"55
[v F171 `(v 1 tf ]
[; ;lib\CMPPRG.h: 55: extern void CMPPRG_Stop(void);

"61
[v _CMPPRG_COMP_CR0 `Auc 1 e@113 ]
[; ;lib\CMPPRG.h: 61: BYTE CMPPRG_COMP_CR0;

"63
[v _CMPPRG_COMP_CR1 `Auc 1 e@114 ]
[; ;lib\CMPPRG.h: 63: BYTE CMPPRG_COMP_CR1;

"65
[v _CMPPRG_COMP_CR2 `Auc 1 e@115 ]
[; ;lib\CMPPRG.h: 65: BYTE CMPPRG_COMP_CR2;

"67
[v _CMPPRG_COMP_CR3 `Auc 1 e@112 ]
[; ;lib\CMPPRG.h: 67: BYTE CMPPRG_COMP_CR3;

"25 ./lib\DigBuf.h
[v F178 `(v 1 tf ]
[; ;lib\DigBuf.h: 25: extern void DigBuf_EnableInt(void);

"26
[v F181 `(v 1 tf ]
[; ;lib\DigBuf.h: 26: extern void DigBuf_DisableInt(void);

"27
[v F184 `(v 1 tf ]
[; ;lib\DigBuf.h: 27: extern void DigBuf_Start(void);

"28
[v F187 `(v 1 tf ]
[; ;lib\DigBuf.h: 28: extern void DigBuf_Stop(void);

"43
[v _DigBuf_DATA_0_REG `Auc 1 e@40 ]
[; ;lib\DigBuf.h: 43: BYTE DigBuf_DATA_0_REG;

"45
[v _DigBuf_DATA_1_REG `Auc 1 e@41 ]
[; ;lib\DigBuf.h: 45: BYTE DigBuf_DATA_1_REG;

"47
[v _DigBuf_DATA_2_REG `Auc 1 e@42 ]
[; ;lib\DigBuf.h: 47: BYTE DigBuf_DATA_2_REG;

"49
[v _DigBuf_CONTROL_REG `Auc 1 e@43 ]
[; ;lib\DigBuf.h: 49: BYTE DigBuf_CONTROL_REG;

"51
[v _DigBuf_FUNC_REG `Auc 1 e@296 ]
[; ;lib\DigBuf.h: 51: BYTE DigBuf_FUNC_REG;

"53
[v _DigBuf_INPUT_REG `Auc 1 e@297 ]
[; ;lib\DigBuf.h: 53: BYTE DigBuf_INPUT_REG;

"55
[v _DigBuf_OUTPUT_REG `Auc 1 e@298 ]
[; ;lib\DigBuf.h: 55: BYTE DigBuf_OUTPUT_REG;

"57
[v _DigBuf_INT_REG `Auc 1 e@225 ]
[; ;lib\DigBuf.h: 57: BYTE DigBuf_INT_REG;

"50 ./lib\EzI2Cs.h
[v F198 `(v 1 tf ]
[; ;lib\EzI2Cs.h: 50: extern void EzI2Cs_Start(void);

"52
[v F201 `(v 1 tf ]
[; ;lib\EzI2Cs.h: 52: extern void EzI2Cs_DisableInt(void);

"53
[v F204 `(v 1 tf ]
[; ;lib\EzI2Cs.h: 53: extern void EzI2Cs_EnableInt(void);

"54
[v F207 `(v 1 tf ]
[; ;lib\EzI2Cs.h: 54: extern void EzI2Cs_Stop(void);

"55
[v F212 `(v 1 tf3`uc`uc`*uc ]
[; ;lib\EzI2Cs.h: 55: extern void EzI2Cs_SetRamBuffer(BYTE bSize, BYTE bRWBoundary, BYTE * pAddr);

"56
[v F215 `(uc 1 tf ]
[; ;lib\EzI2Cs.h: 56: extern BYTE EzI2Cs_GetAddr(void);

"57
[v F218 `(uc 1 tf ]
[; ;lib\EzI2Cs.h: 57: extern BYTE EzI2Cs_GetActivity(void);

"68 ./lib\PGA.h
[v F221 `(v 1 tf1`uc ]
[; ;lib\PGA.h: 68: extern void PGA_Start(BYTE bPowerSetting);

"69
[v F224 `(v 1 tf1`uc ]
[; ;lib\PGA.h: 69: extern void PGA_SetPower(BYTE bPowerSetting);

"70
[v F227 `(v 1 tf1`uc ]
[; ;lib\PGA.h: 70: extern void PGA_SetGain(BYTE bGainSetting);

"71
[v F230 `(v 1 tf ]
[; ;lib\PGA.h: 71: extern void PGA_Stop(void);

"78
[v _PGA_GAIN_CR0 `Auc 1 e@117 ]
[; ;lib\PGA.h: 78: BYTE PGA_GAIN_CR0;

"80
[v _PGA_GAIN_CR1 `Auc 1 e@118 ]
[; ;lib\PGA.h: 80: BYTE PGA_GAIN_CR1;

"82
[v _PGA_GAIN_CR2 `Auc 1 e@119 ]
[; ;lib\PGA.h: 82: BYTE PGA_GAIN_CR2;

"84
[v _PGA_GAIN_CR3 `Auc 1 e@116 ]
[; ;lib\PGA.h: 84: BYTE PGA_GAIN_CR3;

"36 ./lib\PWM.h
[v F237 `(v 1 tf ]
[; ;lib\PWM.h: 36: extern void PWM_EnableInt(void);

"37
[v F240 `(v 1 tf ]
[; ;lib\PWM.h: 37: extern void PWM_DisableInt(void);

"38
[v F243 `(v 1 tf ]
[; ;lib\PWM.h: 38: extern void PWM_Start(void);

"39
[v F246 `(v 1 tf ]
[; ;lib\PWM.h: 39: extern void PWM_Stop(void);

"40
[v F249 `(uc 1 tf ]
[; ;lib\PWM.h: 40: extern BYTE PWM_bReadCounter(void);

"41
[v F252 `(v 1 tf1`uc ]
[; ;lib\PWM.h: 41: extern void PWM_WritePeriod(BYTE bPeriod);

"42
[v F255 `(uc 1 tf ]
[; ;lib\PWM.h: 42: extern BYTE PWM_bReadPulseWidth(void);

"43
[v F258 `(v 1 tf1`uc ]
[; ;lib\PWM.h: 43: extern void PWM_WritePulseWidth(BYTE bPulseWidth);

"48
[v F261 `(uc 1 tf ]
[; ;lib\PWM.h: 48: extern BYTE bPWM_ReadCounter(void);

"49
[v F264 `(uc 1 tf ]
[; ;lib\PWM.h: 49: extern BYTE bPWM_ReadPulseWidth(void);

"74
[v _PWM_COUNTER_REG `Auc 1 e@44 ]
[; ;lib\PWM.h: 74: BYTE PWM_COUNTER_REG;

"76
[v _PWM_PERIOD_REG `Auc 1 e@45 ]
[; ;lib\PWM.h: 76: BYTE PWM_PERIOD_REG;

"78
[v _PWM_COMPARE_REG `Auc 1 e@46 ]
[; ;lib\PWM.h: 78: BYTE PWM_COMPARE_REG;

"80
[v _PWM_CONTROL_REG `Auc 1 e@47 ]
[; ;lib\PWM.h: 80: BYTE PWM_CONTROL_REG;

"82
[v _PWM_FUNC_REG `Auc 1 e@300 ]
[; ;lib\PWM.h: 82: BYTE PWM_FUNC_REG;

"84
[v _PWM_INPUT_REG `Auc 1 e@301 ]
[; ;lib\PWM.h: 84: BYTE PWM_INPUT_REG;

"86
[v _PWM_OUTPUT_REG `Auc 1 e@302 ]
[; ;lib\PWM.h: 86: BYTE PWM_OUTPUT_REG;

"88
[v _PWM_INT_REG `Auc 1 e@225 ]
[; ;lib\PWM.h: 88: BYTE PWM_INT_REG;

"91 ./lib\SAR8.h
[v F275 `(v 1 tf ]
[; ;lib\SAR8.h: 91: extern void SAR8_Start(void);

"92
[v F278 `(v 1 tf ]
[; ;lib\SAR8.h: 92: extern void SAR8_Stop(void);

"93
[v F281 `(v 1 tf ]
[; ;lib\SAR8.h: 93: extern void SAR8_EnableInt(void);

"94
[v F284 `(v 1 tf ]
[; ;lib\SAR8.h: 94: extern void SAR8_DisableInt(void);

"95
[v F287 `(v 1 tf ]
[; ;lib\SAR8.h: 95: extern void SAR8_Trigger(void);

"96
[v F290 `(uc 1 tf ]
[; ;lib\SAR8.h: 96: extern BYTE SAR8_fIsDataAvailable(void);

"97
[v F293 `(uc 1 tf ]
[; ;lib\SAR8.h: 97: extern BYTE SAR8_bGetData(void);

"98
[v F296 `(v 1 tf1`uc ]
[; ;lib\SAR8.h: 98: extern void SAR8_SelectADCChannel(BYTE bChannel);

"99
[v F299 `(v 1 tf1`uc ]
[; ;lib\SAR8.h: 99: extern void SAR8_AutoAlign(BYTE bAlignMode);

"100
[v F302 `(v 1 tf1`uc ]
[; ;lib\SAR8.h: 100: extern void SAR8_SetAlignPath(BYTE bAlignPath);

"101
[v F305 `(v 1 tf1`uc ]
[; ;lib\SAR8.h: 101: extern void SAR8_SetHighAlignSrc(BYTE bAlignSrc);

"102
[v F308 `(v 1 tf1`uc ]
[; ;lib\SAR8.h: 102: extern void SAR8_SetLowAlignSrc(BYTE bAlignSrc);

"103
[v F311 `(v 1 tf1`uc ]
[; ;lib\SAR8.h: 103: extern void SAR8_SetCmpL(BYTE bValue);

"104
[v F314 `(v 1 tf1`uc ]
[; ;lib\SAR8.h: 104: extern void SAR8_SetCmpH(BYTE bValue);

"105
[v F317 `(v 1 tf1`uc ]
[; ;lib\SAR8.h: 105: extern void SAR8_SetScale(BYTE bScaleMode);

"106
[v F320 `(v 1 tf1`uc ]
[; ;lib\SAR8.h: 106: extern void SAR8_SetRunMode(BYTE bRunMode);

"112
[v _SAR8_INT_REG `Auc 1 e@224 ]
[; ;lib\SAR8.h: 112: BYTE SAR8_INT_REG;

"115
[v _SAR8_CONTROL_0_REG `Auc 1 e@105 ]
[; ;lib\SAR8.h: 115: BYTE SAR8_CONTROL_0_REG;

"118
[v _SAR8_CONTROL_1_REG `Auc 1 e@106 ]
[; ;lib\SAR8.h: 118: BYTE SAR8_CONTROL_1_REG;

"121
[v _SAR8_CONTROL_2_REG `Auc 1 e@427 ]
[; ;lib\SAR8.h: 121: BYTE SAR8_CONTROL_2_REG;

"124
[v _SAR8_TRIGGER_SRC_REG `Auc 1 e@424 ]
[; ;lib\SAR8.h: 124: BYTE SAR8_TRIGGER_SRC_REG;

"127
[v _SAR8_COMPARE_LO_REG `Auc 1 e@425 ]
[; ;lib\SAR8.h: 127: BYTE SAR8_COMPARE_LO_REG;

"130
[v _SAR8_COMPARE_HI_REG `Auc 1 e@426 ]
[; ;lib\SAR8.h: 130: BYTE SAR8_COMPARE_HI_REG;

"133
[v _SAR8_DATA_LO_REG `Auc 1 e@103 ]
[; ;lib\SAR8.h: 133: BYTE SAR8_DATA_LO_REG;

"40 ./i2c.h
[s S1 `uc -> 10 `i ]
[n S1 . b ]
[v _TYPE_I2CS_STRUCT `S1 1 t ]
[; ;i2c.h: 35: typedef struct

[; ;i2c.h: 36: {

[; ;i2c.h: 38: BYTE b[10];

[; ;i2c.h: 40: }TYPE_I2CS_STRUCT;

[; ;i2c.h: 42: extern TYPE_I2CS_STRUCT I2CSBuff;

[; ;i2c.h: 45: void vI2CInit(void);

"36 ./i2c.c
[v _I2CSBuff `S1 1 e ]
[; ;i2c.c: 36: TYPE_I2CS_STRUCT I2CSBuff;

"40
[v _vI2CInit `(v 1 ef ]
{
[; ;i2c.c: 39: void vI2CInit(void)

[; ;i2c.c: 40: {

[e :U _vI2CInit ]
[f ]
[; ;i2c.c: 42: EzI2Cs_SetRamBuffer(sizeof(I2CSBuff),sizeof(I2CSBuff),(BYTE *)&I2CSBuff);

"55 ./lib\EzI2Cs.h
[v _EzI2Cs_SetRamBuffer `BF212 0 e ]
"42 ./i2c.c
[e ( _EzI2Cs_SetRamBuffer (3
 , , -> -> # _I2CSBuff `ui `uc -> -> # _I2CSBuff `ui `uc -> &U _I2CSBuff `*uc ]
[; ;i2c.c: 43: EzI2Cs_Start();

"50 ./lib\EzI2Cs.h
[v _EzI2Cs_Start `BF198 0 e ]
"43 ./i2c.c
[e ( _EzI2Cs_Start ..  ]
"44
[; ;i2c.c: 44: }

[e :UE 2 ]
}