psocgpioint.inc

来自「PSOC 电动自行车代码 器件采用CYPRESS新电动自行车器件CY8C245」· INC 代码 · 共 256 行

; Generated by PSoC Designer ver 4.4  b1884 : 14 Jan, 2007
;
;
;  PSoCGPIOINT.inc
;
;  Data: 29 October, 2001
;  Copyright Cypress MicroSystems 2001
;
;  This file is generated by the Device Editor on Application Generation.
;  It contains equates that are useful in writing code relating to GPIO
;  related interrupts.
;  
;  DO NOT EDIT THIS FILE MANUALLY, AS IT IS OVERWRITTEN!!!
;  Edits to this file will not be preserved.
;
; HALL_2 address and mask equates
HALL_2_Data_ADDR:	equ	8h
HALL_2_DriveMode_0_ADDR:	equ	108h
HALL_2_DriveMode_1_ADDR:	equ	109h
HALL_2_DriveMode_2_ADDR:	equ	bh
HALL_2_GlobalSelect_ADDR:	equ	ah
HALL_2_IntCtrl_0_ADDR:	equ	10ah
HALL_2_IntCtrl_1_ADDR:	equ	10bh
HALL_2_IntEn_ADDR:	equ	9h
HALL_2_MASK:	equ	2h
; HALL_1 address and mask equates
HALL_1_Data_ADDR:	equ	8h
HALL_1_DriveMode_0_ADDR:	equ	108h
HALL_1_DriveMode_1_ADDR:	equ	109h
HALL_1_DriveMode_2_ADDR:	equ	bh
HALL_1_GlobalSelect_ADDR:	equ	ah
HALL_1_IntCtrl_0_ADDR:	equ	10ah
HALL_1_IntCtrl_1_ADDR:	equ	10bh
HALL_1_IntEn_ADDR:	equ	9h
HALL_1_MASK:	equ	1h
; HALL_3 address and mask equates
HALL_3_Data_ADDR:	equ	8h
HALL_3_DriveMode_0_ADDR:	equ	108h
HALL_3_DriveMode_1_ADDR:	equ	109h
HALL_3_DriveMode_2_ADDR:	equ	bh
HALL_3_GlobalSelect_ADDR:	equ	ah
HALL_3_IntCtrl_0_ADDR:	equ	10ah
HALL_3_IntCtrl_1_ADDR:	equ	10bh
HALL_3_IntEn_ADDR:	equ	9h
HALL_3_MASK:	equ	4h
; ABS_SEL address and mask equates
ABS_SEL_Data_ADDR:	equ	0h
ABS_SEL_DriveMode_0_ADDR:	equ	100h
ABS_SEL_DriveMode_1_ADDR:	equ	101h
ABS_SEL_DriveMode_2_ADDR:	equ	3h
ABS_SEL_GlobalSelect_ADDR:	equ	2h
ABS_SEL_IntCtrl_0_ADDR:	equ	102h
ABS_SEL_IntCtrl_1_ADDR:	equ	103h
ABS_SEL_IntEn_ADDR:	equ	1h
ABS_SEL_MASK:	equ	1h
; PHASE_SEL address and mask equates
PHASE_SEL_Data_ADDR:	equ	0h
PHASE_SEL_DriveMode_0_ADDR:	equ	100h
PHASE_SEL_DriveMode_1_ADDR:	equ	101h
PHASE_SEL_DriveMode_2_ADDR:	equ	3h
PHASE_SEL_GlobalSelect_ADDR:	equ	2h
PHASE_SEL_IntCtrl_0_ADDR:	equ	102h
PHASE_SEL_IntCtrl_1_ADDR:	equ	103h
PHASE_SEL_IntEn_ADDR:	equ	1h
PHASE_SEL_MASK:	equ	2h
; CRU_SEL address and mask equates
CRU_SEL_Data_ADDR:	equ	0h
CRU_SEL_DriveMode_0_ADDR:	equ	100h
CRU_SEL_DriveMode_1_ADDR:	equ	101h
CRU_SEL_DriveMode_2_ADDR:	equ	3h
CRU_SEL_GlobalSelect_ADDR:	equ	2h
CRU_SEL_IntCtrl_0_ADDR:	equ	102h
CRU_SEL_IntCtrl_1_ADDR:	equ	103h
CRU_SEL_IntEn_ADDR:	equ	1h
CRU_SEL_MASK:	equ	4h
; ALARM address and mask equates
ALARM_Data_ADDR:	equ	0h
ALARM_DriveMode_0_ADDR:	equ	100h
ALARM_DriveMode_1_ADDR:	equ	101h
ALARM_DriveMode_2_ADDR:	equ	3h
ALARM_GlobalSelect_ADDR:	equ	2h
ALARM_IntCtrl_0_ADDR:	equ	102h
ALARM_IntCtrl_1_ADDR:	equ	103h
ALARM_IntEn_ADDR:	equ	1h
ALARM_MASK:	equ	8h
; BRAKE_IN address and mask equates
BRAKE_IN_Data_ADDR:	equ	0h
BRAKE_IN_DriveMode_0_ADDR:	equ	100h
BRAKE_IN_DriveMode_1_ADDR:	equ	101h
BRAKE_IN_DriveMode_2_ADDR:	equ	3h
BRAKE_IN_GlobalSelect_ADDR:	equ	2h
BRAKE_IN_IntCtrl_0_ADDR:	equ	102h
BRAKE_IN_IntCtrl_1_ADDR:	equ	103h
BRAKE_IN_IntEn_ADDR:	equ	1h
BRAKE_IN_MASK:	equ	10h
; TS_IN address and mask equates
TS_IN_Data_ADDR:	equ	0h
TS_IN_DriveMode_0_ADDR:	equ	100h
TS_IN_DriveMode_1_ADDR:	equ	101h
TS_IN_DriveMode_2_ADDR:	equ	3h
TS_IN_GlobalSelect_ADDR:	equ	2h
TS_IN_IntCtrl_0_ADDR:	equ	102h
TS_IN_IntCtrl_1_ADDR:	equ	103h
TS_IN_IntEn_ADDR:	equ	1h
TS_IN_MASK:	equ	20h
; BAT_V address and mask equates
BAT_V_Data_ADDR:	equ	0h
BAT_V_DriveMode_0_ADDR:	equ	100h
BAT_V_DriveMode_1_ADDR:	equ	101h
BAT_V_DriveMode_2_ADDR:	equ	3h
BAT_V_GlobalSelect_ADDR:	equ	2h
BAT_V_IntCtrl_0_ADDR:	equ	102h
BAT_V_IntCtrl_1_ADDR:	equ	103h
BAT_V_IntEn_ADDR:	equ	1h
BAT_V_MASK:	equ	40h
; BUSI_IN address and mask equates
BUSI_IN_Data_ADDR:	equ	0h
BUSI_IN_DriveMode_0_ADDR:	equ	100h
BUSI_IN_DriveMode_1_ADDR:	equ	101h
BUSI_IN_DriveMode_2_ADDR:	equ	3h
BUSI_IN_GlobalSelect_ADDR:	equ	2h
BUSI_IN_IntCtrl_0_ADDR:	equ	102h
BUSI_IN_IntCtrl_1_ADDR:	equ	103h
BUSI_IN_IntEn_ADDR:	equ	1h
BUSI_IN_MASK:	equ	80h
; EzI2CsSDA address and mask equates
EzI2CsSDA_Data_ADDR:	equ	4h
EzI2CsSDA_DriveMode_0_ADDR:	equ	104h
EzI2CsSDA_DriveMode_1_ADDR:	equ	105h
EzI2CsSDA_DriveMode_2_ADDR:	equ	7h
EzI2CsSDA_GlobalSelect_ADDR:	equ	6h
EzI2CsSDA_IntCtrl_0_ADDR:	equ	106h
EzI2CsSDA_IntCtrl_1_ADDR:	equ	107h
EzI2CsSDA_IntEn_ADDR:	equ	5h
EzI2CsSDA_MASK:	equ	1h
; EzI2CsSCL address and mask equates
EzI2CsSCL_Data_ADDR:	equ	4h
EzI2CsSCL_DriveMode_0_ADDR:	equ	104h
EzI2CsSCL_DriveMode_1_ADDR:	equ	105h
EzI2CsSCL_DriveMode_2_ADDR:	equ	7h
EzI2CsSCL_GlobalSelect_ADDR:	equ	6h
EzI2CsSCL_IntCtrl_0_ADDR:	equ	106h
EzI2CsSCL_IntCtrl_1_ADDR:	equ	107h
EzI2CsSCL_IntEn_ADDR:	equ	5h
EzI2CsSCL_MASK:	equ	2h
; PWM0L address and mask equates
PWM0L_Data_ADDR:	equ	4h
PWM0L_DriveMode_0_ADDR:	equ	104h
PWM0L_DriveMode_1_ADDR:	equ	105h
PWM0L_DriveMode_2_ADDR:	equ	7h
PWM0L_GlobalSelect_ADDR:	equ	6h
PWM0L_IntCtrl_0_ADDR:	equ	106h
PWM0L_IntCtrl_1_ADDR:	equ	107h
PWM0L_IntEn_ADDR:	equ	5h
PWM0L_MASK:	equ	4h
; PWM0H address and mask equates
PWM0H_Data_ADDR:	equ	4h
PWM0H_DriveMode_0_ADDR:	equ	104h
PWM0H_DriveMode_1_ADDR:	equ	105h
PWM0H_DriveMode_2_ADDR:	equ	7h
PWM0H_GlobalSelect_ADDR:	equ	6h
PWM0H_IntCtrl_0_ADDR:	equ	106h
PWM0H_IntCtrl_1_ADDR:	equ	107h
PWM0H_IntEn_ADDR:	equ	5h
PWM0H_MASK:	equ	8h
; PWM1H address and mask equates
PWM1H_Data_ADDR:	equ	4h
PWM1H_DriveMode_0_ADDR:	equ	104h
PWM1H_DriveMode_1_ADDR:	equ	105h
PWM1H_DriveMode_2_ADDR:	equ	7h
PWM1H_GlobalSelect_ADDR:	equ	6h
PWM1H_IntCtrl_0_ADDR:	equ	106h
PWM1H_IntCtrl_1_ADDR:	equ	107h
PWM1H_IntEn_ADDR:	equ	5h
PWM1H_MASK:	equ	10h
; PWM1L address and mask equates
PWM1L_Data_ADDR:	equ	4h
PWM1L_DriveMode_0_ADDR:	equ	104h
PWM1L_DriveMode_1_ADDR:	equ	105h
PWM1L_DriveMode_2_ADDR:	equ	7h
PWM1L_GlobalSelect_ADDR:	equ	6h
PWM1L_IntCtrl_0_ADDR:	equ	106h
PWM1L_IntCtrl_1_ADDR:	equ	107h
PWM1L_IntEn_ADDR:	equ	5h
PWM1L_MASK:	equ	20h
; PWM2L address and mask equates
PWM2L_Data_ADDR:	equ	4h
PWM2L_DriveMode_0_ADDR:	equ	104h
PWM2L_DriveMode_1_ADDR:	equ	105h
PWM2L_DriveMode_2_ADDR:	equ	7h
PWM2L_GlobalSelect_ADDR:	equ	6h
PWM2L_IntCtrl_0_ADDR:	equ	106h
PWM2L_IntCtrl_1_ADDR:	equ	107h
PWM2L_IntEn_ADDR:	equ	5h
PWM2L_MASK:	equ	40h
; PWM2H address and mask equates
PWM2H_Data_ADDR:	equ	4h
PWM2H_DriveMode_0_ADDR:	equ	104h
PWM2H_DriveMode_1_ADDR:	equ	105h
PWM2H_DriveMode_2_ADDR:	equ	7h
PWM2H_GlobalSelect_ADDR:	equ	6h
PWM2H_IntCtrl_0_ADDR:	equ	106h
PWM2H_IntCtrl_1_ADDR:	equ	107h
PWM2H_IntEn_ADDR:	equ	5h
PWM2H_MASK:	equ	80h
; CRUISE_IN address and mask equates
CRUISE_IN_Data_ADDR:	equ	8h
CRUISE_IN_DriveMode_0_ADDR:	equ	108h
CRUISE_IN_DriveMode_1_ADDR:	equ	109h
CRUISE_IN_DriveMode_2_ADDR:	equ	bh
CRUISE_IN_GlobalSelect_ADDR:	equ	ah
CRUISE_IN_IntCtrl_0_ADDR:	equ	10ah
CRUISE_IN_IntCtrl_1_ADDR:	equ	10bh
CRUISE_IN_IntEn_ADDR:	equ	9h
CRUISE_IN_MASK:	equ	8h
; CRUISE_DISP address and mask equates
CRUISE_DISP_Data_ADDR:	equ	8h
CRUISE_DISP_DriveMode_0_ADDR:	equ	108h
CRUISE_DISP_DriveMode_1_ADDR:	equ	109h
CRUISE_DISP_DriveMode_2_ADDR:	equ	bh
CRUISE_DISP_GlobalSelect_ADDR:	equ	ah
CRUISE_DISP_IntCtrl_0_ADDR:	equ	10ah
CRUISE_DISP_IntCtrl_1_ADDR:	equ	10bh
CRUISE_DISP_IntEn_ADDR:	equ	9h
CRUISE_DISP_MASK:	equ	10h
; LOWBAT_DISP address and mask equates
LOWBAT_DISP_Data_ADDR:	equ	8h
LOWBAT_DISP_DriveMode_0_ADDR:	equ	108h
LOWBAT_DISP_DriveMode_1_ADDR:	equ	109h
LOWBAT_DISP_DriveMode_2_ADDR:	equ	bh
LOWBAT_DISP_GlobalSelect_ADDR:	equ	ah
LOWBAT_DISP_IntCtrl_0_ADDR:	equ	10ah
LOWBAT_DISP_IntCtrl_1_ADDR:	equ	10bh
LOWBAT_DISP_IntEn_ADDR:	equ	9h
LOWBAT_DISP_MASK:	equ	20h
; STATE_LED address and mask equates
STATE_LED_Data_ADDR:	equ	8h
STATE_LED_DriveMode_0_ADDR:	equ	108h
STATE_LED_DriveMode_1_ADDR:	equ	109h
STATE_LED_DriveMode_2_ADDR:	equ	bh
STATE_LED_GlobalSelect_ADDR:	equ	ah
STATE_LED_IntCtrl_0_ADDR:	equ	10ah
STATE_LED_IntCtrl_1_ADDR:	equ	10bh
STATE_LED_IntEn_ADDR:	equ	9h
STATE_LED_MASK:	equ	40h
; ABS_DISP address and mask equates
ABS_DISP_Data_ADDR:	equ	8h
ABS_DISP_DriveMode_0_ADDR:	equ	108h
ABS_DISP_DriveMode_1_ADDR:	equ	109h
ABS_DISP_DriveMode_2_ADDR:	equ	bh
ABS_DISP_GlobalSelect_ADDR:	equ	ah
ABS_DISP_IntCtrl_0_ADDR:	equ	10ah
ABS_DISP_IntCtrl_1_ADDR:	equ	10bh
ABS_DISP_IntEn_ADDR:	equ	9h
ABS_DISP_MASK:	equ	80h