psocconfigtbl.asm
来自「PSOC 电动自行车代码 器件采用CYPRESS新电动自行车器件CY8C245」· 汇编 代码 · 共 140 行
ASM
140 行
; Generated by PSoC Designer ver 4.4 b1884 : 14 Jan, 2007
;
include "m8c.inc"
; Personalization tables
export LoadConfigTBL_hitech_tst_Bank1
export LoadConfigTBL_hitech_tst_Bank0
export LoadConfigTBL_hitech_tst_Ordered
AREA lit(rom, rel)
LoadConfigTBL_hitech_tst_Ordered:
; Ordered Global Register values
M8C_SetBank1
mov reg[00h], 00h ; Port_0_DriveMode_0 register (PRT0DM0)
mov reg[01h], ffh ; Port_0_DriveMode_1 register (PRT0DM1)
M8C_SetBank0
mov reg[03h], f7h ; Port_0_DriveMode_2 register (PRT0DM2)
mov reg[02h], 00h ; Port_0_GlobalSelect register (PRT0GS)
M8C_SetBank1
mov reg[02h], 00h ; Port_0_IntCtrl_0 register (PRT0IC0)
mov reg[03h], 00h ; Port_0_IntCtrl_1 register (PRT0IC1)
M8C_SetBank0
mov reg[01h], 00h ; Port_0_IntEn register (PRT0IE)
M8C_SetBank1
mov reg[04h], ffh ; Port_1_DriveMode_0 register (PRT1DM0)
mov reg[05h], 03h ; Port_1_DriveMode_1 register (PRT1DM1)
M8C_SetBank0
mov reg[07h], 03h ; Port_1_DriveMode_2 register (PRT1DM2)
mov reg[06h], 00h ; Port_1_GlobalSelect register (PRT1GS)
M8C_SetBank1
mov reg[06h], 00h ; Port_1_IntCtrl_0 register (PRT1IC0)
mov reg[07h], 00h ; Port_1_IntCtrl_1 register (PRT1IC1)
M8C_SetBank0
mov reg[05h], 00h ; Port_1_IntEn register (PRT1IE)
M8C_SetBank1
mov reg[08h], f0h ; Port_2_DriveMode_0 register (PRT2DM0)
mov reg[09h], 0fh ; Port_2_DriveMode_1 register (PRT2DM1)
M8C_SetBank0
mov reg[0bh], 00h ; Port_2_DriveMode_2 register (PRT2DM2)
mov reg[0ah], 00h ; Port_2_GlobalSelect register (PRT2GS)
M8C_SetBank1
mov reg[0ah], 07h ; Port_2_IntCtrl_0 register (PRT2IC0)
mov reg[0bh], 07h ; Port_2_IntCtrl_1 register (PRT2IC1)
M8C_SetBank0
mov reg[09h], 07h ; Port_2_IntEn register (PRT2IE)
M8C_SetBank1
mov reg[0ch], 00h ; Port_3_DriveMode_0 register (PRT3DM0)
mov reg[0dh], 03h ; Port_3_DriveMode_1 register (PRT3DM1)
M8C_SetBank0
mov reg[0fh], 03h ; Port_3_DriveMode_2 register (PRT3DM2)
mov reg[0eh], 00h ; Port_3_GlobalSelect register (PRT3GS)
M8C_SetBank1
mov reg[0eh], 00h ; Port_3_IntCtrl_0 register (PRT3IC0)
mov reg[0fh], 00h ; Port_3_IntCtrl_1 register (PRT3IC1)
M8C_SetBank0
mov reg[0dh], 00h ; Port_3_IntEn register (PRT3IE)
ret
LoadConfigTBL_hitech_tst_Bank0:
; Global Register values
db 60h, 0bh ; AnalogColumnInputSelect register (AMX_IN)
db 66h, 00h ; AnalogComparatorControl1 register (CMP_CR1)
db 63h, 15h ; AnalogReferenceControl register (ARF_CR)
db 65h, 00h ; AnalogSyncControl register (ASY_CR)
db e6h, 02h ; DecimatorControl_0 register (DEC_CR0)
db e7h, 01h ; DecimatorControl_1 register (DEC_CR1)
db d6h, 41h ; I2CConfig register (I2CCFG)
db b0h, 00h ; Row_0_InputMux register (RDI0RI)
db b1h, 00h ; Row_0_InputSync register (RDI0SYN)
db b2h, 00h ; Row_0_LogicInputAMux register (RDI0IS)
db b3h, c1h ; Row_0_LogicSelect_0 register (RDI0LT0)
db b4h, 1ah ; Row_0_LogicSelect_1 register (RDI0LT1)
db b5h, 88h ; Row_0_OutputDrive_0 register (RDI0SRO0)
db b6h, cch ; Row_0_OutputDrive_1 register (RDI0SRO1)
db 69h, 00h ; SARADC_Control_0 register (SARADC_C0)
db 6ah, 00h ; SARADC_Control_1 register (SARADC_C1)
; Instance name CMPPRG, User Module CMPPRG
; Instance name CMPPRG, Block Name COMP(ACB00)
db 71h, 1ah ;CMPPRG_COMP_CR0(ACB00CR0)
db 72h, 61h ;CMPPRG_COMP_CR1(ACB00CR1)
db 73h, 40h ;CMPPRG_COMP_CR2(ACB00CR2)
db 70h, 00h ;CMPPRG_COMP_CR3(ACB00CR3)
; Instance name DigBuf, User Module DigBuf
; Instance name DigBuf, Block Name DigBuf(DCB02)
db 2bh, 03h ;DigBuf_CONTROL_REG(DCB02CR0)
db 29h, 00h ;DigBuf_DATA_1_REG(DCB02DR1)
db 2ah, 00h ;DigBuf_DATA_2_REG(DCB02DR2)
; Instance name EzI2Cs, User Module EzI2Cs
; Instance name PGA, User Module PGA
; Instance name PGA, Block Name GAIN(ACB01)
db 75h, 1eh ;PGA_GAIN_CR0(ACB01CR0)
db 76h, 21h ;PGA_GAIN_CR1(ACB01CR1)
db 77h, 20h ;PGA_GAIN_CR2(ACB01CR2)
db 74h, 00h ;PGA_GAIN_CR3(ACB01CR3)
; Instance name PWM, User Module PWM8
; Instance name PWM, Block Name PWM8(DCB03)
db 2fh, 00h ;PWM_CONTROL_REG(DCB03CR0)
db 2dh, feh ;PWM_PERIOD_REG(DCB03DR1)
db 2eh, 14h ;PWM_COMPARE_REG(DCB03DR2)
; Instance name SAR8, User Module SAR8
db ffh
LoadConfigTBL_hitech_tst_Bank1:
; Global Register values
db 61h, 00h ; AnalogClockSelect1 register (CLK_CR1)
db 69h, 00h ; AnalogClockSelect2 register (CLK_CR2)
db 60h, 00h ; AnalogColumnClockSelect register (CLK_CR0)
db 62h, 80h ; AnalogIOControl_0 register (ABF_CR0)
db 67h, 3ch ; AnalogLUTControl0 register (ALT_CR0)
db 68h, 00h ; AnalogLUTControl1 register (ALT_CR1)
db 63h, 00h ; AnalogModulatorControl_0 register (AMD_CR0)
db 66h, 00h ; AnalogModulatorControl_1 register (AMD_CR1)
db d1h, 00h ; GlobalDigitalInterconnect_Drive_Even_Input register (GDI_E_IN)
db d3h, 00h ; GlobalDigitalInterconnect_Drive_Even_Output register (GDI_E_OU)
db d0h, 00h ; GlobalDigitalInterconnect_Drive_Odd_Input register (GDI_O_IN)
db d2h, 00h ; GlobalDigitalInterconnect_Drive_Odd_Output register (GDI_O_OU)
db e1h, 4bh ; OscillatorControl_1 register (OSC_CR1)
db e2h, 00h ; OscillatorControl_2 register (OSC_CR2)
db dfh, 00h ; OscillatorControl_3 register (OSC_CR3)
db deh, 00h ; OscillatorControl_4 register (OSC_CR4)
db ddh, 00h ; OscillatorGlobalBusEnableControl register (OSC_GO_EN)
db abh, 03h ; SARADC_Control_2 register (SARADC_C2)
db a8h, 00h ; SARADC_TriggerSource register (SARADC_TRS)
; Instance name CMPPRG, User Module CMPPRG
; Instance name CMPPRG, Block Name COMP(ACB00)
; Instance name DigBuf, User Module DigBuf
; Instance name DigBuf, Block Name DigBuf(DCB02)
db 28h, 22h ;DigBuf_FUNC_REG(DCB02FN)
db 29h, 4bh ;DigBuf_INPUT_REG(DCB02IN)
db 2ah, 6ch ;DigBuf_OUTPUT_REG(DCB02OU)
; Instance name EzI2Cs, User Module EzI2Cs
; Instance name PGA, User Module PGA
; Instance name PGA, Block Name GAIN(ACB01)
; Instance name PWM, User Module PWM8
; Instance name PWM, Block Name PWM8(DCB03)
db 2ch, 31h ;PWM_FUNC_REG(DCB03FN)
db 2dh, 15h ;PWM_INPUT_REG(DCB03IN)
db 2eh, 47h ;PWM_OUTPUT_REG(DCB03OU)
; Instance name SAR8, User Module SAR8
db ffh
; PSoC Configuration file trailer PsocConfig.asm
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