psocconfigtbl.lis
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LIS
613 行
00E2 OSC_CR2: equ E2h ; Oscillator Control Register 2 (RW)
0080 OSC_CR2_PLLGAIN: equ 80h ; MASK: High/Low gain
0004 OSC_CR2_EXTCLKEN: equ 04h ; MASK: Enable/Disable External Clock
0002 OSC_CR2_IMODIS: equ 02h ; MASK: Enable/Disable System (IMO) Clock Net
0001 OSC_CR2_SYSCLKX2DIS: equ 01h ; MASK: Enable/Disable 48MHz clock source
0000
00E3 VLT_CR: equ E3h ; Voltage Monitor Control Register (RW)
0080 VLT_CR_SMP: equ 80h ; MASK: Enable Switch Mode Pump
0030 VLT_CR_PORLEV: equ 30h ; MASK: Mask for Power on Reset level control
0000 VLT_CR_POR_LOW: equ 00h ; Lowest Precision Power-on Reset trip point
0010 VLT_CR_POR_MID: equ 10h ; Middle Precision Power-on Reset trip point
0020 VLT_CR_POR_HIGH: equ 20h ; Highest Precision Power-on Reset trip point
0008 VLT_CR_LVDTBEN: equ 08h ; MASK: Enable the CPU Throttle Back on LVD
0007 VLT_CR_VM: equ 07h ; MASK: Mask for Voltage Monitor level setting
0000 VLT_CR_3V0_POR: equ 00h ; -- deprecated symbols --
0010 VLT_CR_4V5_POR: equ 10h ; deprecated
0020 VLT_CR_4V75_POR: equ 20h ; deprecated
0030 VLT_CR_DISABLE: equ 30h ; deprecated
0000
00E4 VLT_CMP: equ E4h ; Voltage Monitor Comparators Register (R)
0004 VLT_CMP_PUMP: equ 04h ; MASK: Vcc below SMP trip level
0002 VLT_CMP_LVD: equ 02h ; MASK: Vcc below LVD trip level
0001 VLT_CMP_PPOR: equ 01h ; MASK: Vcc below PPOR trip level
0000
00E8 IMO_TR: equ E8h ; Internal Main Oscillator Trim Register (W)
00E9 ILO_TR: equ E9h ; Internal Low-speed Oscillator Trim (W)
00EA BDG_TR: equ EAh ; Band Gap Trim Register (W)
00EB ECO_TR: equ EBh ; External Oscillator Trim Register (W)
0000
0000 ;;=============================================================================
0000 ;; M8C System Macros
0000 ;; These macros should be used when their functions are needed.
0000 ;;=============================================================================
0000
0000 ;----------------------------------------------------
0000 ; Swapping Register Banks
0000 ;----------------------------------------------------
0000 macro M8C_SetBank0
0000 and F, ~FLAG_XIO_MASK
0000 macro M8C_SetBank1
0000 or F, FLAG_XIO_MASK
0000 macro M8C_EnableGInt
0000 or F, FLAG_GLOBAL_IE
0000 macro M8C_DisableGInt
0000 and F, ~FLAG_GLOBAL_IE
0000 macro M8C_DisableIntMask
0000 and reg[@0], ~@1 ; disable specified interrupt enable bit
0000 macro M8C_EnableIntMask
0000 or reg[@0], @1 ; enable specified interrupt enable bit
0000 macro M8C_ClearIntFlag
0000 mov reg[@0], ~@1 ; clear specified interrupt enable bit
0000 macro M8C_EnableWatchDog
0000 and reg[CPU_SCR0], ~CPU_SCR0_PORS_MASK
0000 macro M8C_ClearWDT
0000 mov reg[RES_WDT], 00h
0000 macro M8C_ClearWDTAndSleep
0000 mov reg[RES_WDT], 38h
0000 macro M8C_Stall
0000 or reg[ASY_CR], ASY_CR_SYNCEN
0000 macro M8C_Unstall
0000 and reg[ASY_CR], ~ASY_CR_SYNCEN
0000 macro M8C_Sleep
0000 or reg[CPU_SCR0], CPU_SCR0_SLEEP_MASK
0000 ; The next instruction to be executed depends on the state of the
0000 ; various interrupt enable bits. If some interrupts are enabled
0000 ; and the global interrupts are disabled, the next instruction will
0000 ; be the one that follows the invocation of this macro. If global
0000 ; interrupts are also enabled then the next instruction will be
0000 ; from the interrupt vector table. If no interrupts are enabled
0000 ; then the CPU sleeps forever.
0000 macro M8C_Stop
0000 ; In general, you probably don't want to do this, but here's how:
0000 or reg[CPU_SCR0], CPU_SCR0_STOP_MASK
0000 ; Next instruction to be executed is located in the interrupt
0000 ; vector table entry for Power-On Reset.
0000 macro M8C_Reset
0000 ; Restore CPU to the power-on reset state.
0000 mov A, 0
0000 SSC
0000 ; Next non-supervisor instruction will be at interrupt vector 0.
0000 macro Suspend_CodeCompressor
0000 or F, 0
0000 macro Resume_CodeCompressor
0000 add SP, 0
export LoadConfigTBL_hitech_tst
AREA psoc_config(rom, rel)
0000 LoadConfigTBL_hitech_tst:
0000 ; Ordered Global Register values
0000 7110 or F, FLAG_XIO_MASK
0002 620000 mov reg[00h], 00h ; Port_0_DriveMode_0 register (PRT0DM0)
0005 6201FF mov reg[01h], ffh ; Port_0_DriveMode_1 register (PRT0DM1)
0008 70EF and F, ~FLAG_XIO_MASK
000A 6203FF mov reg[03h], ffh ; Port_0_DriveMode_2 register (PRT0DM2)
000D 620200 mov reg[02h], 00h ; Port_0_GlobalSelect register (PRT0GS)
0010 7110 or F, FLAG_XIO_MASK
0012 620200 mov reg[02h], 00h ; Port_0_IntCtrl_0 register (PRT0IC0)
0015 620300 mov reg[03h], 00h ; Port_0_IntCtrl_1 register (PRT0IC1)
0018 70EF and F, ~FLAG_XIO_MASK
001A 620100 mov reg[01h], 00h ; Port_0_IntEn register (PRT0IE)
001D 7110 or F, FLAG_XIO_MASK
001F 620400 mov reg[04h], 00h ; Port_1_DriveMode_0 register (PRT1DM0)
0022 6205FF mov reg[05h], ffh ; Port_1_DriveMode_1 register (PRT1DM1)
0025 70EF and F, ~FLAG_XIO_MASK
0027 6207FF mov reg[07h], ffh ; Port_1_DriveMode_2 register (PRT1DM2)
002A 620600 mov reg[06h], 00h ; Port_1_GlobalSelect register (PRT1GS)
002D 7110 or F, FLAG_XIO_MASK
002F 620600 mov reg[06h], 00h ; Port_1_IntCtrl_0 register (PRT1IC0)
0032 620700 mov reg[07h], 00h ; Port_1_IntCtrl_1 register (PRT1IC1)
0035 70EF and F, ~FLAG_XIO_MASK
0037 620500 mov reg[05h], 00h ; Port_1_IntEn register (PRT1IE)
003A 7110 or F, FLAG_XIO_MASK
003C 620800 mov reg[08h], 00h ; Port_2_DriveMode_0 register (PRT2DM0)
003F 6209FF mov reg[09h], ffh ; Port_2_DriveMode_1 register (PRT2DM1)
0042 70EF and F, ~FLAG_XIO_MASK
0044 620BFF mov reg[0bh], ffh ; Port_2_DriveMode_2 register (PRT2DM2)
0047 620A00 mov reg[0ah], 00h ; Port_2_GlobalSelect register (PRT2GS)
004A 7110 or F, FLAG_XIO_MASK
004C 620A00 mov reg[0ah], 00h ; Port_2_IntCtrl_0 register (PRT2IC0)
004F 620B00 mov reg[0bh], 00h ; Port_2_IntCtrl_1 register (PRT2IC1)
0052 70EF and F, ~FLAG_XIO_MASK
0054 620900 mov reg[09h], 00h ; Port_2_IntEn register (PRT2IE)
0057 7110 or F, FLAG_XIO_MASK
0059 620C00 mov reg[0ch], 00h ; Port_3_DriveMode_0 register (PRT3DM0)
005C 620D03 mov reg[0dh], 03h ; Port_3_DriveMode_1 register (PRT3DM1)
005F 70EF and F, ~FLAG_XIO_MASK
0061 620F03 mov reg[0fh], 03h ; Port_3_DriveMode_2 register (PRT3DM2)
0064 620E00 mov reg[0eh], 00h ; Port_3_GlobalSelect register (PRT3GS)
0067 7110 or F, FLAG_XIO_MASK
0069 620E00 mov reg[0eh], 00h ; Port_3_IntCtrl_0 register (PRT3IC0)
006C 620F00 mov reg[0fh], 00h ; Port_3_IntCtrl_1 register (PRT3IC1)
006F 70EF and F, ~FLAG_XIO_MASK
0071 620D00 mov reg[0dh], 00h ; Port_3_IntEn register (PRT3IE)
0074 70EF and F, ~FLAG_XIO_MASK
0076 ; Global Register values
0076 626009 mov reg[60h], 09h ; AnalogColumnInputSelect register (AMX_IN)
0079 626600 mov reg[66h], 00h ; AnalogComparatorControl1 register (CMP_CR1)
007C 626305 mov reg[63h], 05h ; AnalogReferenceControl register (ARF_CR)
007F 626500 mov reg[65h], 00h ; AnalogSyncControl register (ASY_CR)
0082 62E602 mov reg[e6h], 02h ; DecimatorControl_0 register (DEC_CR0)
0085 62E701 mov reg[e7h], 01h ; DecimatorControl_1 register (DEC_CR1)
0088 62D600 mov reg[d6h], 00h ; I2CConfig register (I2CCFG)
008B 62B000 mov reg[b0h], 00h ; Row_0_InputMux register (RDI0RI)
008E 62B100 mov reg[b1h], 00h ; Row_0_InputSync register (RDI0SYN)
0091 62B200 mov reg[b2h], 00h ; Row_0_LogicInputAMux register (RDI0IS)
0094 62B333 mov reg[b3h], 33h ; Row_0_LogicSelect_0 register (RDI0LT0)
0097 62B433 mov reg[b4h], 33h ; Row_0_LogicSelect_1 register (RDI0LT1)
009A 62B500 mov reg[b5h], 00h ; Row_0_OutputDrive_0 register (RDI0SRO0)
009D 62B600 mov reg[b6h], 00h ; Row_0_OutputDrive_1 register (RDI0SRO1)
00A0 626900 mov reg[69h], 00h ; SARADC_Control_0 register (SARADC_C0)
00A3 626A00 mov reg[6ah], 00h ; SARADC_Control_1 register (SARADC_C1)
00A6 ; Instance name DELSIG8_1, User Module DELSIG8
00A6 ; Instance name DELSIG8_1, Block Name ADC(ASC21)
00A6 629490 mov reg[94h], 90h ;DELSIG8_1_AtoDcr0(ASC21CR0)
00A9 629500 mov reg[95h], 00h ;DELSIG8_1_AtoDcr1(ASC21CR1)
00AC 629660 mov reg[96h], 60h ;DELSIG8_1_AtoDcr2(ASC21CR2)
00AF 6297F0 mov reg[97h], f0h ;DELSIG8_1_AtoDcr3(ASC21CR3)
00B2 ; Instance name DELSIG8_1, Block Name TMR(DBB01)
00B2 622700 mov reg[27h], 00h ;DELSIG8_1_TimerCR0(DBB01CR0)
00B5 622500 mov reg[25h], 00h ;DELSIG8_1_TimerDR1(DBB01DR1)
00B8 622600 mov reg[26h], 00h ;DELSIG8_1_TimerDR2(DBB01DR2)
00BB ; Instance name PWM8_1, User Module PWM8
00BB ; Instance name PWM8_1, Block Name PWM8(DBB00)
00BB 622300 mov reg[23h], 00h ;PWM8_1_CONTROL_REG(DBB00CR0)
00BE 622100 mov reg[21h], 00h ;PWM8_1_PERIOD_REG(DBB00DR1)
00C1 622200 mov reg[22h], 00h ;PWM8_1_COMPARE_REG(DBB00DR2)
00C4 7110 or F, FLAG_XIO_MASK
00C6 ; Global Register values
00C6 626100 mov reg[61h], 00h ; AnalogClockSelect1 register (CLK_CR1)
00C9 626900 mov reg[69h], 00h ; AnalogClockSelect2 register (CLK_CR2)
00CC 626000 mov reg[60h], 00h ; AnalogColumnClockSelect register (CLK_CR0)
00CF 626200 mov reg[62h], 00h ; AnalogIOControl_0 register (ABF_CR0)
00D2 626733 mov reg[67h], 33h ; AnalogLUTControl0 register (ALT_CR0)
00D5 626800 mov reg[68h], 00h ; AnalogLUTControl1 register (ALT_CR1)
00D8 626300 mov reg[63h], 00h ; AnalogModulatorControl_0 register (AMD_CR0)
00DB 626600 mov reg[66h], 00h ; AnalogModulatorControl_1 register (AMD_CR1)
00DE 62D100 mov reg[d1h], 00h ; GlobalDigitalInterconnect_Drive_Even_Input register (GDI_E_IN)
00E1 62D300 mov reg[d3h], 00h ; GlobalDigitalInterconnect_Drive_Even_Output register (GDI_E_OU)
00E4 62D000 mov reg[d0h], 00h ; GlobalDigitalInterconnect_Drive_Odd_Input register (GDI_O_IN)
00E7 62D200 mov reg[d2h], 00h ; GlobalDigitalInterconnect_Drive_Odd_Output register (GDI_O_OU)
00EA 62E100 mov reg[e1h], 00h ; OscillatorControl_1 register (OSC_CR1)
00ED 62E200 mov reg[e2h], 00h ; OscillatorControl_2 register (OSC_CR2)
00F0 62DF00 mov reg[dfh], 00h ; OscillatorControl_3 register (OSC_CR3)
00F3 62DE00 mov reg[deh], 00h ; OscillatorControl_4 register (OSC_CR4)
00F6 62DD00 mov reg[ddh], 00h ; OscillatorGlobalBusEnableControl register (OSC_GO_EN)
00F9 62AB00 mov reg[abh], 00h ; SARADC_Control_2 register (SARADC_C2)
00FC 62A800 mov reg[a8h], 00h ; SARADC_TriggerSource register (SARADC_TRS)
00FF ; Instance name DELSIG8_1, User Module DELSIG8
00FF ; Instance name DELSIG8_1, Block Name ADC(ASC21)
00FF ; Instance name DELSIG8_1, Block Name TMR(DBB01)
00FF 622420 mov reg[24h], 20h ;DELSIG8_1_TimerFN(DBB01FN)
0102 622510 mov reg[25h], 10h ;DELSIG8_1_TimerSL(DBB01IN)
0105 622640 mov reg[26h], 40h ;DELSIG8_1_TimerOS(DBB01OU)
0108 ; Instance name PWM8_1, User Module PWM8
0108 ; Instance name PWM8_1, Block Name PWM8(DBB00)
0108 622021 mov reg[20h], 21h ;PWM8_1_FUNC_REG(DBB00FN)
010B 622100 mov reg[21h], 00h ;PWM8_1_INPUT_REG(DBB00IN)
010E 622200 mov reg[22h], 00h ;PWM8_1_OUTPUT_REG(DBB00OU)
0111 70EF and F, ~FLAG_XIO_MASK
0113 7F ret
0114
0114
0114 ; PSoC Configuration file trailer PsocConfig.asm
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