fet440_lpm3.lst

关于用msp430f4xx系列显示的源码和protel ddb

###############################################################################
#                                                                             #
#     IAR Systems MSP430 Assembler V3.30A/W32  22/Nov/2005  00:10:50          #
#     Copyright 1996-2005 IAR Systems. All rights reserved.                   #
#                                                                             #
#           Source file   =  D:\MSP_v320\C_asm_jm\fet440_lpm3.s43             #
#           List file     =  D:\MSP_v320\C_asm_jm\Debug\List\fet440_lpm3.lst  #
#           Object file   =  D:\MSP_v320\C_asm_jm\Debug\Obj\fet440_lpm3.r43   #
#           Command line  =  -OD:\MSP_v320\C_asm_jm\Debug\Obj\ -s+ -M<> -w+   #
#                            -LD:\MSP_v320\C_asm_jm\Debug\List\ -t8           #
#                            -IC:\MSP_wb40\430\INC\ -r                        #
#                            D:\MSP_v320\C_asm_jm\fet440_lpm3.s43             #
#                                                                             #
###############################################################################

      1    001100              ;***********************************************
                               *******************************
      2    001100              ;   MSP-FET430P440 Demo - FLL+, LPM3 Using Basic
                                Timer ISR, 32kHz ACLK
      3    001100              ;
      4    001100              ;   Description: System runs normally in LPM3
                                with basic timer clocked by
      5    001100              ;   32kHz ACLK. At a 2 second interval the basic
                                timer ISR will wake the
      6    001100              ;   system and flash the LED on P5.1 inside of
                                the Mainloop.
      7    001100              ;   ACLK = LFXT1 = 32768Hz, MCLK = SMCLK =
                                default DCO = 32 x ACLK = 1048576Hz
      8    001100              ;   ;* An external watch crystal between XIN &
                                XOUT is required for ACLK *//    
      9    001100              ;
     10    001100              ;                MSP430F449
     11    001100              ;             -----------------
     12    001100              ;         /|\|              XIN|-
     13    001100              ;          | |                 | 32kHz
     14    001100              ;          --|RST          XOUT|-
     15    001100              ;            |                 |
     16    001100              ;            |             P5.1|-->LED
     17    001100              ;
     18    001100              ;   M. Buccini / A. Dannenberg
     19    001100              ;   Texas Instruments Inc.
     20    001100              ;   May 2005
     21    001100              ;   Built with Code Composer Essentials Version:
                                1.0
     22    001100              ;***********************************************
                               *******************************
     23    001100              
     24    001100              #include "msp430x44x.h"
     25    001100              ;-----------------------------------------------
                               -------------------------------
     26    001100                           ORG     01100h                  ;
  Progam Start                                     ; Program Start
     27    001100              ;-----------------------------------------------
                               -------------------------------
     28    001100 3140000A     RESET      mov.w   #0A00h,SP               ;
  Initialize stackpointer
     29    001104 B240805A2001 StopWDT     mov.w   #WDTPW+WDTHOLD,&WDTCTL  ;
  Stop WDT
     30    00110A F2D020005300 SetupFLL    bis.b   #XCAP14PF,&FLL_CTL0     ;
  Configure load caps
     31    001110 F24027004000 SetupBT     mov.b   #BTDIV+BTIP2+BTIP1+BTIP0,&BT
 CTL   ; 2s Int.
     32    001116 F2D080000100             bis.b   #BTIE,&IE2              ;
  Enable Basic Timer interrupt
     33    00111C F2433600     SetupPx     mov.b   #0FFh,&P6DIR            ;
  P6.x output
     34    001120 C2433500                 clr.b   &P6OUT                 
  ;
     35    001124 F2433200                 mov.b   #0FFh,&P5DIR            ;
  P5.x output
     36    001128 C2433100                 clr.b   &P5OUT                 
  ;
     37    00112C F2431E00                 mov.b   #0FFh,&P4DIR            ;
  P4.x output
     38    001130 C2431D00                 clr.b   &P4OUT                 
  ;
     39    001134 F2431A00                 mov.b   #0FFh,&P3DIR            ;
  P3.x output
     40    001138 C2431900                 clr.b   &P3OUT                 
  ;
     41    00113C F2432A00                 mov.b   #0FFh,&P2DIR            ;
  P2.x output
     42    001140 C2432900                 clr.b   &P2OUT                 
  ;
     43    001144 F2432200                 mov.b   #0FFh,&P1DIR            ;
  P1.x output
     44    001148 C2432100                 clr.b   &P1OUT                 
  ;
     45    00114C                                                          ;   
                                                                               
                                                                      
                                
     46    00114C 32D0D800     Mainloop    bis.w   #LPM3+GIE,SR            ;
  Enter LPM3, enable interrupts
     47    001150 E2D33100                 bis.b   #002h,&P5OUT            ;
  set P5.1
     48    001154 3012D007                 push    #2000                   ;
                                                    Delay to TOS
     49    001158 91830000     Pulse       dec.w   0(SP)                   ;
  Decrement Value at TOS
     50    00115C FD23                     jnz     Pulse                   ;
  Delay done?
     51    00115E 2153                     incd.w  SP                      ;
  Clean-up stack
     52    001160 E2C33100                 bic.b   #002h,&P5OUT            ;
  Reset P5.1
     53    001164 F33F                     jmp     Mainloop               
  ;
     54    001166                                                         
                                ;
     55    001166              ;-----------------------------------------------
                               -------------------------------
     56    001166              BT_ISR;     Exit LPM3 on reti
     57    001166              ;-----------------------------------------------
                               -------------------------------
     58    001166 B1C0D0000000             bic.w   #LPM3,0(SP)            
  ;
     59    00116C 0013                     reti                            ;   
         
     60    00116E                                                         
                                ;
     61    00116E              ;-----------------------------------------------
                               ------------------------------
     62    00116E              ;           Interrupt Vectors
     63    00116E              ;-----------------------------------------------
                               ------------------------------
     64    00FFFE                           ORG     0FFFEh                 ;
  RESET Vector
     65    00FFFE 0011                      DW      RESET                
                                                      ;
     66    00FFE0                           ORG     0FFE0h              ; Basic
                                                                         Timer
                                                                         Vector
     67    00FFE0 6611                      DW      BT_ISR                 
                                                      ;
     68    00FFE2                           END
##############################
#          CRC:7CBE          #
#        Errors:   0         #
#        Warnings: 0         #
#         Bytes: 114         #
##############################