at2041_api.c

这个是Linux下的应用程序

/* set tabstop=4 */
/********************************************************************************
 *                                                                              *
 * Copyright(C) 2002  Penta-Micro                                               *
 *                                                                              *
 * ALL RIGHT RESERVED                                                           *
 *                                                                              *
 * This software is the property of Penta-Micro and is furnished under          *
 * license by Penta-Micro. This software may be used only in accordance         *	
 * with the terms of said license. This copyright notice may not be             *
 * removed, modified or obliterated without the prior written permission        *
 * of Penta-Micro.                                                              *
 *                                                                              *
 * This software may not be copyed, transmitted, provided to or otherwise       *
 * made available to any other person, company, corporation	or other entity     *
 * except as specified in the terms of said license.                            *
 *                                                                              *
 * No right, title, ownership or other interest in the software is hereby       *
 * granted or transferred.                                                      *
 *                                                                              *
 * The information contained herein is subject to change without notice and     *
 * should not be construed as a commitment by Penta-Micro.                      *
 *                                                                              *
 ********************************************************************************
 
  MODULE NAME:  AT2041_API.C
 
  DESCRIPTION:
  
  This Module contains AT2041 API function.
  
 ...............................................................................
*/            
 

/** ************************************************************************* ** 
 ** includes
 ** ************************************************************************* **/
#include <fcntl.h>
#include <stdio.h>
#include <stdlib.h>
#include <asm/ioctl.h>
#include <asm/errno.h>
#include <linux/i2c.h>
#include <linux/i2c-dev.h>
#include <linux/slab.h>
#include <linux/config.h>

#include "typedef.h"
#include "at2041_api.h"
#include "at2041reg.h"

	
/** ************************************************************************* ** 
 ** defines
 ** ************************************************************************* **/
//#define m_DEBUG(format, args...)  printf(format, ## args) 
#define m_DEBUG(format, args...)  


/** ************************************************************************* ** 
 ** typedefs
 ** ************************************************************************* **/

	 
/** ************************************************************************* ** 
 ** globals
 ** ************************************************************************* **/
//#define DEBUG_STREAM0(fmt, args...) {printf("[%s %s %d]" fmt,__FILE__,__FUNCTION__,__LINE__,## args);fflush(stdout);}
#define DEBUG_STREAM0(fmt, args...) printf(fmt, ## args)
#define DEBUG_STREAM1(fmt, args...) { }
  
/** ************************************************************************* ** 
 ** locals
 ** ************************************************************************* **/
int at2042_fd;
int i2c0_fd, i2c1_fd;
uns16  rx_id, rx_data, state;


/** ************************************************************************* ** 
 ** forward declarations
 ** ************************************************************************* **/

/* AT2041 general functions */
int at2041_open(void)
{
	printf("at2041_open\n");
	/* file[AT2041 device] open */
	if (!(at2042_fd = open("/dev/at2041", O_RDWR))) {
		printf(" device driver open fail!!!\n");
		return 0;
	}
	return 0;
}

void at2041_close(void)
{
	close(at2042_fd);
}

void at2041_ioctl_init()
{
	//uns16 dummy;
	unsigned long dummy;

	if (!at2042_fd){
		printf("error in at2042_fd\n");
	}
	else	{
		ioctl(at2042_fd, AT2041_INIT, &dummy);	
	}
}

/* 
 * Rx FIFO access 
 */

/* Global parameters */
void ack_for_tx(void)
{
	_SET_REG_STR_ set_reg_st={0,0,{0,0,0,0,0,0}};
	rx_id = RxID(GID_GLB, 0x00, PID_GLB_ACK, W_FLAG);
	//ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &rx_id);
	set_reg_st.cmd_num=0;
	set_reg_st.addr=AT2041_RX_FIFO_ADDR;
	set_reg_st.value[0]=rx_id;	
	ioctl(at2042_fd, SET_REG, &set_reg_st);
}

void set_operation_mode(uns16 mode)
{
        /* mode : '0' forbidden, '1' encoder, '2' decoder, '3' codec
         *        default is 0x00
         */
        rx_id = RxID(GID_GLB, 0x00, PID_GLB_OP, W_FLAG);
        write_parm(rx_id, mode);
}

void set_sdram_size(uns16 size)
{
        /* size : 64 ~ 1024 Mbit, default is 256 Mbit */
        rx_id = RxID(GID_GLB, 0x00, PID_GLB_SDR_SIZE, W_FLAG);
        write_parm(rx_id, size);
}

void set_maximum_video_size(uns16 hsize, uns16 vsize)
{
	_SET_REG_STR_ set_reg_st={0,0,{0,0,0,0,0,0}};
        /* hsize : 32 ~ 720, vsize : 16 ~ 576
         *         default is 720 x 576
         */
        rx_id = RxID(GID_GLB, 0x00, PID_GLB_VID_SIZE, W_FLAG);
#if 0		
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &rx_id);
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &hsize);
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &vsize);
#else
	set_reg_st.cmd_num=2;
	set_reg_st.addr=AT2041_RX_FIFO_ADDR;
	set_reg_st.value[0]=rx_id;	
	set_reg_st.value[1]=hsize;set_reg_st.value[2]=vsize;
	ioctl(at2042_fd, SET_REG, &set_reg_st);
#endif
}

void set_channel_size(uns16 ch_size)
{
        /* ch_size : 1 ~ 16 channel, default is 4 channel */
        rx_id = RxID(GID_GLB, 0x00, PID_GLB_CH_SIZE, W_FLAG);
        write_parm(rx_id, ch_size);
}

void set_maximum_gopm(uns16 gopm_size)
{
        /* gopm_size : 1 ~ 3, default is 3 */
        rx_id = RxID(GID_GLB, 0x00, PID_GLB_GOPM_SIZE, W_FLAG);
        write_parm(rx_id, gopm_size);
}

void set_gio_mode(uns16 mode)
{
	rx_id= RxID(GID_GLB, 0x00, PID_GLB_GIO_MODE, W_FLAG);
	write_parm(rx_id, mode);
}

void set_encoder_buffer_size(uns16 system_stream_buf_size, uns16 video_es_buf_size, 
	uns16 audio_es_buf_size, uns16 audio_data_input_buf_size)
{
	_SET_REG_STR_ set_reg_st={0,0,{0,0,0,0,0,0}};
        /* system_stream_buf_size : 1 ~ 16 Mbit, default is 1 Mbit
         * video_es_buf_size : 1 ~ 16 Mbit, default is 4 Mbit
         * audio_es_buf_size : 1 ~ 16 Mbit, default is 1 Mbit
         * audio_data_input_buf_size : 1 ~ 16 Mbit, default is 2 Mbit
         */
        rx_id = RxID(GID_GLB, 0x00, PID_GLB_ENCB_SIZE, W_FLAG);
#if 0		
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &rx_id);
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &system_stream_buf_size);
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &video_es_buf_size);
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &audio_es_buf_size);
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &audio_data_input_buf_size);
#else
	set_reg_st.cmd_num=4;
	set_reg_st.addr=AT2041_RX_FIFO_ADDR;
	set_reg_st.value[0]=rx_id;	
	set_reg_st.value[1]=system_stream_buf_size;set_reg_st.value[2]=video_es_buf_size;
	set_reg_st.value[3]=audio_es_buf_size;set_reg_st.value[4]=audio_data_input_buf_size;
	ioctl(at2042_fd, SET_REG, &set_reg_st);
#endif
}

void set_decoder_buffer_size(uns16 input_stream_buf0_size, uns16 input_stream_buf1_size, 
	uns16 input_stream_buf2_size, uns16 input_stream_buf3_size, 
	uns16 audio_data_output_buf_size)
{
	_SET_REG_STR_ set_reg_st={0,0,{0,0,0,0,0,0}};
        /* input_stream_buf0_size : 1 ~ 16 Mbit, default is 4 Mbit
         * input_stream_buf1_size : 1 ~ 16 Mbit, default is 2 Mbit
         * input_stream_buf2_size : 1 ~ 16 Mbit, default is 1 Mbit
         * input_stream_buf3_size : 1 ~ 16 Mbit, default is 1 Mbit
         * audio_data_output_buf_size : 1 ~ 16 Mbit, default is 2 Mbit
         */
        rx_id = RxID(GID_GLB, 0x00, PID_GLB_DECB_SIZE, W_FLAG);
#if 0		
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &rx_id);
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &input_stream_buf0_size);
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &input_stream_buf1_size);
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &input_stream_buf2_size);
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &input_stream_buf3_size);
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &audio_data_output_buf_size);
#else
	set_reg_st.cmd_num=5;
	set_reg_st.addr=AT2041_RX_FIFO_ADDR;
	set_reg_st.value[0]=rx_id;	
	set_reg_st.value[1]=input_stream_buf0_size;set_reg_st.value[2]=input_stream_buf1_size;
	set_reg_st.value[3]=input_stream_buf2_size;set_reg_st.value[4]=input_stream_buf3_size;
	set_reg_st.value[5]=audio_data_output_buf_size;
	ioctl(at2042_fd, SET_REG, &set_reg_st);
#endif
}

void sdram_allocation(void)
{
        /* before this command, you should set the following parameters properly
         * operation mode, SDRAM size, maximum video size, channel size,
         * maxmum GOPM, encoder buffer size, decoder buffer size etc.
         */
        rx_id = RxID(GID_GLB, 0x00, PID_GLB_SDR_ALLOC, W_FLAG);
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &rx_id);
}

/* Encoder system parameters */
void encoder_start(void)
{
	/* video/audio encoder start */
	rx_id = RxID(GID_ENC, 0x00, PID_ENC_START, W_FLAG);
	write_parm(rx_id, 0x0003);
}

void encoder_stop(void)
{
	/* video/audio encoder stop */
	rx_id = RxID(GID_ENC, 0x00, PID_ENC_STOP, W_FLAG);
	write_parm(rx_id, 0x0003);
}

void video_encoder_start(unsigned short mode) 
{
	rx_id = RxID(GID_ENC, 0x00, PID_ENC_START, W_FLAG);
	write_parm(rx_id, mode);
	printf ("video_encoder_start : 0x%04x\n", mode);
}

void video_encoder_stop(unsigned short mode) 
{
 	rx_id = RxID(GID_ENC, 0x00, PID_ENC_STOP, W_FLAG);
	write_parm(rx_id, mode);
	printf ("video_encoder_stop : 0x%04x\n", mode);
 }

#if 0
void audio_encoder_start(void)
{
        rx_id = RxID(GID_ENC, 0x00, PID_ENC_START, R_FLAG);

        /* read current audio encoder state */
        state = read_state(rx_id);

        /* preserve video state and set 'audio encoder start' command */
        rx_data = state & 0x01;
        rx_data |= 0x02;

        /* write flag */
        rx_id = RxID(GID_ENC, 0x00, PID_ENC_START, W_FLAG);
        write_parm(rx_id, rx_data);
}

void audio_encoder_stop(void)
{
        rx_id = RxID(GID_ENC, 0x00, PID_ENC_START, R_FLAG);

        /* read current video encoder state */
        state = read_state(rx_id);

        /* 'audio encoder stop' parameter setting without changing video encoder state */
        rx_data = (state & 0x01);
        rx_id = RxID(GID_ENC, 0x00, PID_ENC_STOP, W_FLAG);
        write_parm(rx_data, rx_data);
}
#endif

void output_stream_format(uns16 form)
{
         /* form : '0' ES, '1' PES, '2' PS, '3' TS, default is PES */
        rx_id = RxID(GID_ENC, 0x00, PID_ENC_STR_FMT, W_FLAG);
        write_parm(rx_id, form);
 }

void set_max_output_data_size(uns16 size)
{
         /* if the output data size is lager than the size,
         * output data will be splitted.
         * size : maximum data size (KByte unit)
         *        default is 64KByte
         */
        rx_id = RxID(GID_ENC, 0x00, PID_ENC_DMAX, W_FLAG);
        write_parm(rx_id, size);
 }

/* Encoder video parameters */
void set_input_video_parameter(uns16 hsize, uns16 vsize, uns16 rate, uns16 field)
{
	_SET_REG_STR_ set_reg_st={0,0,{0,0,0,0,0,0}};
        /* hsize : horizontal size (32 ~ 720)
         * vsize : vertical size (16 ~ 576)
         * rate  : video input rate code, it's not frame_rate_code of MPEG standard
         *         '0' forbidden, '1' 24000/1001, '2' 24, '3' 25, '4' 30000/1001,
         *         '5' 30, '6' 50, '7' 60000/1001, '8' 60, '9' 100, '10' 120000/1001
         *         '11' 120
         * field : '0' frame mode input (interlaced)
         *         '1' field mode input (progressive)
         */
        rx_id = RxID(GID_EV, 0x00, PID_EV_FMT, W_FLAG);
#if 0
        /* horizontal size setting */
        rx_data = hsize & 0x3ff;
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &rx_id);
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &rx_data);

        /* vertical size setting */
        rx_data = vsize & 0x3ff;
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &rx_data);

        /* video input rate and field mode setting */
        rx_data = (uns16)(((field & 0x01) << 4) | (rate & 0x0f));
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &rx_data);
#else
	set_reg_st.cmd_num=3;
	set_reg_st.addr=AT2041_RX_FIFO_ADDR;
	set_reg_st.value[0]=rx_id;	
	set_reg_st.value[1]=hsize & 0x3ff; set_reg_st.value[2]= vsize & 0x3ff;	
	//set_reg_st.value[3]=(uns16)(((field & 0x01) << 4) | (rate & 0x0f));
	set_reg_st.value[3]=(uns16)((field & 0x01) << 4);	/*2005-01-13*/
	set_reg_st.value[3]=(uns16)(rate & 0x0f);	
	ioctl(at2042_fd, SET_REG, &set_reg_st);	        		
#endif		
}

void set_input_video_clock_inversion(uns16 mode)
{
         /* mode : '0' use input clock, '1' use inverted input clock, default is 0 */
        rx_id = RxID(GID_EV, 0x00, PID_EV_CLK_INV, W_FLAG);
        write_parm(rx_id, mode);
 }

void set_input_video_sync_mode(uns16 sync)
{
         /* sync : '0' embedded sync
         *        '1' BT embedded sync mode, regards the data of '0x00' as invalid data
         *        '2' external sync
         *         default is external sync
         */
        rx_id = RxID(GID_EV, 0x00, PID_EV_SYNC_M, W_FLAG);
        write_parm(rx_id, sync);
 }

void enc_vertical_offset_mode(uns16 mode)
{
         /* This is valid only if input video sync mode = 0
         * mode : '0' don't care the vertical offset value
         *        '1' use the verical offset value
         *        default is 1
         */
        rx_id = RxID(GID_EV, 0x00, PID_EV_VOFF_M, W_FLAG);
        write_parm(rx_id, mode);
 }

void enc_vertical_offset(uns16 voff_e, uns16 voff_o)
{
	_SET_REG_STR_ set_reg_st={0,0,{0,0,0,0,0,0}};
        /* voff_e : vertical offset for even field from FSYNC, default is 22
         * voff_o : vertical offset for odd field from FSYNC, default is 21
         */
        rx_id = RxID(GID_EV, 0x00, PID_EV_VOFF_V, W_FLAG);
#if 0
        /* vertical offset for even field */
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &rx_id);
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &voff_e);
        /* vertical offset for odd field */
        ioctl(at2042_fd, AT2041_RX_FIFO_ADDR, &voff_o);
#else
	set_reg_st.cmd_num=2;
	set_reg_st.addr=AT2041_RX_FIFO_ADDR;
	set_reg_st.value[0]=rx_id;	
	set_reg_st.value[1]=voff_e;set_reg_st.value[2]=voff_o;
	ioctl(at2042_fd, SET_REG, &set_reg_st);	        				
#endif	
}

void set_field_sync_mode(uns16 mode)
{
        /* mode : '0' generate field sync using the 'first field decision parameter'
         *        '1' use the input field sync
         *        default is 0
         */
        rx_id = RxID(GID_EV, 0x00, PID_EV_FSYNC_M, W_FLAG);
        write_parm(rx_id, mode);
}

void set_first_field_decision_parameter(uns16 value)
{
        /* This is valid only if the field sync mode is 0
         * if the number of clock cycles between the start of vertical sync
         * and the start of horizontal sync falling is less than or equal
         * to this value, the next field is the first field.
         * default is 128
         */
        rx_id = RxID(GID_EV, 0x00, PID_EV_FSYNC_P, W_FLAG);
        write_parm(rx_id, value);
}

void set_video_input_sync_polarity(uns16 hvalid_polarity, uns16 hsync_polarity, 
	uns16 vvalid_polarity, uns16 vsync_polarity, uns16 fsync_first_field)
{
        /* hvalid_polarity : '0' active low, '1' active high, default is 1
         * hsync_polarity : '0' active high, '1' active low, default is 1
         * vvalid_polarity : '0' active low, '1' active high, default is 1
         * vsync_polarity : '0' active high, '1' active low, default is 1
         * fsync_first_field : field sync value of the first field, default is 0
	 */
        rx_id = RxID(GID_EV, 0x00, PID_EV_SYNC_POL, W_FLAG);
        rx_data = (fsync_first_field << 4) | (vsync_polarity << 3) | (vvalid_polarity << 2) | 
		  (hsync_polarity << 1) | (hvalid_polarity);
        write_parm(rx_id, rx_data);
}

void input_video_data_saturation_value(uns16 min_luma, uns16 max_luma,