74xx196.mdf

Proteus+7.8+元件库

LISA MODEL DESCRIPTION FORMAT 5.0
=================================
Design:   C:\PRODEV\Libs\DIGITAL\TTL\74xx196.DSN
Doc. no.: <NONE>
Revision: <NONE>
Author:   <NONE>
Created:  06-Sep-93
Modified: 04/03/01

*PROPERTIES,5    
INIT0=?
INIT1=?
INIT2=?
INIT3=?
TGQ=?

*MAPPINGS,3,VALUE
74LS196 : TDLHCQA=8n,  TDHLCQA=13n, TDLHCQB=16n, TDHLCQB=22n, TDLHCQC=38n, TDHLCQC=41n, TDLHCQD=12n, TDHLCQD=30n, TD1=7n, TD2=7n, TD3=8n, TDRQ=16n, TDSQ=12n, TDMR=4n
74S196 : TDLHCQA=5n,  TDHLCQA=6n, TDLHCQB=5n,  TDHLCQB=8n, TDLHCQC=12n, TDHLCQC=16n, TDLHCQD=5n,  TDHLCQD=8n, TD1=3n, TD2=3n, TD3=3n, TDRQ=6n, TDSQ=4n, TDMR=14n
74196 : TDLHCQA=7n,  TDHLCQA=10n, TDLHCQB=12n, TDHLCQB=14n, TDLHCQC=24n, TDHLCQC=28n, TDLHCQD=14n, TDHLCQD=12n, TD1=6n, TD2=6n, TD3=7n, TDRQ=12n, TDSQ=9n, TDMR=1n

*MODELDEFS,0    

*PARTLIST,16   
U1,JKFF,JKFF,INIT=<INIT0>,INVERT="CLK,SET,RESET",PRIMITIVE=DIGITAL,QSANDR=3,TDHLCQ=<TDHLCQA>,TDLHCQ=<TDLHCQA>,TDRQ=<TDRQ>,TDSQ=<TDSQ>,TGQ=<TGQ>
U2,JKFF,JKFF,INIT=<INIT1>,INVERT="CLK,SET,RESET",PRIMITIVE=DIGITAL,QSANDR=3,TDHLCQ=<TDHLCQB>,TDLHCQ=<TDLHCQB>,TDRQ=<TDRQ>,TDSQ=<TDSQ>,TGQ=<TGQ>
U3,NAND_2,NAND_2,PRIMITIVE=DIGITAL,TDHLDQ=<TD2>,TDLHDQ=<TD2>
U4,NAND_3,NAND_3,PRIMITIVE=DIGITAL,TDHLDQ=<TD3>,TDLHDQ=<TD3>
U5,NAND_2,NAND_2,PRIMITIVE=DIGITAL,TDHLDQ=<TD2>,TDLHDQ=<TD2>
U6,NAND_2,NAND_2,PRIMITIVE=DIGITAL,TDHLDQ=<TD2>,TDLHDQ=<TD2>
U7,JKFF,JKFF,INIT=<INIT2>,INVERT="CLK,SET,RESET",PRIMITIVE=DIGITAL,QSANDR=3,TDHLCQ=<TDHLCQC>-<TDHLCQB>,TDLHCQ=<TDLHCQC>-<TDHLCQB>,TDRQ=<TDRQ>,TDSQ=<TDSQ>,TGQ=<TGQ>
U8,BUFFER,BUFFER,PRIMITIVE=DIGITAL,TDHLDQ=<TD1>,TDLHDQ=<TD1>
U9,NAND_3,NAND_3,PRIMITIVE=DIGITAL,TDHLDQ=<TD3>,TDLHDQ=<TD3>
U10,JKFF,JKFF,INIT=<INIT3>,INVERT="CLK,SET,RESET",PRIMITIVE=DIGITAL,QSANDR=3,TDHLCQ=<TDHLCQD>,TDLHCQ=<TDLHCQD>,TDRQ=<TDRQ>,TDSQ=<TDSQ>,TGQ=<TGQ>
U11,NAND_2,NAND_2,PRIMITIVE=DIGITAL,TDHLDQ=<TD2>,TDLHDQ=<TD2>
U12,NAND_3,NAND_3,PRIMITIVE=DIGITAL,TDHLDQ=<TD3>,TDLHDQ=<TD3>
U13,NAND_2,NAND_2,PRIMITIVE=DIGITAL,TDHLDQ=<TD2>,TDLHDQ=<TD2>
U14,NAND_3,NAND_3,PRIMITIVE=DIGITAL,TDHLDQ=<TD3>,TDLHDQ=<TD3>
U15,AND_2,AND_2,PRIMITIVE=DIGITAL,TDHLDQ=<TD2>,TDLHDQ=<TD2>
U16,BUFFER,BUFFER,PRIMITIVE=DIGITAL,TDHLDQ=<TDMR>,TDLHDQ=<TDMR>

*NETLIST,29   
#00000,1
U1,OP,!Q

#00001,2
U1,IP,RESET
U3,OP,Q

#00002,3
U1,IP,SET
U4,OP,Q
U3,IP,D0

#00003,1
U2,OP,!Q

#00004,2
U2,IP,RESET
U5,OP,Q

#00005,3
U2,PS,J
U2,PS,K
U10,OP,!Q

#00006,3
U2,IP,SET
U9,OP,Q
U5,IP,D0

#00007,1
U7,OP,!Q

#00008,2
U7,IP,RESET
U11,OP,Q

#00009,3
U7,IP,SET
U12,OP,Q
U11,IP,D0

#00010,2
U10,IP,RESET
U13,OP,Q

#00011,2
U10,PS,J
U15,OP,Q

#00012,3
U10,IP,SET
U14,OP,Q
U13,IP,D0

#00013,9
U3,IP,D1
U4,IP,D1
U6,OP,Q
U5,IP,D1
U11,IP,D1
U13,IP,D1
U14,IP,D1
U12,IP,D1
U9,IP,D1

#00014,5
U4,IP,D2
U9,IP,D2
U12,IP,D2
U14,IP,D2
U8,OP,Q

#00015,3
U6,IP,D1
U8,IP,D
U16,OP,Q

CLK1,2
CLK1,IT
U1,IP,CLK

Q0,2
Q0,OT
U1,OP,Q

PL,2
PL,IT
U6,IP,D0

D0,2
D0,IT
U4,IP,D0

CLK2,3
CLK2,IT
U2,IP,CLK
U10,IP,CLK

Q1,4
Q1,OT
U2,OP,Q
U7,IP,CLK
U15,IP,D1

Q2,3
Q2,OT
U7,OP,Q
U15,IP,D0

VCC,5
VCC,PR
U7,PS,J
U7,PS,K
U1,PS,J
U1,PS,K

Q3,3
Q3,OT
U10,OP,Q
U10,PS,K

D1,2
D1,IT
U9,IP,D0

D2,2
D2,IT
U12,IP,D0

D3,2
D3,IT
U14,IP,D0

MR,2
MR,IT
U16,IP,D

*GATES,0