cpu.hier_info

来自「微程序模拟CPU实现加减与或异或转移储存等功能。」· HIER_INFO 代码 · 共 841 行 · 第 1/2 页

reset => mem[0][1].ACLR
reset => mem[0][0].ACLR
reset => mem[1][7].ACLR
reset => mem[1][6].ACLR
reset => mem[1][5].PRESET
reset => mem[1][4].ACLR
reset => mem[1][3].ACLR
reset => mem[1][2].PRESET
reset => mem[1][1].ACLR
reset => mem[1][0].PRESET
reset => mem[2][7].PRESET
reset => mem[2][6].ACLR
reset => mem[2][5].PRESET
reset => mem[2][4].ACLR
reset => mem[2][3].ACLR
reset => mem[2][2].PRESET
reset => mem[2][1].PRESET
reset => mem[2][0].ACLR
reset => mem[3][7].PRESET
reset => mem[3][6].PRESET
reset => mem[3][5].ACLR
reset => mem[3][4].ACLR
reset => mem[3][3].ACLR
reset => mem[3][2].PRESET
reset => mem[3][1].PRESET
reset => mem[3][0].PRESET
reset => mem[4][7].ACLR
reset => mem[4][6].ACLR
reset => mem[4][5].ACLR
reset => mem[4][4].ACLR
reset => mem[4][3].ACLR
reset => mem[4][2].ACLR
reset => mem[4][1].PRESET
reset => mem[4][0].PRESET
reset => mem[5][7].ACLR
reset => mem[5][6].ACLR
reset => mem[5][5].ACLR
reset => mem[5][4].ACLR
reset => mem[5][3].ACLR
reset => mem[5][2].PRESET
reset => mem[5][1].ACLR
reset => mem[5][0].ACLR
reset => mem[6][7].ACLR
reset => mem[6][6].ACLR
reset => mem[6][5].ACLR
reset => mem[6][4].ACLR
reset => mem[6][3].ACLR
reset => mem[6][2].ACLR
reset => mem[6][1].ACLR
reset => mem[6][0].PRESET
reset => mem[7][7].ACLR
reset => mem[7][6].ACLR
reset => mem[7][5].ACLR
reset => mem[7][4].ACLR
reset => mem[7][3].ACLR
reset => mem[7][2].ACLR
reset => mem[7][1].PRESET
reset => mem[7][0].ACLR
reset => mem[8][7].ACLR
reset => mem[8][6].ACLR
reset => mem[8][5].ACLR
reset => mem[8][4].ACLR
reset => mem[8][3].ACLR
reset => mem[8][2].ACLR
reset => mem[8][1].ACLR
reset => mem[8][0].ACLR
reset => mem[9][7].ACLR
reset => mem[9][6].ACLR
reset => mem[9][5].ACLR
reset => mem[9][4].ACLR
reset => mem[9][3].ACLR
reset => mem[9][2].ACLR
reset => mem[9][1].ACLR
reset => mem[9][0].ACLR
reset => mem[10][7].ACLR
reset => mem[10][6].ACLR
reset => mem[10][5].ACLR
reset => mem[10][4].ACLR
reset => mem[10][3].ACLR
reset => mem[10][2].ACLR
reset => mem[10][1].ACLR
reset => mem[10][0].ACLR
reset => mem[11][7].ACLR
reset => mem[11][6].ACLR
reset => mem[11][5].ACLR
reset => mem[11][4].ACLR
reset => mem[11][3].ACLR
reset => mem[11][2].ACLR
reset => mem[11][1].ACLR
reset => mem[11][0].ACLR
reset => mem[12][7].ACLR
reset => mem[12][6].ACLR
reset => mem[12][5].ACLR
reset => mem[12][4].ACLR
reset => mem[12][3].ACLR
reset => mem[12][2].ACLR
reset => mem[12][1].ACLR
reset => mem[12][0].ACLR
reset => mem[13][7].ACLR
reset => mem[13][6].ACLR
reset => mem[13][5].ACLR
reset => mem[13][4].ACLR
reset => mem[13][3].ACLR
reset => mem[13][2].ACLR
reset => mem[13][1].ACLR
reset => mem[13][0].ACLR
reset => mem[14][7].ACLR
reset => mem[14][6].ACLR
reset => mem[14][5].ACLR
reset => mem[14][4].ACLR
reset => mem[14][3].ACLR
reset => mem[14][2].ACLR
reset => mem[14][1].ACLR
reset => mem[14][0].ACLR
reset => mem[15][7].ACLR
reset => mem[15][6].ACLR
reset => mem[15][5].ACLR
reset => mem[15][4].ACLR
reset => mem[15][3].ACLR
reset => mem[15][2].ACLR
reset => mem[15][1].ACLR
reset => mem[15][0].ACLR
reset => mem[16][7].ACLR
reset => mem[16][6].ACLR
reset => mem[16][5].ACLR
reset => mem[16][4].ACLR
reset => mem[16][3].ACLR
reset => mem[16][2].ACLR
reset => mem[16][1].ACLR
reset => mem[16][0].ACLR
reset => mem[17][7].ACLR
reset => mem[17][6].ACLR
reset => mem[17][5].ACLR
reset => mem[17][4].ACLR
reset => mem[17][3].ACLR
reset => mem[17][2].ACLR
reset => mem[17][1].ACLR
reset => mem[17][0].ACLR
reset => mem[18][7].ACLR
reset => mem[18][6].ACLR
reset => mem[18][5].ACLR
reset => mem[18][4].ACLR
reset => mem[18][3].ACLR
reset => mem[18][2].ACLR
reset => mem[18][1].ACLR
reset => mem[18][0].ACLR
reset => mem[19][7].ACLR
reset => mem[19][6].ACLR
reset => mem[19][5].ACLR
reset => mem[19][4].ACLR
reset => mem[19][3].ACLR
reset => mem[19][2].ACLR
reset => mem[19][1].ACLR
reset => mem[19][0].ACLR
reset => mem[20][7].ACLR
reset => mem[20][6].ACLR
reset => mem[20][5].ACLR
reset => mem[20][4].ACLR
reset => mem[20][3].ACLR
reset => mem[20][2].ACLR
reset => mem[20][1].ACLR
reset => mem[20][0].ACLR
reset => mem[21][7].ACLR
reset => mem[21][6].ACLR
reset => mem[21][5].ACLR
reset => mem[21][4].ACLR
reset => mem[21][3].ACLR
reset => mem[21][2].ACLR
reset => mem[21][1].ACLR
reset => mem[21][0].ACLR
reset => mem[22][7].ACLR
reset => mem[22][6].ACLR
reset => mem[22][5].ACLR
reset => mem[22][4].ACLR
reset => mem[22][3].ACLR
reset => mem[22][2].ACLR
reset => mem[22][1].ACLR
reset => mem[22][0].ACLR
reset => mem[23][7].ACLR
reset => mem[23][6].ACLR
reset => mem[23][5].ACLR
reset => mem[23][4].ACLR
reset => mem[23][3].ACLR
reset => mem[23][2].ACLR
reset => mem[23][1].ACLR
reset => mem[23][0].ACLR
reset => mem[24][7].ACLR
reset => mem[24][6].ACLR
reset => mem[24][5].ACLR
reset => mem[24][4].ACLR
reset => mem[24][3].ACLR
reset => mem[24][2].ACLR
reset => mem[24][1].ACLR
reset => mem[24][0].ACLR
reset => mem[25][7].ACLR
reset => mem[25][6].ACLR
reset => mem[25][5].ACLR
reset => mem[25][4].ACLR
reset => mem[25][3].ACLR
reset => mem[25][2].ACLR
reset => mem[25][1].ACLR
reset => mem[25][0].ACLR
reset => mem[26][7].ACLR
reset => mem[26][6].ACLR
reset => mem[26][5].ACLR
reset => mem[26][4].ACLR
reset => mem[26][3].ACLR
reset => mem[26][2].ACLR
reset => mem[26][1].ACLR
reset => mem[26][0].ACLR
reset => mem[27][7].ACLR
reset => mem[27][6].ACLR
reset => mem[27][5].ACLR
reset => mem[27][4].ACLR
reset => mem[27][3].ACLR
reset => mem[27][2].ACLR
reset => mem[27][1].ACLR
reset => mem[27][0].ACLR
reset => mem[28][7].ACLR
reset => mem[28][6].ACLR
reset => mem[28][5].ACLR
reset => mem[28][4].ACLR
reset => mem[28][3].ACLR
reset => mem[28][2].ACLR
reset => mem[28][1].ACLR
reset => mem[28][0].ACLR
reset => mem[29][7].ACLR
reset => mem[29][6].ACLR
reset => mem[29][5].ACLR
reset => mem[29][4].ACLR
reset => mem[29][3].ACLR
reset => mem[29][2].ACLR
reset => mem[29][1].ACLR
reset => mem[29][0].ACLR
reset => mem[30][7].ACLR
reset => mem[30][6].ACLR
reset => mem[30][5].ACLR
reset => mem[30][4].ACLR
reset => mem[30][3].ACLR
reset => mem[30][2].ACLR
reset => mem[30][1].ACLR
reset => mem[30][0].ACLR
reset => mem[31][7].ACLR
reset => mem[31][6].ACLR
reset => mem[31][5].ACLR
reset => mem[31][4].ACLR
reset => mem[31][3].ACLR
reset => mem[31][2].ACLR
reset => mem[31][1].ACLR
reset => mem[31][0].ACLR
reset => data_r_out[21]~reg0.ENA
reset => data_r_out[20]~reg0.ENA
reset => data_r_out[19]~reg0.ENA
reset => data_r_out[18]~reg0.ENA
reset => data_r_out[17]~reg0.ENA
reset => data_r_out[16]~reg0.ENA
reset => data_r_out[15]~reg0.ENA
reset => data_r_out[14]~reg0.ENA
reset => data_r_out[13]~reg0.ENA
reset => data_r_out[12]~reg0.ENA
reset => data_r_out[11]~reg0.ENA
reset => data_r_out[10]~reg0.ENA
reset => data_r_out[9]~reg0.ENA
reset => data_r_out[8]~reg0.ENA
reset => data_r_out[7]~reg0.ENA
reset => data_r_out[6]~reg0.ENA
reset => data_r_out[5]~reg0.ENA
reset => data_r_out[4]~reg0.ENA
reset => data_r_out[3]~reg0.ENA
reset => data_r_out[2]~reg0.ENA
reset => data_r_out[1]~reg0.ENA
reset => data_r_out[0]~reg0.ENA
reset => add_r_out[4]~reg0.ENA
reset => add_r_out[3]~reg0.ENA
reset => add_r_out[2]~reg0.ENA
reset => add_r_out[1]~reg0.ENA
reset => add_r_out[0]~reg0.ENA
reset => op[2].ENA
reset => op[1].ENA
reset => op[0].ENA
reset => IR_out[7].ENA
reset => IR_out[6].ENA
reset => IR_out[5].ENA
reset => IR_out[4].ENA
reset => IR_out[3].ENA
reset => IR_out[2].ENA
reset => IR_out[1].ENA
reset => IR_out[0].ENA
reset => op_out[2]~reg0.ENA
reset => op_out[1]~reg0.ENA
reset => op_out[0]~reg0.ENA
reset => acc_out[7].ENA
reset => acc_out[6].ENA
reset => acc_out[5].ENA
reset => acc_out[4].ENA
reset => acc_out[3].ENA
reset => acc_out[2].ENA
reset => acc_out[1].ENA
reset => acc_out[0].ENA
reset => mdr_out[7].ENA
reset => mdr_out[6].ENA
reset => mdr_out[5].ENA
reset => mdr_out[4].ENA
reset => mdr_out[3].ENA
reset => mdr_out[2].ENA
reset => mdr_out[1].ENA
reset => mdr_out[0].ENA
reset => mar_out[4].ENA
reset => mar_out[3].ENA
reset => mar_out[2].ENA
reset => mar_out[1].ENA
reset => mar_out[0].ENA
mode[0] => Mux27.IN10
mode[0] => Mux28.IN6
mode[0] => Mux29.IN6
mode[0] => Mux30.IN6
mode[0] => Mux31.IN4
mode[0] => Mux32.IN4
mode[0] => Mux33.IN4
mode[0] => Mux34.IN4
mode[0] => Mux35.IN4
mode[1] => Mux27.IN9
mode[1] => Mux28.IN5
mode[1] => Mux29.IN5
mode[1] => Mux30.IN5
mode[1] => Mux31.IN3
mode[1] => Mux32.IN3
mode[1] => Mux33.IN3
mode[1] => Mux34.IN3
mode[1] => Mux35.IN3
mode[2] => Mux27.IN8
mode[2] => Mux28.IN4
mode[2] => Mux29.IN4
mode[2] => Mux30.IN4
mode[2] => Mux31.IN2
mode[2] => Mux32.IN2
mode[2] => Mux33.IN2
mode[2] => Mux34.IN2
mode[2] => Mux35.IN2
mem_addr[0] => Mux43.IN4
mem_addr[0] => Mux42.IN4
mem_addr[0] => Mux41.IN4
mem_addr[0] => Mux40.IN4
mem_addr[0] => Mux39.IN4
mem_addr[0] => Mux38.IN4
mem_addr[0] => Mux37.IN4
mem_addr[0] => Mux36.IN4
mem_addr[1] => Mux43.IN3
mem_addr[1] => Mux42.IN3
mem_addr[1] => Mux41.IN3
mem_addr[1] => Mux40.IN3
mem_addr[1] => Mux39.IN3
mem_addr[1] => Mux38.IN3
mem_addr[1] => Mux37.IN3
mem_addr[1] => Mux36.IN3
mem_addr[2] => Mux43.IN2
mem_addr[2] => Mux42.IN2
mem_addr[2] => Mux41.IN2
mem_addr[2] => Mux40.IN2
mem_addr[2] => Mux39.IN2
mem_addr[2] => Mux38.IN2
mem_addr[2] => Mux37.IN2
mem_addr[2] => Mux36.IN2
mem_addr[3] => Mux43.IN1
mem_addr[3] => Mux42.IN1
mem_addr[3] => Mux41.IN1
mem_addr[3] => Mux40.IN1
mem_addr[3] => Mux39.IN1
mem_addr[3] => Mux38.IN1
mem_addr[3] => Mux37.IN1
mem_addr[3] => Mux36.IN1
mem_addr[4] => Mux43.IN0
mem_addr[4] => Mux42.IN0
mem_addr[4] => Mux41.IN0
mem_addr[4] => Mux40.IN0
mem_addr[4] => Mux39.IN0
mem_addr[4] => Mux38.IN0
mem_addr[4] => Mux37.IN0
mem_addr[4] => Mux36.IN0
output[0] <= output[0]~7.DB_MAX_OUTPUT_PORT_TYPE
output[1] <= output[1]~6.DB_MAX_OUTPUT_PORT_TYPE
output[2] <= output[2]~5.DB_MAX_OUTPUT_PORT_TYPE
output[3] <= output[3]~4.DB_MAX_OUTPUT_PORT_TYPE
output[4] <= output[4]~3.DB_MAX_OUTPUT_PORT_TYPE
output[5] <= output[5]~2.DB_MAX_OUTPUT_PORT_TYPE
output[6] <= output[6]~1.DB_MAX_OUTPUT_PORT_TYPE
output[7] <= output[7]~0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[0] <= data_r_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[1] <= data_r_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[2] <= data_r_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[3] <= data_r_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[4] <= data_r_out[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[5] <= data_r_out[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[6] <= data_r_out[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[7] <= data_r_out[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[8] <= data_r_out[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[9] <= data_r_out[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[10] <= data_r_out[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[11] <= data_r_out[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[12] <= data_r_out[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[13] <= data_r_out[13]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[14] <= data_r_out[14]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[15] <= data_r_out[15]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[16] <= data_r_out[16]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[17] <= data_r_out[17]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[18] <= data_r_out[18]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[19] <= data_r_out[19]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[20] <= data_r_out[20]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_r_out[21] <= data_r_out[21]~reg0.DB_MAX_OUTPUT_PORT_TYPE
op_out[0] <= op_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
op_out[1] <= op_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
op_out[2] <= op_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
add_r_out[0] <= add_r_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
add_r_out[1] <= add_r_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
add_r_out[2] <= add_r_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
add_r_out[3] <= add_r_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
add_r_out[4] <= add_r_out[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE