📄 prev_cmp_cpu.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Functional Simulation Netlist Generation Quartus II " "Info: Running Quartus II Functional Simulation Netlist Generation" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Nov 28 13:23:40 2008 " "Info: Processing started: Fri Nov 28 13:23:40 2008" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off cpu -c cpu --generate_functional_sim_netlist " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off cpu -c cpu --generate_functional_sim_netlist" { } { } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "cpu.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file cpu.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 CPU-rtl " "Info: Found design unit 1: CPU-rtl" { } { { "cpu.vhd" "" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 18 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 CPU " "Info: Found entity 1: CPU" { } { { "cpu.vhd" "" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 6 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "cpu_defs.vhd 2 0 " "Info: Found 2 design units, including 0 entities, in source file cpu_defs.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 cpu_defs " "Info: Found design unit 1: cpu_defs" { } { { "cpu_defs.vhd" "" { Text "D:/altera/72/quartus/cpu/cpu_defs.vhd" 5 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 cpu_defs-body " "Info: Found design unit 2: cpu_defs-body" { } { { "cpu_defs.vhd" "" { Text "D:/altera/72/quartus/cpu/cpu_defs.vhd" 14 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "cpu " "Info: Elaborating entity \"cpu\" for the top level hierarchy" { } { } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "sysbus_out cpu.vhd(191) " "Warning (10492): VHDL Process Statement warning at cpu.vhd(191): signal \"sysbus_out\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" { } { { "cpu.vhd" "" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 191 0 0 } } } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "count cpu.vhd(193) " "Warning (10492): VHDL Process Statement warning at cpu.vhd(193): signal \"count\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" { } { { "cpu.vhd" "" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 193 0 0 } } } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "acc_out cpu.vhd(195) " "Warning (10492): VHDL Process Statement warning at cpu.vhd(195): signal \"acc_out\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" { } { { "cpu.vhd" "" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 195 0 0 } } } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "IR_out cpu.vhd(197) " "Warning (10492): VHDL Process Statement warning at cpu.vhd(197): signal \"IR_out\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" { } { { "cpu.vhd" "" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 197 0 0 } } } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "mar_out cpu.vhd(199) " "Warning (10492): VHDL Process Statement warning at cpu.vhd(199): signal \"mar_out\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" { } { { "cpu.vhd" "" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 199 0 0 } } } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "mdr_out cpu.vhd(201) " "Warning (10492): VHDL Process Statement warning at cpu.vhd(201): signal \"mdr_out\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" { } { { "cpu.vhd" "" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 201 0 0 } } } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "mem cpu.vhd(203) " "Warning (10492): VHDL Process Statement warning at cpu.vhd(203): signal \"mem\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" { } { { "cpu.vhd" "" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 203 0 0 } } } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "data_r_out\[5\]~reg0 data_in GND " "Warning (14130): Reduced register \"data_r_out\[5\]~reg0\" with stuck data_in port to stuck value GND" { } { { "cpu.vhd" "" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 78 -1 0 } } } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Info" "ILPMS_INFERENCING_SUMMARY" "44 " "Info: Inferred 44 megafunctions from design logic" { { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux0 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux0\"" { } { { "cpu.vhd" "Mux0" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux1 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux1\"" { } { { "cpu.vhd" "Mux1" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux2 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux2\"" { } { { "cpu.vhd" "Mux2" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux3 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux3\"" { } { { "cpu.vhd" "Mux3" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux4 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux4\"" { } { { "cpu.vhd" "Mux4" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux5 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux5\"" { } { { "cpu.vhd" "Mux5" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux6 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux6\"" { } { { "cpu.vhd" "Mux6" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux7 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux7\"" { } { { "cpu.vhd" "Mux7" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux8 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux8\"" { } { { "cpu.vhd" "Mux8" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux9 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux9\"" { } { { "cpu.vhd" "Mux9" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux10 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux10\"" { } { { "cpu.vhd" "Mux10" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux11 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux11\"" { } { { "cpu.vhd" "Mux11" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux12 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux12\"" { } { { "cpu.vhd" "Mux12" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux13 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux13\"" { } { { "cpu.vhd" "Mux13" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux14 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux14\"" { } { { "cpu.vhd" "Mux14" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux15 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux15\"" { } { { "cpu.vhd" "Mux15" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux16 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux16\"" { } { { "cpu.vhd" "Mux16" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux17 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux17\"" { } { { "cpu.vhd" "Mux17" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux18 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux18\"" { } { { "cpu.vhd" "Mux18" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux19 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux19\"" { } { { "cpu.vhd" "Mux19" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 162 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux20 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux20\"" { } { { "cpu.vhd" "Mux20" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 162 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux21 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux21\"" { } { { "cpu.vhd" "Mux21" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 162 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux22 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux22\"" { } { { "cpu.vhd" "Mux22" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 162 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux23 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux23\"" { } { { "cpu.vhd" "Mux23" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 162 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux24 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux24\"" { } { { "cpu.vhd" "Mux24" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 162 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux25 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux25\"" { } { { "cpu.vhd" "Mux25" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 162 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux26 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux26\"" { } { { "cpu.vhd" "Mux26" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 162 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux27 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux27\"" { } { { "cpu.vhd" "Mux27" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 189 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux28 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux28\"" { } { { "cpu.vhd" "Mux28" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 189 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux29 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux29\"" { } { { "cpu.vhd" "Mux29" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 189 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux30 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux30\"" { } { { "cpu.vhd" "Mux30" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 189 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux31 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux31\"" { } { { "cpu.vhd" "Mux31" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 189 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux32 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux32\"" { } { { "cpu.vhd" "Mux32" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 189 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux33 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux33\"" { } { { "cpu.vhd" "Mux33" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 189 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux34 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux34\"" { } { { "cpu.vhd" "Mux34" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 189 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux35 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux35\"" { } { { "cpu.vhd" "Mux35" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 189 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux36 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux36\"" { } { { "cpu.vhd" "Mux36" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 203 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux37 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux37\"" { } { { "cpu.vhd" "Mux37" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 203 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux38 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux38\"" { } { { "cpu.vhd" "Mux38" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 203 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux39 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux39\"" { } { { "cpu.vhd" "Mux39" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 203 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux40 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux40\"" { } { { "cpu.vhd" "Mux40" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 203 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux41 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux41\"" { } { { "cpu.vhd" "Mux41" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 203 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux42 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux42\"" { } { { "cpu.vhd" "Mux42" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 203 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux43 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux43\"" { } { { "cpu.vhd" "Mux43" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 203 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} } { } 0 0 "Inferred %1!llu! megafunctions from design logic" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../libraries/megafunctions/lpm_mux.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../libraries/megafunctions/lpm_mux.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_mux " "Info: Found entity 1: lpm_mux" { } { { "lpm_mux.tdf" "" { Text "d:/altera/72/quartus/libraries/megafunctions/lpm_mux.tdf" 74 1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_mux:Mux0 " "Info: Elaborated megafunction instantiation \"lpm_mux:Mux0\"" { } { { "cpu.vhd" "" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_5oc.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mux_5oc.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_5oc " "Info: Found entity 1: mux_5oc" { } { { "db/mux_5oc.tdf" "" { Text "D:/altera/72/quartus/cpu/db/mux_5oc.tdf" 22 1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_mux:Mux1 " "Info: Elaborated megafunction instantiation \"lpm_mux:Mux1\"" { } { { "cpu.vhd" "" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_lpc.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mux_lpc.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_lpc " "Info: Found entity 1: mux_lpc" { } { { "db/mux_lpc.tdf" "" { Text "D:/altera/72/quartus/cpu/db/mux_lpc.tdf" 22 1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_mux:Mux2 " "Info: Elaborated megafunction instantiation \"lpm_mux:Mux2\"" { } { { "cpu.vhd" "" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_0oc.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mux_0oc.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_0oc " "Info: Found entity 1: mux_0oc" { } { { "db/mux_0oc.tdf" "" { Text "D:/altera/72/quartus/cpu/db/mux_0oc.tdf" 22 1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_mux:Mux3 " "Info: Elaborated megafunction instantiation \"lpm_mux:Mux3\"" { } { { "cpu.vhd" "" { Text "D:/altera/72/quartus/cpu/cpu.vhd" 91 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
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