demo_amba.srm

appnote65_quickmips_ahb_interface_design_example AHB接口设计

f "noname"; #file 0
f "\\judd_ql_dallas\d\mips\ahb\interface_ex\verilog\demo_amba.v"; #file 1
f "\\judd_ql_dallas\d\mips\ahb\interface_ex\verilog\macros.v"; #file 2
f "\\judd_ql_dallas\d\mips\ahb\interface_ex\verilog\ahb_master.v"; #file 3
f "\\judd_ql_dallas\d\mips\ahb\interface_ex\verilog\ahb_slave.v"; #file 4
f "\\judd_ql_dallas\d\mips\ahb\interface_ex\verilog\appreq_sm.v"; #file 5
f "\\judd_ql_dallas\d\mips\ahb\interface_ex\verilog\app_codec.v"; #file 6
f "\\judd_ql_dallas\d\mips\ahb\interface_ex\verilog\xor32x2.v"; #file 7
f "\\judd_ql_dallas\d\mips\ahb\interface_ex\verilog\qmipsesp.v"; #file 8
f "\\judd_ql_dallas\d\mips\ahb\interface_ex\verilog\busreq_sm.v"; #file 9
f "\\judd_ql_dallas\d\mips\ahb\interface_ex\verilog\fifo128x32.v"; #file 10
f "\\judd_ql_dallas\d\mips\ahb\interface_ex\verilog\r128a32_25um.v"; #file 11
f "\\judd_ql_dallas\d\mips\ahb\interface_ex\verilog\ram128x18_25um.v"; #file 12
f "\\Judd_ql_dallas\d\mips\ahb\interface_ex\verilog_design\Synthesis_and_SpDE_files\demo_amba.sc"; #file 13
VNAME 'work.qmipsesp.verilog'; # view id 0
VNAME 'work.hsckmux.verilog'; # view id 1
VNAME 'work.gclkbuff_25um.verilog'; # view id 2
VNAME 'pASIC1.FRAG_A.Netlist_representation'; # view id 3
VNAME 'pASIC1.FRAG_M.Netlist_representation'; # view id 4
VNAME 'pASIC1.FRAG_F.Netlist_representation'; # view id 5
VNAME 'work.xor2i0.verilog'; # view id 6
VNAME 'work.RAM128X18_25UM.verilog'; # view id 7
VNAME 'pASIC1.Q_DECSKIP.Netlist_representation'; # view id 8
VNAME 'pASIC1.Q_DECX.Netlist_representation'; # view id 9
VNAME 'pASIC1.Q_DECSKIP2.Netlist_representation'; # view id 10
VNAME 'pASIC1.Q_INCSKIP.Netlist_representation'; # view id 11
VNAME 'pASIC1.Q_AND2.Netlist_representation'; # view id 12
VNAME 'pASIC1.Q_INCX.Netlist_representation'; # view id 13
VNAME 'pASIC1.Q_INCSKIP2.Netlist_representation'; # view id 14
VNAME 'pASIC1.LCELL2.Netlist_representation'; # view id 15
VNAME 'pASIC1.LOGIC2.Netlist_representation'; # view id 16
VNAME 'pASICQDSP.Q_FRAG_A.prim'; # view id 17
VNAME 'pASICQDSP.Q_AND2I0.prim'; # view id 18
VNAME 'pASICQDSP.Q_FRAG_F.prim'; # view id 19
VNAME 'pASICQDSP.Q_FRAG_M.prim'; # view id 20
VNAME 'pASICQDSP.Q_MUX2X0.prim'; # view id 21
VNAME 'pASICQDSP.Q_XOR2I0.prim'; # view id 22
VNAME 'pASICQDSP.Q_OR2I1.prim'; # view id 23
VNAME 'pASICQDSP.Q_MUX2X3.prim'; # view id 24
VNAME 'pASICQDSP.Q_AND2I1.prim'; # view id 25
VNAME 'pASICQDSP.Q_MUX2X2.prim'; # view id 26
VNAME 'pASICQDSP.Q_AND2I2.prim'; # view id 27
VNAME 'pASICQDSP.Q_AND4I3.prim'; # view id 28
VNAME 'pASICQDSP.Q_OR6I2.prim'; # view id 29
VNAME 'pASICQDSP.Q_OR2I0.prim'; # view id 30
VNAME 'pASICQDSP.Q_XNOR2I0.prim'; # view id 31
VNAME 'pASICQDSP.Q_AND6I3.prim'; # view id 32
VNAME 'pASICQDSP.Q_AND3I0.prim'; # view id 33
VNAME 'pASICQDSP.Q_MUX2X1.prim'; # view id 34
VNAME 'pASICQDSP.Q_AND3I1.prim'; # view id 35
VNAME 'pASICQDSP.Q_AND4I2.prim'; # view id 36
VNAME 'pASICQDSP.Q_OR3I0.prim'; # view id 37
VNAME 'pASICQDSP.Q_AND3I3.prim'; # view id 38
VNAME 'pASICQDSP.Q_AND4I1.prim'; # view id 39
VNAME 'pASICQDSP.Q_OR4I0.prim'; # view id 40
VNAME 'pASICQDSP.Q_OR5I1.prim'; # view id 41
VNAME 'pASICQDSP.Q_AND3I2.prim'; # view id 42
VNAME 'pASICQDSP.Q_OR2I2.prim'; # view id 43
VNAME 'pASICQDSP.Q_OR3I1.prim'; # view id 44
VNAME 'pASIC1.Q_INV.Netlist_representation'; # view id 45
VNAME 'pASIC1.FRAG_Q.Netlist_representation'; # view id 46
VNAME 'pASIC1.Q_DFF.Netlist_representation'; # view id 47
VNAME 'pASICQDSP.Q_EIO_CELL.prim'; # view id 48
VNAME 'pASICQDSP.Q_IOPAD_25UM.prim'; # view id 49
VNAME 'pASICQDSP.Q_OUTPAD_25UM.prim'; # view id 50
VNAME 'pASICQDSP.Q_INPAD_25UM.prim'; # view id 51
VNAME 'work.demo_amba.verilog'; # view id 52
VNAME 'work.xor32x2.verilog'; # view id 53
VNAME 'work.r128a32_25um.verilog'; # view id 54
VNAME 'work.fifo128x32.verilog'; # view id 55
VNAME 'work.ahb_master.verilog'; # view id 56
VNAME 'work.ahb_slave.verilog'; # view id 57
VNAME 'work.app_codec.verilog'; # view id 58
VNAME 'work.busreq_sm.verilog'; # view id 59
VNAME 'work.appreq_sm.verilog'; # view id 60
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