📄 priority.vhd
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library IEEE;
use IEEE.std_logic_1164.all,IEEE.numeric_std.all;
entity priority is
generic(n:POSITIVE :=2);
port(a:in std_logic_vector(2**n-1 downto 0);
y:out std_logic_vector(n-1 downto 0);
valid:out std_logic);
end entity priority;
architecture iterative of priority is
begin
process (a) is
begin
valid<='0';
y<=(others=>'0');
for i in a'RANGE loop
if a(i)='1' then
y<=std_logic_vector(to_unsigned(i,n));
valid<='1';
exit;
end if;
end loop;
end process;
end architecture iterative;
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