cstartup_sam7.lst

atmel at91SAM7a3 ADC sample

   1              		.file	"Cstartup_SAM7.c"
   9              	.Ltext0:
  10              		.section	.text.AT91F_LowLevelInit,"ax",%progbits
  11              		.align	2
  12              		.global	AT91F_LowLevelInit
  14              	AT91F_LowLevelInit:
  15              	.LFB378:
  16              		.file 1 "common/Cstartup_SAM7.c"
   1:common/Cstartup_SAM7.c **** //*----------------------------------------------------------------------------
   2:common/Cstartup_SAM7.c **** //*         ATMEL Microcontroller Software Support  -  ROUSSET  -
   3:common/Cstartup_SAM7.c **** //*----------------------------------------------------------------------------
   4:common/Cstartup_SAM7.c **** //* The software is delivered "AS IS" without warranty or condition of any
   5:common/Cstartup_SAM7.c **** //* kind, either express, implied or statutory. This includes without
   6:common/Cstartup_SAM7.c **** //* limitation any warranty or condition with respect to merchantability or
   7:common/Cstartup_SAM7.c **** //* fitness for any particular purpose, or against the infringements of
   8:common/Cstartup_SAM7.c **** //* intellectual property rights of others.
   9:common/Cstartup_SAM7.c **** //*----------------------------------------------------------------------------
  10:common/Cstartup_SAM7.c **** //* File Name           : Cstartup_SAM7.c
  11:common/Cstartup_SAM7.c **** //* Object              : Low level initializations written in C for GCC Tools
  12:common/Cstartup_SAM7.c **** //* Creation            : 12/Jun/04
  13:common/Cstartup_SAM7.c **** //* 1.2   28/Feb/05 JPP : LIB change AT91C_WDTC_WDDIS & PLL
  14:common/Cstartup_SAM7.c **** //* 1.3   21/Mar/05 JPP : Change PLL Wait time
  15:common/Cstartup_SAM7.c **** //*----------------------------------------------------------------------------
  16:common/Cstartup_SAM7.c **** 
  17:common/Cstartup_SAM7.c **** // Include the board file description
  18:common/Cstartup_SAM7.c **** #include "Board.h"
  19:common/Cstartup_SAM7.c **** 
  20:common/Cstartup_SAM7.c **** 
  21:common/Cstartup_SAM7.c **** // The following functions must be write in ARM mode this function called directly
  22:common/Cstartup_SAM7.c **** // by exception vector
  23:common/Cstartup_SAM7.c **** extern void AT91F_Spurious_handler(void);
  24:common/Cstartup_SAM7.c **** extern void AT91F_Default_IRQ_handler(void);
  25:common/Cstartup_SAM7.c **** extern void AT91F_Default_FIQ_handler(void);
  26:common/Cstartup_SAM7.c **** 
  27:common/Cstartup_SAM7.c **** //*----------------------------------------------------------------------------
  28:common/Cstartup_SAM7.c **** //* \fn    AT91F_LowLevelInit
  29:common/Cstartup_SAM7.c **** //* \brief This function performs very low level HW initialization
  30:common/Cstartup_SAM7.c **** //*        this function can be use a Stack, depending the compilation
  31:common/Cstartup_SAM7.c **** //*        optimization mode
  32:common/Cstartup_SAM7.c **** //*----------------------------------------------------------------------------
  33:common/Cstartup_SAM7.c **** void AT91F_LowLevelInit( void)
  34:common/Cstartup_SAM7.c **** {
  17              		.loc 1 34 0
  18              		@ Function supports interworking.
  19              		@ args = 0, pretend = 0, frame = 0
  20              		@ frame_needed = 0, uses_anonymous_args = 0
  21              		@ link register save eliminated.
  22              		@ lr needed for prologue
  35:common/Cstartup_SAM7.c ****  int            i;
  36:common/Cstartup_SAM7.c ****  AT91PS_PMC     pPMC = AT91C_BASE_PMC;
  37:common/Cstartup_SAM7.c ****     //* Set Flash Waite sate
  38:common/Cstartup_SAM7.c **** 	//  Single Cycle Access at Up to 30 MHz, or 40
  39:common/Cstartup_SAM7.c **** 	//  if MCK = 48000000 I have 48 Cycle for 1 usecond ( flied MC_FMR->FMCN
  40:common/Cstartup_SAM7.c **** 	    AT91C_BASE_MC->MC_FMR = ((AT91C_MC_FMCN)&(48 <<16)) | AT91C_MC_FWS_1FWS ;
  23              		.loc 1 40 0
  24 0000 0336A0E3 		mov	r3, #3145728
  25 0004 013C83E2 		add	r3, r3, #256
  26 0008 0020E0E3 		mvn	r2, #0
  27 000c 9F3002E5 		str	r3, [r2, #-159]
  41:common/Cstartup_SAM7.c **** 
  42:common/Cstartup_SAM7.c ****     //* Watchdog Disable
  43:common/Cstartup_SAM7.c ****         AT91C_BASE_WDTC->WDTC_WDMR= AT91C_WDTC_WDDIS;
  28              		.loc 1 43 0
  29 0010 0229A0E3 		mov	r2, #32768
  30 0014 023CE0E3 		mvn	r3, #512
  31 0018 BB2003E5 		str	r2, [r3, #-187]
  44:common/Cstartup_SAM7.c **** 
  45:common/Cstartup_SAM7.c **** 	//* Set MCK at 48 000 000
  46:common/Cstartup_SAM7.c ****     // 1 Enabling the Main Oscillator:
  47:common/Cstartup_SAM7.c ****         // SCK = 1/32768 = 30.51 uSecond
  48:common/Cstartup_SAM7.c ****     	// Start up time = 8 * 6 / SCK = 56 * 30.51 = 1,46484375 ms
  49:common/Cstartup_SAM7.c ****        pPMC->PMC_MOR = ( (AT91C_CKGR_OSCOUNT) & (0x06 <<8)) | AT91C_CKGR_MOSCEN ;
  32              		.loc 1 49 0
  33 001c 063CA0E3 		mov	r3, #1536
  34 0020 013083E2 		add	r3, r3, #1
  35 0024 032CE0E3 		mvn	r2, #768
  36 0028 DF3002E5 		str	r3, [r2, #-223]
  37              	.L2:
  50:common/Cstartup_SAM7.c ****         // Wait the startup time
  51:common/Cstartup_SAM7.c ****         while(!(pPMC->PMC_SR & AT91C_PMC_MOSCS));
  38              		.loc 1 51 0
  39 002c 973012E5 		ldr	r3, [r2, #-151]
  40 0030 010013E3 		tst	r3, #1
  41 0034 0900000A 		beq	.L2
  52:common/Cstartup_SAM7.c **** 	// 2 Checking the Main Oscillator Frequency (Optional)
  53:common/Cstartup_SAM7.c **** 	// 3 Setting PLL and divider:
  54:common/Cstartup_SAM7.c **** 		// - div by 5 Fin = 3,2 =(16,000 / 5)
  55:common/Cstartup_SAM7.c **** 		// - Mul 29+1: Fout =	96,000 =(3,2 * 30)
  56:common/Cstartup_SAM7.c **** 		// for 96 MHz the erroe is 0.0%
  57:common/Cstartup_SAM7.c **** 		// Field out NOT USED = 0
  58:common/Cstartup_SAM7.c **** 		// PLLCOUNT pll startup time estimate at : 0.844 ms
  59:common/Cstartup_SAM7.c **** 		// PLLCOUNT 28 = 0.000844 /(1/32768)
  60:common/Cstartup_SAM7.c **** 		//CHECK SAME SETTINGS in openocd_at91sam7s_flash.script
  61:common/Cstartup_SAM7.c ****        pPMC->PMC_PLLR = ((AT91C_CKGR_DIV & 0x05) |
  42              		.loc 1 61 0
  43 0038 1D38A0E3 		mov	r3, #1900544
  44 003c 073B83E2 		add	r3, r3, #7168
  45 0040 053083E2 		add	r3, r3, #5
  46 0044 D33002E5 		str	r3, [r2, #-211]
  47 0048 032CE0E3 		mvn	r2, #768
  48              	.L4:
  62:common/Cstartup_SAM7.c ****                          (AT91C_CKGR_PLLCOUNT & (28<<8)) |
  63:common/Cstartup_SAM7.c ****                          (AT91C_CKGR_MUL & (29<<16)));
  64:common/Cstartup_SAM7.c **** 
  65:common/Cstartup_SAM7.c ****         // Wait the startup time
  66:common/Cstartup_SAM7.c ****         while(!(pPMC->PMC_SR & AT91C_PMC_LOCK));
  49              		.loc 1 66 0
  50 004c 973012E5 		ldr	r3, [r2, #-151]
  51 0050 040013E3 		tst	r3, #4
  52 0054 1100000A 		beq	.L4
  53 0058 032CE0E3 		mvn	r2, #768
  54              	.L5:
  67:common/Cstartup_SAM7.c ****         while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));
  55              		.loc 1 67 0
  56 005c 973012E5 		ldr	r3, [r2, #-151]
  57 0060 080013E3 		tst	r3, #8
  58 0064 1500000A 		beq	.L5
  68:common/Cstartup_SAM7.c ****  	// 4. Selection of Master Clock and Processor Clock
  69:common/Cstartup_SAM7.c ****  	// select the PLL clock divided by 2
  70:common/Cstartup_SAM7.c ****  	    pPMC->PMC_MCKR =  AT91C_PMC_PRES_CLK_2 ;
  59              		.loc 1 70 0
  60 0068 0430A0E3 		mov	r3, #4
  61 006c CF3002E5 		str	r3, [r2, #-207]
  62 0070 032CE0E3 		mvn	r2, #768
  63              	.L7:
  71:common/Cstartup_SAM7.c ****  	    while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));
  64              		.loc 1 71 0
  65 0074 973012E5 		ldr	r3, [r2, #-151]
  66 0078 080013E3 		tst	r3, #8
  67 007c 1B00000A 		beq	.L7
  72:common/Cstartup_SAM7.c **** 
  73:common/Cstartup_SAM7.c ****  	    pPMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK  ;
  68              		.loc 1 73 0
  69 0080 CF3012E5 		ldr	r3, [r2, #-207]
  70 0084 033083E3 		orr	r3, r3, #3
  71 0088 CF3002E5 		str	r3, [r2, #-207]
  72 008c 032CE0E3 		mvn	r2, #768
  73              	.L9:
  74:common/Cstartup_SAM7.c ****  	    while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));
  74              		.loc 1 74 0
  75 0090 973012E5 		ldr	r3, [r2, #-151]
  76 0094 080013E3 		tst	r3, #8
  77 0098 2200000A 		beq	.L9
  75:common/Cstartup_SAM7.c **** 
  76:common/Cstartup_SAM7.c **** 	// Set up the default interrupts handler vectors
  77:common/Cstartup_SAM7.c **** 	AT91C_BASE_AIC->AIC_SVR[0] = (int) AT91F_Default_FIQ_handler ;
  78              		.loc 1 77 0
  79 009c 30209FE5 		ldr	r2, .L26
  80 00a0 0F3CE0E3 		mvn	r3, #3840
  81 00a4 7F2003E5 		str	r2, [r3, #-127]
  82 00a8 0120A0E3 		mov	r2, #1
  83              	.LVL0:
  84 00ac 24109FE5 		ldr	r1, .L26+4
  85              	.L11:
  78:common/Cstartup_SAM7.c **** 	for (i=1;i < 31; i++)
  79:common/Cstartup_SAM7.c **** 	{
  80:common/Cstartup_SAM7.c **** 	    AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler ;
  86              		.loc 1 80 0
  87 00b0 0231A0E1 		mov	r3, r2, asl #2
  88 00b4 801F03E5 		str	r1, [r3, #-3968]
  89              		.loc 1 78 0
  90 00b8 012082E2 		add	r2, r2, #1
  91 00bc 1F0052E3 		cmp	r2, #31
  92 00c0 2A00001A 		bne	.L11
  81:common/Cstartup_SAM7.c **** 	}
  82:common/Cstartup_SAM7.c **** 	AT91C_BASE_AIC->AIC_SPU  = (int) AT91F_Spurious_handler ;
  93              		.loc 1 82 0
  94 00c4 10209FE5 		ldr	r2, .L26+8
  95              	.LVL1:
  96 00c8 0F3CE0E3 		mvn	r3, #3840
  97 00cc 352083E5 		str	r2, [r3, #53]
  83:common/Cstartup_SAM7.c **** 
  84:common/Cstartup_SAM7.c **** }
  98              		.loc 1 84 0
  99 00d0 1EFF2FE1 		bx	lr
 100              	.L27:
 101              		.align	2
 102              	.L26:
 103 00d4 00000000 		.word	AT91F_Default_FIQ_handler
 104 00d8 00000000 		.word	AT91F_Default_IRQ_handler
 105 00dc 00000000 		.word	AT91F_Spurious_handler
 106              	.LFE378:
 133              	.Letext0:
DEFINED SYMBOLS
                            *ABS*:00000000 Cstartup_SAM7.c
     /tmp/ccALSgjb.s:14     .text.AT91F_LowLevelInit:00000000 AT91F_LowLevelInit
     /tmp/ccALSgjb.s:24     .text.AT91F_LowLevelInit:00000000 $a
     /tmp/ccALSgjb.s:103    .text.AT91F_LowLevelInit:000000d4 $d

UNDEFINED SYMBOLS
AT91F_Default_FIQ_handler
AT91F_Default_IRQ_handler
AT91F_Spurious_handler