📄 main.lss
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pPMC->PMC_MOR = ( (AT91C_CKGR_OSCOUNT) & (0x06 <<8)) | AT91C_CKGR_MOSCEN ;
10014c: e3a03c06 mov r3, #1536 ; 0x600 100150: e2833001 add r3, r3, #1 ; 0x1 100154: e3e02c03 mvn r2, #768 ; 0x300 100158: e50230df str r3, [r2, #-223] // Wait the startup time
while(!(pPMC->PMC_SR & AT91C_PMC_MOSCS));
10015c: e5123097 ldr r3, [r2, #-151] 100160: e3130001 tst r3, #1 ; 0x1 100164: 0afffffc beq 10015c <AT91F_LowLevelInit+0x2c> // 2 Checking the Main Oscillator Frequency (Optional)
// 3 Setting PLL and divider:
// - div by 5 Fin = 3,2 =(16,000 / 5)
// - Mul 29+1: Fout = 96,000 =(3,2 * 30)
// for 96 MHz the erroe is 0.0%
// Field out NOT USED = 0
// PLLCOUNT pll startup time estimate at : 0.844 ms
// PLLCOUNT 28 = 0.000844 /(1/32768)
//CHECK SAME SETTINGS in openocd_at91sam7s_flash.script
pPMC->PMC_PLLR = ((AT91C_CKGR_DIV & 0x05) |
100168: e3a0381d mov r3, #1900544 ; 0x1d0000 10016c: e2833b07 add r3, r3, #7168 ; 0x1c00 100170: e2833005 add r3, r3, #5 ; 0x5 100174: e50230d3 str r3, [r2, #-211] 100178: e3e02c03 mvn r2, #768 ; 0x300 (AT91C_CKGR_PLLCOUNT & (28<<8)) |
(AT91C_CKGR_MUL & (29<<16)));
// Wait the startup time
while(!(pPMC->PMC_SR & AT91C_PMC_LOCK));
10017c: e5123097 ldr r3, [r2, #-151] 100180: e3130004 tst r3, #4 ; 0x4 100184: 0afffffc beq 10017c <AT91F_LowLevelInit+0x4c> 100188: e3e02c03 mvn r2, #768 ; 0x300 while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));
10018c: e5123097 ldr r3, [r2, #-151] 100190: e3130008 tst r3, #8 ; 0x8 100194: 0afffffc beq 10018c <AT91F_LowLevelInit+0x5c> // 4. Selection of Master Clock and Processor Clock
// select the PLL clock divided by 2
pPMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2 ;
100198: e3a03004 mov r3, #4 ; 0x4 10019c: e50230cf str r3, [r2, #-207] 1001a0: e3e02c03 mvn r2, #768 ; 0x300 while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));
1001a4: e5123097 ldr r3, [r2, #-151] 1001a8: e3130008 tst r3, #8 ; 0x8 1001ac: 0afffffc beq 1001a4 <AT91F_LowLevelInit+0x74>
pPMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK ;
1001b0: e51230cf ldr r3, [r2, #-207] 1001b4: e3833003 orr r3, r3, #3 ; 0x3 1001b8: e50230cf str r3, [r2, #-207] 1001bc: e3e02c03 mvn r2, #768 ; 0x300 while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));
1001c0: e5123097 ldr r3, [r2, #-151] 1001c4: e3130008 tst r3, #8 ; 0x8 1001c8: 0afffffc beq 1001c0 <AT91F_LowLevelInit+0x90>
// Set up the default interrupts handler vectors
AT91C_BASE_AIC->AIC_SVR[0] = (int) AT91F_Default_FIQ_handler ;
1001cc: e59f2030 ldr r2, [pc, #48] ; 100204 <.text+0x204> 1001d0: e3e03c0f mvn r3, #3840 ; 0xf00 1001d4: e503207f str r2, [r3, #-127] 1001d8: e3a02001 mov r2, #1 ; 0x1 1001dc: e59f1024 ldr r1, [pc, #36] ; 100208 <.text+0x208> for (i=1;i < 31; i++)
{
AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler ;
1001e0: e1a03102 mov r3, r2, lsl #2 1001e4: e5031f80 str r1, [r3, #-3968] 1001e8: e2822001 add r2, r2, #1 ; 0x1 1001ec: e352001f cmp r2, #31 ; 0x1f 1001f0: 1afffffa bne 1001e0 <AT91F_LowLevelInit+0xb0> }
AT91C_BASE_AIC->AIC_SPU = (int) AT91F_Spurious_handler ;
1001f4: e59f2010 ldr r2, [pc, #16] ; 10020c <.text+0x20c> 1001f8: e3e03c0f mvn r3, #3840 ; 0xf00 1001fc: e5832035 str r2, [r3, #53]
}
100200: e12fff1e bx lr 100204: 002000b8 streqh r0, [r0], -r8 100208: 002000bc streqh r0, [r0], -ip 10020c: 002000c0 eoreq r0, r0, r0, asr #100100210 <wait>://* Input Parameters : none. Waiting time is defined by the global variable LedSpeed.
//* Output Parameters : none
//*--------------------------------------------------------------------------------------
static void wait ( void )
{//* Begin
100210: b081 sub sp, #4 volatile unsigned int waiting_time ;
for(waiting_time = 0; waiting_time < LedSpeed; waiting_time++) ;
100212: 2300 mov r3, #0 100214: 9300 str r3, [sp, #0] 100216: 9a00 ldr r2, [sp, #0] 100218: 4b05 ldr r3, [pc, #20] (100230 <.text+0x230>) 10021a: 6819 ldr r1, [r3, #0] 10021c: 428a cmp r2, r1 10021e: d205 bcs 10022c <wait+0x1c> 100220: 9b00 ldr r3, [sp, #0] 100222: 3301 add r3, #1 100224: 9300 str r3, [sp, #0] 100226: 9b00 ldr r3, [sp, #0] 100228: 428b cmp r3, r1 10022a: d3f9 bcc 100220 <wait+0x10>}//* End
10022c: b001 add sp, #4 10022e: 4770 bx lr 100230: 0a24 lsr r4, r4, #8 100232: 0020 lsl r0, r4, #000100234 <main>:
#define VREF 3 /* number of records */
#define AT91C_ADC_PRESCAL_SHIFT 8 /* ADC Prescaler bit offset */
AT91S_ADC * pADC = AT91C_BASE_ADC0; /* Global Pointer to ADC */
int main(void)
{
100234: b5f0 push {r4, r5, r6, r7, lr} 100236: 4647 mov r7, r8 100238: b480 push {r7} 10023a: b083 sub sp, #12 10023c: af00 add r7, sp, #0 const int MAXMSG = 80;
char message[MAXMSG];
10023e: b095 sub sp, #84 100240: 4ad5 ldr r2, [pc, #852] (100598 <.text+0x598>) 100242: 4bd6 ldr r3, [pc, #856] (10059c <.text+0x59c>) 100244: 609a str r2, [r3, #8]__inline void AT91F_PMC_EnablePeriphClock (
AT91PS_PMC pPMC, // \arg pointer to PMC controller
unsigned int periphIds) // \arg IDs of peripherals to enable
{
pPMC->PMC_PCER = periphIds;
100246: 4dd6 ldr r5, [pc, #856] (1005a0 <.text+0x5a0>) 100248: 230c mov r3, #12 10024a: 612b str r3, [r5, #16] 10024c: 49d5 ldr r1, [pc, #852] (1005a4 <.text+0x5a4>) 10024e: 48d6 ldr r0, [pc, #856] (1005a8 <.text+0x5a8>) 100250: 6008 str r0, [r1, #0] 100252: 6108 str r0, [r1, #16] 100254: 4ad5 ldr r2, [pc, #852] (1005ac <.text+0x5ac>) 100256: 2307 mov r3, #7 100258: 6013 str r3, [r2, #0] 10025a: 6113 str r3, [r2, #16] 10025c: 6308 str r0, [r1, #48] 10025e: 6353 str r3, [r2, #52] 100260: 2380 mov r3, #128 100262: 04db lsl r3, r3, #19 100264: 612b str r3, [r5, #16] 100266: 2380 mov r3, #128 100268: 031b lsl r3, r3, #12 10026a: 670b str r3, [r1, #112] 10026c: 2200 mov r2, #0 10026e: 674a str r2, [r1, #116] 100270: 604b str r3, [r1, #4] 100272: 2380 mov r3, #128 100274: 03db lsl r3, r3, #15 100276: 670b str r3, [r1, #112] 100278: 674a str r2, [r1, #116] 10027a: 604b str r3, [r1, #4] 10027c: 49cc ldr r1, [pc, #816] (1005b0 <.text+0x5b0>) 10027e: 23a0 mov r3, #160 100280: 009b lsl r3, r3, #2 100282: 4acc ldr r2, [pc, #816] (1005b4 <.text+0x5b4>) 100284: 50ca str r2, [r1, r3] 100286: 23a1 mov r3, #161 100288: 009b lsl r3, r3, #2 10028a: 223c mov r2, #60 10028c: 50ca str r2, [r1, r3] 10028e: 23a2 mov r3, #162 100290: 009b lsl r3, r3, #2 100292: 22f0 mov r2, #240 100294: 50ca str r2, [r1, r3] 100296: 2388 mov r3, #136 100298: 009b lsl r3, r3, #2 10029a: 4ac7 ldr r2, [pc, #796] (1005b8 <.text+0x5b8>) 10029c: 50ca str r2, [r1, r3] 10029e: 2289 mov r2, #137 1002a0: 0092 lsl r2, r2, #2 1002a2: 23b4 mov r3, #180 1002a4: 009b lsl r3, r3, #2 1002a6: 508b str r3, [r1, r2] 1002a8: 228a mov r2, #138 1002aa: 0092 lsl r2, r2, #2 1002ac: 2396 mov r3, #150 1002ae: 00db lsl r3, r3, #3 1002b0: 508b str r3, [r1, r2] 1002b2: 2310 mov r3, #16 1002b4: 604b str r3, [r1, #4] 1002b6: 2002 mov r0, #2 1002b8: 6048 str r0, [r1, #4] 1002ba: 4dc0 ldr r5, [pc, #768] (1005bc <.text+0x5bc>){
unsigned int oldHandler;
unsigned int mask ;
oldHandler = pAic->AIC_SVR[irq_id];
1002bc: 49c0 ldr r1, [pc, #768] (1005c0 <.text+0x5c0>) 1002be: 2284 mov r2, #132 1002c0: 588b ldr r3, [r1, r2]
mask = 0x1 << irq_id ;
//* Disable the interrupt on the interrupt controller
pAic->AIC_IDCR = mask ;
1002c2: 2392 mov r3, #146 1002c4: 005b lsl r3, r3, #1 1002c6: 50c8 str r0, [r1, r3] //* Save the interrupt handler routine pointer and the interrupt priority
pAic->AIC_SVR[irq_id] = (unsigned int) newHandler ;
1002c8: 508d str r5, [r1, r2] //* Store the Source Mode Register
pAic->AIC_SMR[irq_id] = src_type | priority ;
1002ca: 2320 mov r3, #32 1002cc: 604b str r3, [r1, #4] //* Clear the interrupt on the interrupt controller
pAic->AIC_ICCR = mask ;
1002ce: 2394 mov r3, #148 1002d0: 005b lsl r3, r3, #1 1002d2: 50c8 str r0, [r1, r3] 1002d4: 4abb ldr r2, [pc, #748] (1005c4 <.text+0x5c4>) 1002d6: 4bbc ldr r3, [pc, #752] (1005c8 <.text+0x5c8>) 1002d8: 601a str r2, [r3, #0] AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id ) // \arg interrupt number to initialize
{
//* Enable the interrupt on the interrupt controller
pAic->AIC_IECR = 0x1 << irq_id ;
1002da: 2390 mov r3, #144 1002dc: 005b lsl r3, r3, #1 1002de: 50c8 str r0, [r1, r3] 1002e0: f9c2f000 bl 100668 <AT91F_DBGU_Init> int drawmenu;
unsigned long stored_int;
unsigned long val;
unsigned int choice;
unsigned int led_index ;
char value;
device_init(); // init interrupts and peripherals
// example "puts" with dbgu.c-function
AT91F_DBGU_Printk("\r\n\r\nAT91SAM7-Demo for the GNU-Toolchain\r\n");
1002e4: 48b9 ldr r0, [pc, #740] (1005cc <.text+0x5cc>) 1002e6: f9eff000 bl 1006c8 <AT91F_DBGU_Printk>
// example "puts" with siprintf formated string, the integer versions
// of the newlib's printf need less memory but do not offer floating-
// point support
siprintf(message,"MCK clock frequency: %d Hz \r\n",MCK );
1002ea: 49b9 ldr r1, [pc, #740] (1005d0 <.text+0x5d0>) 1002ec: 4668 mov r0, sp 1002ee: 4ab9 ldr r2, [pc, #740] (1005d4 <.text+0x5d4>) 1002f0: ff4cf000 bl 10118c <siprintf> AT91F_DBGU_Printk(message);
1002f4: 4668 mov r0, sp 1002f6: f9e7f000 bl 1006c8 <AT91F_DBGU_Printk>
static inline unsigned long IntGetCPSR(void)
{
unsigned long res;
MY_SWI_CALL_RES(SWI_NUM_GET_CPSR, res);
1002fa: df04 swi 4 1002fc: 1c03 mov r3, r0 (add r3, r0, #0) return res;
}
static inline unsigned long IntDisable(void)
{
unsigned long res;
MY_SWI_CALL_RES(SWI_NUM_IRQ_DIS, res);
return res;
}
static inline unsigned long IntEnable(void) {
unsigned long res;
MY_SWI_CALL_RES(SWI_NUM_IRQ_EN, res);
1002fe: df01 swi 1 100300: 1c03 mov r3, r0 (add r3, r0, #0)
stored_int = IntGetCPSR(); // save initial-state
IntEnable();
// example printf with "newlib" - the write-routine is
// bound to the dbug-interface (see syscalls.c) so
// (i)printf output goes to DBGU (uart2)
iprintf("Demo created by Martin Thomas, Kaiserslautern, Germany\n\n");
100302: 48b5 ldr r0, [pc, #724] (1005d8 <.text+0x5d8>) 100304: fc5ef000 bl 100bc4 <iprintf>
drawmenu = 1;
// main-loop
unsigned int adval;
/* Enable peripheral clocks */
*AT91C_PMC_PCER = (1<<AT91C_ID_ADC0); /* enable ADC, */
100308: 2380 mov r3, #128 10030a: 045b lsl r3, r3, #17 10030c: 4ab3 ldr r2, [pc, #716] (1005dc <.text+0x5dc>) 10030e: 6013 str r3, [r2, #0]
/* Setup the A/D converter */
pADC->ADC_CR = AT91C_ADC_SWRST; /* reset ADC */
100310: 4ab3 ldr r2, [pc, #716] (1005e0 <.text+0x5e0>) 100312: 6811 ldr r1, [r2, #0] 100314: 2301 mov r3, #1 100316: 600b str r3, [r1, #0] pADC->ADC_CHER = AT91C_ADC_CH0 |
100318: 6811 ldr r1, [r2, #0] 10031a: 230f mov r3, #15 10031c: 610b str r3, [r1, #16] AT91C_ADC_CH1
|AT91C_ADC_CH2 /* enable ADC channels 0..3 */
|AT91C_ADC_CH3; /* enable ADC channels 0..3 */
pADC->ADC_MR = AT91C_ADC_LOWRES_10_BIT |
10031e: 6812 ldr r2, [r2, #0] 100320: 2390 mov r3, #144 100322: 011b lsl r3, r3, #4 100324: 6053 str r3, [r2, #4]⌨️ 快捷键说明
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