relpc764.h

由LPC76X构成的LIN BUS节点实例 包含LIN总线的Demo程序

/*-------------------------------------------*/
/* Include file for 87LPC764 SFR Definitions */
/* Copyright Raisonance SA, 1990-2001       */
/*-------------------------------------------*/

/*  BYTE Registers  */
/* General Registers */
at 0xD0 sfr PSW  ;
at 0xE0 sfr ACC  ;
at 0xF0 sfr B    ;
at 0x81 sfr SP   ;
at 0x82 sfr DPL  ;
at 0x83 sfr DPH  ;
at 0x87 sfr PCON ;
at 0xA2 sfr AUXR1;
at 0x95 sfr DIVM ;

/* Port Registers */
at 0x80 sfr P0   ;
at 0x84 sfr P0M1 ;
at 0x85 sfr P0M2 ;
at 0xF6 sfr PT0AD;
at 0x90 sfr P1   ;
at 0x91 sfr P1M1 ;
at 0x92 sfr P1M2 ;
at 0xA0 sfr P2   ;
at 0xA4 sfr P2M1 ;
at 0xA5 sfr P2M2 ;
at 0x86 sfr KBI  ;
at 0xAC sfr CMP1 ;
at 0xAD sfr CMP2 ;

/* Timer Registers */
at 0x88 sfr TCON ;
at 0x89 sfr TMOD ;
at 0x8A sfr TL0  ;
at 0x8B sfr TL1  ;
at 0x8C sfr TH0  ;
at 0x8D sfr TH1  ;

/* Interrupt Controller Registers */
at 0xA8 sfr IEN0 ;
at 0xE8 sfr IEN1 ;
at 0xB8 sfr IP0  ;
at 0xF8 sfr IP1  ;
at 0xB7 sfr IP0H ;
at 0xF7 sfr IP1H ;

/* I2C Controller Registers */
at 0xC8 sfr I2CFG ;
at 0xD8 sfr I2CON ;
at 0xD9 sfr I2DAT ;

/* UART Registers */
at 0x98 sfr SCON  ;
at 0x99 sfr SBUF  ;
at 0xA9 sfr SADDR ;
at 0xB9 sfr SADEN ;

/* Watchdog Registers */
at 0xA6 sfr WDRST;
at 0xA7 sfr WDCON;

/***********************************************/
/*  BIT Registers                              */
/***********************************************/
/*  PSW   */
at 0xD7 sbit CY   ;
at 0xD6 sbit AC   ;
at 0xD5 sbit F0   ;
at 0xD4 sbit RS1  ;
at 0xD3 sbit RS0  ;
at 0xD2 sbit OV   ;
at 0xD0 sbit P    ;

/*  TCON  */
at 0x8F sbit TF1  ;
at 0x8E sbit TR1  ;
at 0x8D sbit TF0  ;
at 0x8C sbit TR0  ;
at 0x8B sbit IE1  ;
at 0x8A sbit IT1  ;
at 0x89 sbit IE0  ;
at 0x88 sbit IT0  ;

/*  IEN0  */
at 0xAF sbit EA   ;
at 0xAE sbit EWD  ;
at 0xAD sbit EB0  ;
at 0xAC sbit ES   ;
at 0xAB sbit ET1  ;
at 0xAA sbit EX1  ;
at 0xA9 sbit ET0  ;
at 0xA8 sbit EX0  ;

/*  IEN1  */
at 0xEF sbit ETI  ;
at 0xED sbit EC1  ;
at 0xEA sbit EC2  ;
at 0xE9 sbit EKB  ;
at 0xE8 sbit EI2  ;

/*  IP0  */
at 0xBE sbit PWD  ;
at 0xBD sbit PB0  ;
at 0xBC sbit PS   ;
at 0xBB sbit PT1  ;
at 0xBA sbit PX1  ;
at 0xB9 sbit PT0  ;
at 0xB8 sbit PX0  ;

/*  IP1  */
at 0xFF sbit PTI  ;
at 0xFD sbit PC1  ;
at 0xFA sbit PC2  ;
at 0xF9 sbit PKB  ;
at 0xF8 sbit PI2  ;

/*  P1  */
at 0x97 sbit P1_7 ;
at 0x96 sbit P1_6 ;
at 0x95 sbit RST  ;
at 0x94 sbit INT1 ;
at 0x93 sbit INT0 ;
at 0x92 sbit T0   ;
at 0x91 sbit RXD  ;
at 0x90 sbit TXD  ;

/*  P2  */
at 0xA0 sbit X2  ;
at 0xA1 sbit X1  ;

/*  SCON  */
at 0x9F sbit SM0  ;      
at 0x9E sbit SM1  ;
at 0x9D sbit SM2  ;
at 0x9C sbit REN  ;
at 0x9B sbit TB8  ;
at 0x9A sbit RB8  ;
at 0x99 sbit TI   ;
at 0x98 sbit RI   ;
at 0x9F sbit FE   ;
          
/*  P0  */
at 0x87 sbit T1     ;
at 0x86 sbit _CMP1  ;
at 0x85 sbit CMPREF ;
at 0x84 sbit CIN1A  ;
at 0x83 sbit CIN1B  ;
at 0x82 sbit CIN2A  ;
at 0x81 sbit CIN2B  ;
at 0x80 sbit _CMP2  ;

/*  I2CFG  */
at 0xCF sbit SLAVEN;
at 0xCE sbit MASTRQ;
at 0xCD sbit CLRTI ;
at 0xCC sbit TIRUN ;
at 0xC9 sbit CT1   ;
at 0xC8 sbit CT0   ;

/*  I2CON  */
at 0xDF sbit RDAT  ;
at 0xDF sbit CXA   ;
at 0xDE sbit ATN   ;
at 0xDE sbit IDLE  ;
at 0xDD sbit DRDY  ;
at 0xDD sbit CDR   ;
at 0xDC sbit ARL   ;
at 0xDC sbit CARL  ;
at 0xDB sbit STR   ;
at 0xDB sbit CSTR  ;
at 0xDA sbit STP   ;
at 0xDA sbit CSTP  ;
at 0xD9 sbit MASTER;
at 0xD9 sbit XSTR  ;
at 0xD8 sbit XSTP  ;