address decoder.lst

ad实例文件

LISTING FOR LOGIC DESCRIPTION FILE: Address Decoder.pld              Page 1

PLD: Universal Compiler for Programmable Logic
Version 4.0 Serial# MW-67999999
Copyright (c) 2002, Altium Limited
Created Sun Jun 30 15:28:24 2002

  1:Name            Address Decoder;
  2:Partno          ISADecoder1;
  3:Revision        01;
  4:Date            20 November, 1996;
  5:Designer        Altium Employees;
  6:Company         Altium Ltd;
  7:Assembly        PC ISA Bus 4 port serial card Address Decoder;
  8:Location        U10;
  9:Device          g22v10;
 10:
 11:/************************************************************************/
 12:/* This device decodes the PC adress bus and generates enable signals   */
 13:/* for 4 serial ports. The base address is set by comparing A10-A5      */
 14:/* of the ISA bus against 6 bits derived from dip switch S1. When these */
 15:/* are equal and adress enable (AEN) is low the Card Select signal is   */
 16:/* generated. Address bits PA4 & PA3 are used to select uart port as:   */
 17:/*                                                                      */
 18:/*  CardSelect & PA4 = 0, PA3 = 0 => Port A                             */
 19:/*  CardSelect & PA4 = 0, PA3 = 1 => Port B                             */
 20:/*  CardSelect & PA4 = 1, PA3 = 0 => Port C                             */
 21:/*  CardSelect & PA4 = 1, PA3 = 1 => Port D                             */
 22:/*                                                                      */
 23:/************************************************************************/
 24:
 25:/************************************************************************/
 26:/* Allowable Target Device Types:       GAL 22V10                       */
 27:/************************************************************************/
 28:
 29:/** Inputs **/
 30:pin 1              = !aen ;            /* PC's address enable strobe   */
 31:pin [2..7]         = [a10..5] ;        /* system address pins a5 - a10 */
 32:pin [8..9]         = [pa4..3] ;        /* system address pins a3 - a4  */
 33:pin [10,11,13..16] = [sw10..5] ;       /* dip switch address  a5 - a10 */
 34:
 35:/** Outputs **/
 36:
 37:/* Pin 17, Pin 18 spare */
 38:pin 19     = CardEnable ;
 39:pin 20     = !portD ;                   /* port D enable                */
 40:pin 21     = !portC ;                   /* port C enable                */
 41:pin 22     = !portB ;                   /* port B enable                */
 42:pin 23     = !portA ;                   /* port A enable                */
 43:
 44:/** Declarations and Intermediate Variable Definitions  **/
 45:
 46:field   CardAddress   = [a10..5] ;
 47:field   SwitchAddress = [sw10..5];
 48:
 49:/** Logic Equations **/
 50:
 51:/* Field comparison operation == compares two fields and generates TRUE
 52:only if the two fields are identical. The two field variables must
 53:have the same number of elements (bits).*/

LISTING FOR LOGIC DESCRIPTION FILE: Address Decoder.pld              Page 2

PLD: Universal Compiler for Programmable Logic
Version 4.0 Serial# MW-67999999
Copyright (c) 2002, Altium Limited
Created Sun Jun 30 15:28:24 2002

 54:
 55:CardEnable = (CardAddress = SwitchAddress) & aen ;
 56:
 57:portA            = !pa4 & !pa3  & CardEnable;
 58:portB            = !pa4 &  pa3  & CardEnable;
 59:portC            =  pa4 & !pa3  & CardEnable;
 60:portD            =  pa4 &  pa3  & CardEnable;
 61:
 62:



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