pcisim.h

此代码用于生成测试PCI设备的Verilog代码（Verilog代码为一种硬件描述语言）。此代码可以直接运行于LINUX下。

#ifndef __pcisim_H
#define __pcisim_H
/*
 * Copyright (c) 2002 Picture Elements, Inc.
 *    Stephen Williams ([e-mail])
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
 *    General Public License as published by the Free Software
 *    Foundation; either version 2 of the License, or (at your option)
 *    any later version.
 *
 *    This program is distributed in the hope that it will be useful,
 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *    GNU General Public License for more details.
 *
 *    You should have received a copy of the GNU General Public License
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
#ident "$Id: pcisim.h,v 1.4 2003/05/27 23:59:57 steve Exp $"

#ifdef __cplusplus
# define EXTERN extern "C"
#else
# define EXTERN extern
#endif

/*
 * Open the connection to the Verilog simulation, ready to perform the
 * other commands.
 */
EXTERN void pcisim_init(void);

/*
 * Advance the Verilog simulation some number of PCI clocks, or until
 * one of the interrupts in the irq_enable is active.
 */
EXTERN unsigned pcisim_wait(unsigned clks, unsigned irq_enable);

/*
 * Cause a RESET# pulse to be generated on the PCI bus of the
 * simulation. The pulse width is given in clocks, and if the settle
 * time is specified, the simulation runs that many more clocks to let
 * PCI devices settle.
 */
EXTERN void pcisim_reset(unsigned width, unsigned settle);

/*
 * execute a PCI configuration read and return the 32bit value that
 * was read. The address is the type-0 or type-1 address according to
 * PCI config space conventions.
 */
EXTERN unsigned long pcisim_config_read(unsigned long addr);
EXTERN void pcisim_config_write(unsigned long addr, unsigned long val);
EXTERN void pcisim_config_write_x(unsigned long addr, unsigned long val, int BE);

/*
 * These are memory I/O functions. They manipulate single words.
 *
 * The pcisim_writel_x adds the BE argument, which is the byte enables
 * to use. The 4 low bits are used as BE# values on the PCI bus when
 * the word is transferred.
 */
EXTERN unsigned long pcisim_readl(unsigned long addr);
EXTERN void pcisim_writel(unsigned long addr, unsigned long val);
EXTERN void pcisim_writel_x(unsigned long addr, unsigned long val, int BE);

/*
 * Send an end-of-simulation message to the simulator.
 */
EXTERN void pcisim_end_simulation(void);

#undef EXTERN

/*
 * $Log: pcisim.h,v $
 * Revision 1.4  2003/05/27 23:59:57  steve
 *  Support explicit byte lane controls on write.
 *
 * Revision 1.3  2002/10/16 16:54:24  steve
 *  Copyright and License notice.
 *
 * Revision 1.2  2002/06/01 02:22:06  steve
 *  Extend pcisim_wait to wait for interrupts.
 *
 * Revision 1.1  2002/05/12 22:17:17  steve
 *  Add pcisim to CVS.
 *
 */
#endif