makefile

来自「此代码用于生成测试PCI设备的Verilog代码（Verilog代码为一种硬件描」· 代码 · 共 24 行

all: pcitcl.so

include  ../Make.rules

O = pcitcl.o

pcitcl.so: $O
	$(CC) -shared -o pcitcl.so $O -L../libpcisim -lpcisim -ltcl

%.o: %.c ../libpcisim/pcisim.h
	$(CC) -c $(CFLAGS) $(PICFLAGS) -I../libpcisim $<

clean:
	rm -f $O ./pcitcl.so

install: $(libdir)/pcitcl.so

$(libdir)/pcitcl.so: ./pcitcl.so
	$(INSTALL_DATA) ./pcitcl.so $(libdir)/pcitcl.so

uninstall:
	rm -f $(libdir)/pcitcl.so