mcf5282_gpio.h

FreeRTOS - V5.1.1 Last Update: Nov 20 2008 http://sourceforge.net/projects/freertos/

/* Coldfire C Header File
 * Copyright Freescale Semiconductor Inc
 * All rights reserved.
 *
 * 2007/03/19 Revision: 0.9
 */

#ifndef __MCF5282_GPIO_H__
#define __MCF5282_GPIO_H__


/*********************************************************************
*
* General Purpose I/O (GPIO)
*
*********************************************************************/

/* Register read/write macros */
#define MCF_GPIO_PORTA                       (*(vuint8 *)(&__IPSBAR[0x100000]))
#define MCF_GPIO_DDRA                        (*(vuint8 *)(&__IPSBAR[0x100014]))
#define MCF_GPIO_SETA                        (*(vuint8 *)(&__IPSBAR[0x100028]))
#define MCF_GPIO_CLRA                        (*(vuint8 *)(&__IPSBAR[0x10003C]))

#define MCF_GPIO_PORTB                       (*(vuint8 *)(&__IPSBAR[0x100001]))
#define MCF_GPIO_DDRB                        (*(vuint8 *)(&__IPSBAR[0x100015]))
#define MCF_GPIO_SETB                        (*(vuint8 *)(&__IPSBAR[0x100029]))
#define MCF_GPIO_CLRB                        (*(vuint8 *)(&__IPSBAR[0x10003D]))

#define MCF_GPIO_PORTC                       (*(vuint8 *)(&__IPSBAR[0x100002]))
#define MCF_GPIO_DDRC                        (*(vuint8 *)(&__IPSBAR[0x100016]))
#define MCF_GPIO_SETC                        (*(vuint8 *)(&__IPSBAR[0x10002A]))
#define MCF_GPIO_CLRC                        (*(vuint8 *)(&__IPSBAR[0x10003E]))

#define MCF_GPIO_PORTD                       (*(vuint8 *)(&__IPSBAR[0x100003]))
#define MCF_GPIO_DDRD                        (*(vuint8 *)(&__IPSBAR[0x100017]))
#define MCF_GPIO_SETD                        (*(vuint8 *)(&__IPSBAR[0x10002B]))
#define MCF_GPIO_CLRD                        (*(vuint8 *)(&__IPSBAR[0x10003F]))

#define MCF_GPIO_PORTE                       (*(vuint8 *)(&__IPSBAR[0x100004]))
#define MCF_GPIO_DDRE                        (*(vuint8 *)(&__IPSBAR[0x100018]))
#define MCF_GPIO_SETE                        (*(vuint8 *)(&__IPSBAR[0x10002C]))
#define MCF_GPIO_CLRE                        (*(vuint8 *)(&__IPSBAR[0x100040]))

#define MCF_GPIO_PORTF                       (*(vuint8 *)(&__IPSBAR[0x100005]))
#define MCF_GPIO_DDRF                        (*(vuint8 *)(&__IPSBAR[0x100019]))
#define MCF_GPIO_SETF                        (*(vuint8 *)(&__IPSBAR[0x10002D]))
#define MCF_GPIO_CLRF                        (*(vuint8 *)(&__IPSBAR[0x100041]))

#define MCF_GPIO_PORTG                       (*(vuint8 *)(&__IPSBAR[0x100006]))
#define MCF_GPIO_DDRG                        (*(vuint8 *)(&__IPSBAR[0x10001A]))
#define MCF_GPIO_SETG                        (*(vuint8 *)(&__IPSBAR[0x10002E]))
#define MCF_GPIO_CLRG                        (*(vuint8 *)(&__IPSBAR[0x100042]))

#define MCF_GPIO_PORTH                       (*(vuint8 *)(&__IPSBAR[0x100007]))
#define MCF_GPIO_DDRH                        (*(vuint8 *)(&__IPSBAR[0x10001B]))
#define MCF_GPIO_SETH                        (*(vuint8 *)(&__IPSBAR[0x10002F]))
#define MCF_GPIO_CLRH                        (*(vuint8 *)(&__IPSBAR[0x100043]))

#define MCF_GPIO_PORTJ                       (*(vuint8 *)(&__IPSBAR[0x100008]))
#define MCF_GPIO_DDRJ                        (*(vuint8 *)(&__IPSBAR[0x10001C]))
#define MCF_GPIO_SETJ                        (*(vuint8 *)(&__IPSBAR[0x100030]))
#define MCF_GPIO_CLRJ                        (*(vuint8 *)(&__IPSBAR[0x100044]))

#define MCF_GPIO_PORTDD                      (*(vuint8 *)(&__IPSBAR[0x100009]))
#define MCF_GPIO_DDRDD                       (*(vuint8 *)(&__IPSBAR[0x10001D]))
#define MCF_GPIO_SETDD                       (*(vuint8 *)(&__IPSBAR[0x100031]))
#define MCF_GPIO_CLRDD                       (*(vuint8 *)(&__IPSBAR[0x100045]))

#define MCF_GPIO_PORTEH                      (*(vuint8 *)(&__IPSBAR[0x10000A]))
#define MCF_GPIO_DDREH                       (*(vuint8 *)(&__IPSBAR[0x10001E]))
#define MCF_GPIO_SETEH                       (*(vuint8 *)(&__IPSBAR[0x100032]))
#define MCF_GPIO_CLREH                       (*(vuint8 *)(&__IPSBAR[0x100046]))

#define MCF_GPIO_PORTEL                      (*(vuint8 *)(&__IPSBAR[0x10000B]))
#define MCF_GPIO_DDREL                       (*(vuint8 *)(&__IPSBAR[0x10001F]))
#define MCF_GPIO_SETEL                       (*(vuint8 *)(&__IPSBAR[0x100033]))
#define MCF_GPIO_CLREL                       (*(vuint8 *)(&__IPSBAR[0x100047]))

#define MCF_GPIO_PORTAS                      (*(vuint8 *)(&__IPSBAR[0x10000C]))
#define MCF_GPIO_DDRAS                       (*(vuint8 *)(&__IPSBAR[0x100020]))
#define MCF_GPIO_SETAS                       (*(vuint8 *)(&__IPSBAR[0x100034]))
#define MCF_GPIO_CLRAS                       (*(vuint8 *)(&__IPSBAR[0x100048]))

#define MCF_GPIO_PORTQS                      (*(vuint8 *)(&__IPSBAR[0x10000D]))
#define MCF_GPIO_DDRQS                       (*(vuint8 *)(&__IPSBAR[0x100021]))
#define MCF_GPIO_SETQS                       (*(vuint8 *)(&__IPSBAR[0x100035]))
#define MCF_GPIO_CLRQS                       (*(vuint8 *)(&__IPSBAR[0x100049]))

#define MCF_GPIO_PORTSD                      (*(vuint8 *)(&__IPSBAR[0x10000E]))
#define MCF_GPIO_DDRSD                       (*(vuint8 *)(&__IPSBAR[0x100022]))
#define MCF_GPIO_SETSD                       (*(vuint8 *)(&__IPSBAR[0x100036]))
#define MCF_GPIO_CLRSD                       (*(vuint8 *)(&__IPSBAR[0x10004A]))

#define MCF_GPIO_PORTTC                      (*(vuint8 *)(&__IPSBAR[0x10000F]))
#define MCF_GPIO_DDRTC                       (*(vuint8 *)(&__IPSBAR[0x100023]))
#define MCF_GPIO_SETTC                       (*(vuint8 *)(&__IPSBAR[0x100037]))
#define MCF_GPIO_CLRTC                       (*(vuint8 *)(&__IPSBAR[0x10004B]))

#define MCF_GPIO_PORTTD                      (*(vuint8 *)(&__IPSBAR[0x100010]))
#define MCF_GPIO_DDRTD                       (*(vuint8 *)(&__IPSBAR[0x100024]))
#define MCF_GPIO_SETTD                       (*(vuint8 *)(&__IPSBAR[0x100038]))
#define MCF_GPIO_CLRTD                       (*(vuint8 *)(&__IPSBAR[0x10004C]))

#define MCF_GPIO_PORTUA                      (*(vuint8 *)(&__IPSBAR[0x100011]))
#define MCF_GPIO_DDRUA                       (*(vuint8 *)(&__IPSBAR[0x100025]))
#define MCF_GPIO_SETUA                       (*(vuint8 *)(&__IPSBAR[0x100039]))
#define MCF_GPIO_CLRUA                       (*(vuint8 *)(&__IPSBAR[0x10004D]))



/* Bit definitions and macros for MCF_GPIO_PORTA */
#define MCF_GPIO_PORTA_PORTA0                (0x1)
#define MCF_GPIO_PORTA_PORTA1                (0x2)
#define MCF_GPIO_PORTA_PORTA2                (0x4)
#define MCF_GPIO_PORTA_PORTA3                (0x8)
#define MCF_GPIO_PORTA_PORTA4                (0x10)
#define MCF_GPIO_PORTA_PORTA5                (0x20)
#define MCF_GPIO_PORTA_PORTA6                (0x40)
#define MCF_GPIO_PORTA_PORTA7                (0x80)

/* Bit definitions and macros for MCF_GPIO_DDRA */
#define MCF_GPIO_DDRA_DDRA0                  (0x1)
#define MCF_GPIO_DDRA_DDRA1                  (0x2)
#define MCF_GPIO_DDRA_DDRA2                  (0x4)
#define MCF_GPIO_DDRA_DDRA3                  (0x8)
#define MCF_GPIO_DDRA_DDRA4                  (0x10)
#define MCF_GPIO_DDRA_DDRA5                  (0x20)
#define MCF_GPIO_DDRA_DDRA6                  (0x40)
#define MCF_GPIO_DDRA_DDRA7                  (0x80)

/* Bit definitions and macros for MCF_GPIO_SETA */
#define MCF_GPIO_SETA_SETA0                  (0x1)
#define MCF_GPIO_SETA_SETA1                  (0x2)
#define MCF_GPIO_SETA_SETA2                  (0x4)
#define MCF_GPIO_SETA_SETA3                  (0x8)
#define MCF_GPIO_SETA_SETA4                  (0x10)
#define MCF_GPIO_SETA_SETA5                  (0x20)
#define MCF_GPIO_SETA_SETA6                  (0x40)
#define MCF_GPIO_SETA_SETA7                  (0x80)

/* Bit definitions and macros for MCF_GPIO_CLRA */
#define MCF_GPIO_CLRA_CLRA0                  (0x1)
#define MCF_GPIO_CLRA_CLRA1                  (0x2)
#define MCF_GPIO_CLRA_CLRA2                  (0x4)
#define MCF_GPIO_CLRA_CLRA3                  (0x8)
#define MCF_GPIO_CLRA_CLRA4                  (0x10)
#define MCF_GPIO_CLRA_CLRA5                  (0x20)
#define MCF_GPIO_CLRA_CLRA6                  (0x40)
#define MCF_GPIO_CLRA_CLRA7                  (0x80)

/* Bit definitions and macros for MCF_GPIO_PORTB */
#define MCF_GPIO_PORTB_PORTB0                (0x1)
#define MCF_GPIO_PORTB_PORTB1                (0x2)
#define MCF_GPIO_PORTB_PORTB2                (0x4)
#define MCF_GPIO_PORTB_PORTB3                (0x8)
#define MCF_GPIO_PORTB_PORTB4                (0x10)
#define MCF_GPIO_PORTB_PORTB5                (0x20)
#define MCF_GPIO_PORTB_PORTB6                (0x40)
#define MCF_GPIO_PORTB_PORTB7                (0x80)

/* Bit definitions and macros for MCF_GPIO_DDRB */
#define MCF_GPIO_DDRB_DDRB0                  (0x1)
#define MCF_GPIO_DDRB_DDRB1                  (0x2)
#define MCF_GPIO_DDRB_DDRB2                  (0x4)
#define MCF_GPIO_DDRB_DDRB3                  (0x8)
#define MCF_GPIO_DDRB_DDRB4                  (0x10)
#define MCF_GPIO_DDRB_DDRB5                  (0x20)
#define MCF_GPIO_DDRB_DDRB6                  (0x40)
#define MCF_GPIO_DDRB_DDRB7                  (0x80)

/* Bit definitions and macros for MCF_GPIO_SETB */
#define MCF_GPIO_SETB_SETB0                  (0x1)
#define MCF_GPIO_SETB_SETB1                  (0x2)
#define MCF_GPIO_SETB_SETB2                  (0x4)
#define MCF_GPIO_SETB_SETB3                  (0x8)
#define MCF_GPIO_SETB_SETB4                  (0x10)
#define MCF_GPIO_SETB_SETB5                  (0x20)
#define MCF_GPIO_SETB_SETB6                  (0x40)
#define MCF_GPIO_SETB_SETB7                  (0x80)

/* Bit definitions and macros for MCF_GPIO_CLRB */
#define MCF_GPIO_CLRB_CLRB0                  (0x1)
#define MCF_GPIO_CLRB_CLRB1                  (0x2)
#define MCF_GPIO_CLRB_CLRB2                  (0x4)
#define MCF_GPIO_CLRB_CLRB3                  (0x8)
#define MCF_GPIO_CLRB_CLRB4                  (0x10)
#define MCF_GPIO_CLRB_CLRB5                  (0x20)
#define MCF_GPIO_CLRB_CLRB6                  (0x40)
#define MCF_GPIO_CLRB_CLRB7                  (0x80)

/* Bit definitions and macros for MCF_GPIO_PORTC */
#define MCF_GPIO_PORTC_PORTC0                (0x1)
#define MCF_GPIO_PORTC_PORTC1                (0x2)
#define MCF_GPIO_PORTC_PORTC2                (0x4)
#define MCF_GPIO_PORTC_PORTC3                (0x8)
#define MCF_GPIO_PORTC_PORTC4                (0x10)
#define MCF_GPIO_PORTC_PORTC5                (0x20)
#define MCF_GPIO_PORTC_PORTC6                (0x40)
#define MCF_GPIO_PORTC_PORTC7                (0x80)

/* Bit definitions and macros for MCF_GPIO_DDRC */
#define MCF_GPIO_DDRC_DDRC0                  (0x1)
#define MCF_GPIO_DDRC_DDRC1                  (0x2)
#define MCF_GPIO_DDRC_DDRC2                  (0x4)
#define MCF_GPIO_DDRC_DDRC3                  (0x8)
#define MCF_GPIO_DDRC_DDRC4                  (0x10)
#define MCF_GPIO_DDRC_DDRC5                  (0x20)
#define MCF_GPIO_DDRC_DDRC6                  (0x40)
#define MCF_GPIO_DDRC_DDRC7                  (0x80)

/* Bit definitions and macros for MCF_GPIO_SETC */
#define MCF_GPIO_SETC_SETC0                  (0x1)
#define MCF_GPIO_SETC_SETC1                  (0x2)
#define MCF_GPIO_SETC_SETC2                  (0x4)
#define MCF_GPIO_SETC_SETC3                  (0x8)
#define MCF_GPIO_SETC_SETC4                  (0x10)
#define MCF_GPIO_SETC_SETC5                  (0x20)
#define MCF_GPIO_SETC_SETC6                  (0x40)
#define MCF_GPIO_SETC_SETC7                  (0x80)

/* Bit definitions and macros for MCF_GPIO_CLRC */
#define MCF_GPIO_CLRC_CLRC0                  (0x1)
#define MCF_GPIO_CLRC_CLRC1                  (0x2)
#define MCF_GPIO_CLRC_CLRC2                  (0x4)
#define MCF_GPIO_CLRC_CLRC3                  (0x8)
#define MCF_GPIO_CLRC_CLRC4                  (0x10)
#define MCF_GPIO_CLRC_CLRC5                  (0x20)
#define MCF_GPIO_CLRC_CLRC6                  (0x40)
#define MCF_GPIO_CLRC_CLRC7                  (0x80)

/* Bit definitions and macros for MCF_GPIO_PORTD */
#define MCF_GPIO_PORTD_PORTD0                (0x1)
#define MCF_GPIO_PORTD_PORTD1                (0x2)
#define MCF_GPIO_PORTD_PORTD2                (0x4)
#define MCF_GPIO_PORTD_PORTD3                (0x8)
#define MCF_GPIO_PORTD_PORTD4                (0x10)
#define MCF_GPIO_PORTD_PORTD5                (0x20)
#define MCF_GPIO_PORTD_PORTD6                (0x40)
#define MCF_GPIO_PORTD_PORTD7                (0x80)

/* Bit definitions and macros for MCF_GPIO_DDRD */
#define MCF_GPIO_DDRD_DDRD0                  (0x1)
#define MCF_GPIO_DDRD_DDRD1                  (0x2)
#define MCF_GPIO_DDRD_DDRD2                  (0x4)
#define MCF_GPIO_DDRD_DDRD3                  (0x8)
#define MCF_GPIO_DDRD_DDRD4                  (0x10)
#define MCF_GPIO_DDRD_DDRD5                  (0x20)
#define MCF_GPIO_DDRD_DDRD6                  (0x40)
#define MCF_GPIO_DDRD_DDRD7                  (0x80)

/* Bit definitions and macros for MCF_GPIO_SETD */
#define MCF_GPIO_SETD_SETD0                  (0x1)
#define MCF_GPIO_SETD_SETD1                  (0x2)
#define MCF_GPIO_SETD_SETD2                  (0x4)
#define MCF_GPIO_SETD_SETD3                  (0x8)