counter_80.edn

基于Xilinx+FPGA的OFDM通信系统基带设计-程序

(edif test (edifVersion 2 0 0) (edifLevel 0) (keywordMap (keywordLevel 0))
(status (written (timeStamp 2005 12 4 17 1 29)
   (author "Xilinx, Inc.")
   (program "Xilinx CORE Generator" (version "Xilinx CORE Generator 6.1.03i; Cores Update # 1.01"))))
   (comment "                                                                                
      This file is owned and controlled by Xilinx and must be used              
      solely for design, simulation, implementation and creation of             
      design files limited to Xilinx devices or technologies. Use               
      with non-Xilinx devices or technologies is expressly prohibited           
      and immediately terminates your license.                                  
                                                                                
      XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION 'AS IS'             
      SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR                   
      XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION           
      AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION               
      OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS                 
      IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,                   
      AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE          
      FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY                  
      WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE                   
      IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR            
      REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF           
      INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS           
      FOR A PARTICULAR PURPOSE.                                                 
                                                                                
      Xilinx products are not intended for use in life support                  
      appliances, devices, or systems. Use in such applications are             
      expressly prohibited.                                                     
                                                                                
      (c) Copyright 1995-2003 Xilinx, Inc.                                      
      All rights reserved.                                                      
                                                                                
   ")
   (comment "Core parameters: ")
       (comment "c_count_mode = 0 ")
       (comment "c_load_enable = true ")
       (comment "c_has_aset = false ")
       (comment "c_load_low = false ")
       (comment "c_count_to = 1001111 ")
       (comment "c_sync_priority = 1 ")
       (comment "c_has_iv = false ")
       (comment "c_restrict_count = true ")
       (comment "c_has_sclr = false ")
       (comment "c_width = 7 ")
       (comment "c_has_q_thresh1 = false ")
       (comment "c_enable_rlocs = true ")
       (comment "c_has_q_thresh0 = false ")
       (comment "c_thresh1_value = 0010 ")
       (comment "c_has_load = false ")
       (comment "c_thresh_early = true ")
       (comment "c_has_up = false ")
       (comment "c_has_thresh1 = true ")
       (comment "c_has_thresh0 = false ")
       (comment "c_ainit_val = 0000 ")
       (comment "c_has_ce = true ")
       (comment "c_pipe_stages = 0 ")
       (comment "c_family = spartan3 ")
       (comment "InstanceName = counter_80 ")
       (comment "c_has_aclr = true ")
       (comment "c_sync_enable = 0 ")
       (comment "c_has_ainit = false ")
       (comment "c_sinit_val = 0 ")
       (comment "c_has_sset = false ")
       (comment "c_has_sinit = false ")
       (comment "c_count_by = 0001 ")
       (comment "c_has_l = false ")
       (comment "c_thresh0_value = 1111111111111111 ")
   (external xilinxun (edifLevel 0)
      (technology (numberDefinition))
       (cell VCC (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port P (direction OUTPUT))
               )
           )
       )
       (cell GND (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port G (direction OUTPUT))
               )
           )
       )
       (cell FDCE (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port D (direction INPUT))
                   (port C (direction INPUT))
                   (port CE (direction INPUT))
                   (port CLR (direction INPUT))
                   (port Q (direction OUTPUT))
               )
           )
       )
       (cell LUT4 (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port I0 (direction INPUT))
                   (port I1 (direction INPUT))
                   (port I2 (direction INPUT))
                   (port I3 (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
       (cell MUXCY (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port DI (direction INPUT))
                   (port CI (direction INPUT))
                   (port S (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
       (cell XORCY (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port LI (direction INPUT))
                   (port CI (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
   )
(library test_lib (edifLevel 0) (technology (numberDefinition (scale 1 (E 1 -12) (unit Time))))
(cell counter_80
 (cellType GENERIC) (view view_1 (viewType NETLIST)
  (interface
   (port ( rename CLK "CLK") (direction INPUT))
   (port ( rename CE "CE") (direction INPUT))
   (port ( rename ACLR "ACLR") (direction INPUT))
   (port ( array ( rename Q "Q<6:0>") 7 ) (direction OUTPUT))
   (port ( rename THRESH1 "THRESH1") (direction OUTPUT))
   )
  (contents
   (instance VCC (viewRef view_1 (cellRef VCC  (libraryRef xilinxun))))
   (instance GND (viewRef view_1 (cellRef GND  (libraryRef xilinxun))))
   (instance BU3
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y0"))
      (property INIT (string "8888"))
   )
   (instance BU8
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y1"))
      (property INIT (string "0200"))
   )
   (instance BU12
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y1"))
      (property INIT (string "8000"))
   )
   (instance BU13
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
      (property RLOC (string "x0y1"))
   )
   (instance BU18
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y2"))
      (property INIT (string "0001"))
   )
   (instance BU21
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y2"))
      (property INIT (string "0400"))
   )
   (instance BU24
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y3"))
      (property INIT (string "eeee"))
   )
   (instance BU26
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y3"))
      (property INIT (string "5555"))
   )
   (instance BU27
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "x0y3"))
   )
   (instance BU28
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y3"))
   )
   (instance BU31
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x1y3"))
      (property INIT (string "2222"))
   )
   (instance BU32
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
      (property RLOC (string "x1y3"))
   )
   (instance BU34
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y4"))
      (property INIT (string "aaaa"))
   )
   (instance BU35
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "x0y4"))
   )
   (instance BU36
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y4"))
   )
   (instance BU39
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x1y4"))
      (property INIT (string "2222"))
   )
   (instance BU40
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
      (property RLOC (string "x1y4"))
   )
   (instance BU42
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y4"))
      (property INIT (string "aaaa"))
   )
   (instance BU43
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "x0y4"))
   )
   (instance BU44
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y4"))
   )
   (instance BU47
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x1y4"))
      (property INIT (string "2222"))
   )
   (instance BU48
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
      (property RLOC (string "x1y4"))
   )
   (instance BU50
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y5"))
      (property INIT (string "aaaa"))
   )
   (instance BU51
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "x0y5"))
   )
   (instance BU52
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y5"))
   )
   (instance BU55
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x1y5"))
      (property INIT (string "2222"))
   )
   (instance BU56
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
      (property RLOC (string "x1y5"))
   )
   (instance BU58
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y5"))
      (property INIT (string "aaaa"))
   )
   (instance BU59
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "x0y5"))
   )
   (instance BU60
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y5"))
   )
   (instance BU63
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x1y5"))
      (property INIT (string "2222"))
   )
   (instance BU64
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
      (property RLOC (string "x1y5"))
   )
   (instance BU66
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y6"))
      (property INIT (string "aaaa"))
   )
   (instance BU67
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
      (property RLOC (string "x0y6"))
   )
   (instance BU68
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y6"))
   )
   (instance BU71
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x1y6"))
      (property INIT (string "2222"))
   )
   (instance BU72
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
      (property RLOC (string "x1y6"))
   )
   (instance BU74
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x0y6"))
      (property INIT (string "aaaa"))
   )
   (instance BU75
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
      (property RLOC (string "x0y6"))
   )
   (instance BU78
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property RLOC (string "x1y6"))
      (property INIT (string "2222"))
   )
   (instance BU79
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
      (property RLOC (string "x1y6"))
   )
   (net N0
    (joined
      (portRef G (instanceRef GND))
      (portRef CI (instanceRef BU27))
      (portRef CI (instanceRef BU28))
      (portRef I2 (instanceRef BU3))
      (portRef I3 (instanceRef BU3))
      (portRef I2 (instanceRef BU24))
      (portRef I3 (instanceRef BU24))
      (portRef I1 (instanceRef BU26))
      (portRef I2 (instanceRef BU26))
      (portRef I3 (instanceRef BU26))
      (portRef I2 (instanceRef BU31))
      (portRef I3 (instanceRef BU31))
      (portRef I1 (instanceRef BU34))
      (portRef I2 (instanceRef BU34))
      (portRef I3 (instanceRef BU34))
      (portRef I2 (instanceRef BU39))
      (portRef I3 (instanceRef BU39))
      (portRef I1 (instanceRef BU42))
      (portRef I2 (instanceRef BU42))
      (portRef I3 (instanceRef BU42))
      (portRef I2 (instanceRef BU47))
      (portRef I3 (instanceRef BU47))
      (portRef I1 (instanceRef BU50))
      (portRef I2 (instanceRef BU50))
      (portRef I3 (instanceRef BU50))
      (portRef I2 (instanceRef BU55))
      (portRef I3 (instanceRef BU55))
      (portRef I1 (instanceRef BU58))
      (portRef I2 (instanceRef BU58))