vectors.s

eCos操作系统源码

// #========================================================================
// #
// #    vectors.S
// #
// #    NEC/V85x exception/interrupt vectors
// #
// #========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
// #========================================================================
// ######DESCRIPTIONBEGIN####
// #
// # Author(s):     gthomas, jlarmour
// # Contributors:  gthomas, jlarmour
// # Date:          2001-03-21
// # Purpose:       NEC/V85x exception vectors
// # Description:   This file defines the code placed into the exception
// #                vectors. It also contains the first level default VSRs
// #		    that save and restore state for both exceptions and
// #		    interrupts.
// #
// #####DESCRIPTIONEND####
// #
// #========================================================================

#include <pkgconf/system.h>
#include <pkgconf/hal.h>
#include <pkgconf/hal_v85x.h>
#ifdef CYGPKG_KERNEL
#include <pkgconf/kernel.h>
#else
# undef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
# undef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
#endif
#include <cyg/hal/hal_platform_setup.h>
#include CYGHWR_MEMORY_LAYOUT_H

#include <cyg/hal/nec_offsets.inc>

// Two different macros in case we ever decide to differentiate
// between exceptions and interrupts.                
        .macro  EXCEPTION
        .org    reset_vector+(0x0010*VECTOR)
        addi    -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp
        st.w    r8,CYGARC_REG_R8[sp]
        movea   VECTOR,r0,r8
        jr      exception
        .set    VECTOR, VECTOR+1
        .endm

        .macro  INTERRUPT
        .org    reset_vector+(0x0010*VECTOR)
        addi    -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp
        st.w    r8,CYGARC_REG_R8[sp]
        movea   VECTOR,r0,r8
        jr      exception
        .set    VECTOR, VECTOR+1
        .endm

#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
        .section ".vectors","ax"
        .globl  reset_vector
reset_vector:
        
//
// These are the hardware exception vectors.
//
__ROM_vsr:
        // start of ROM
        mov     r0,sp  // needed for platforms that have NMI 2 insns after reset
        // This jump works even for ROMRAM because it is PC relative
        jr      start

        .set    VECTOR, 1
        .rept   CYGNUM_HAL_EXCEPTION_COUNT-1
        EXCEPTION
        .endr
        .set    VECTOR, CYGNUM_HAL_ISR_MIN
        .rept   CYGNUM_HAL_ISR_COUNT
        INTERRUPT
        .endr
#endif
        
        .text
        .globl  start
start:
#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
        // Before anything else, *carefully* check if this was actually an NMI
        // The assumption is that the stack pointer can only be 0 on reset
        // as set above at __ROM_vsr
        cmp     r0,sp
        be      1f
        addi    -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp
        movea   1,r0,r8
        jr      exception
1:      
#endif
        
        // Perform hardware initialization
        PLATFORM_SETUP1

        // Copy everything to the proper VMA base and jump to it.
#if defined(CYG_HAL_STARTUP_ROMRAM)
        lea     CYGMEM_REGION_rom,r6
        lea     CYGMEM_REGION_ram,r7
        lea     ___rom_data_end,r8 // Assume end of .data == end of ROM
1:      ld.w    0[r6],r1
        st.w    r1,0[r7]
        addi    4,r6,r6
        addi    4,r7,r7
        cmp     r6,r8
        bne     1b
        
        // now jump to RAM
        lea     ___romram_jump_vector,r1
        jmp     [r1]

___romram_jump_vector:
        
#elif defined( CYG_HAL_STARTUP_ROM )
	// Relocate [copy] data from ROM to RAM
        lea     ___rom_data_start,r6
        lea     ___ram_data_start,r7
        lea     ___ram_data_end,r8
1:      ld.w    0[r6],r1
        st.w    r1,0[r7]
        addi    4,r6,r6
        addi    4,r7,r7
        cmp     r7,r8
        bne     1b

        // Initialize RAM vectors
        lea     ___ram_vectors_loadaddr,r6
        lea     ___ram_vectors_start,r7
        lea     ___ram_vectors_end,r8
1:      ld.w    0[r6],r1
        st.w    r1,0[r7]
        addi    4,r6,r6
        addi    4,r7,r7
        cmp     r7,r8
        bne     1b
#endif
        
        // Initialize stack
        lea     __startup_stack-16,r1
        mov     r1,sp

        // Clear BSS
        lea     ___bss_start,r6
        lea     ___bss_end,r7
1:      st.w    r0,0[r6]
        addi    4,r6,r6
        cmp     r6,r7
        bne     1b

#if defined(CYG_HAL_STARTUP_RAM)
// Set up VSR pointers into this application/image
        lea     _hal_vsr_table+(CYGNUM_HAL_ISR_MIN*4),r6
        movea   CYGNUM_HAL_ISR_COUNT,r0,r7
        lea     do_interrupt,r8
10:     st.w    r8,0[r6]
        addi    4,r6,r6
        addi    -1,r7,r7
        bne     10b        
#endif

        // Initialize hardware
        jarl    _cyg_hal_hardware_init,r31

#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
# ifdef CYG_HAL_STARTUP_RAM
// Need to handle exceptions as well
        lea     _hal_vsr_table,r6
        movea   CYGNUM_HAL_EXCEPTION_COUNT,r0,r7
        lea     do_exception,r8
10:     st.w    r8,0[r6]
        addi    4,r6,r6
        addi    -1,r7,r7
        bne     10b
# endif
        jarl    _initialize_stub,r31
#else // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
// All programs need to provide for NMI handlers        
        lea     _hal_vsr_table+4,r6
        lea     do_exception,r8
        st.w    r8,0[r6]    // NMI pin
#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS

#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
        // we can process NMIs now
        lea     __allow_nmi,r1
        addi    1,r0,r2
        st.w    r2,0[r1]
#endif        
                
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \
    || defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
        .extern hal_ctrlc_isr_init
        jarl    _hal_ctrlc_isr_init,r31
#endif
        
        // Run through static constructors
        jarl    _cyg_hal_invoke_constructors,r31

        // Ready to start the eCos kernel
        jarl    _cyg_start,r31

        // If we get here, something is _very_ wrong
_start_hang:    
        br      _start_hang
        
#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
        // Handle exception
exception:
        // save exception context
        st.w    ep,CYGARC_REG_EP[sp]
        mov     sp,ep
        sst.w   r8,CYGARC_REG_VECTOR[ep]
        sst.w   r1,CYGARC_REG_R1[ep]
        addi    CYGARC_EXCEPTION_FRAME_SIZE,ep,r1
        sst.w   r2,CYGARC_REG_R2[ep]
        sst.w   r1,CYGARC_REG_SP[ep]
        sst.w   r4,CYGARC_REG_R4[ep]        
        sst.w   r5,CYGARC_REG_R5[ep]        
        sst.w   r6,CYGARC_REG_R6[ep]        
        sst.w   r7,CYGARC_REG_R7[ep]        
//        sst.w   r8,CYGARC_REG_R8[ep]        
        sst.w   r9,CYGARC_REG_R9[ep]        
        sst.w   r10,CYGARC_REG_R10[ep]        
        sst.w   r11,CYGARC_REG_R11[ep]        
        sst.w   r12,CYGARC_REG_R12[ep]        
        sst.w   r13,CYGARC_REG_R13[ep]        
        sst.w   r14,CYGARC_REG_R14[ep]        
        sst.w   r15,CYGARC_REG_R15[ep]        
        sst.w   r16,CYGARC_REG_R16[ep]        
        sst.w   r17,CYGARC_REG_R17[ep]        
        sst.w   r18,CYGARC_REG_R18[ep]        
        sst.w   r19,CYGARC_REG_R19[ep]        
#ifndef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
        sst.w   r20,CYGARC_REG_R20[ep]        
        sst.w   r21,CYGARC_REG_R21[ep]        
        sst.w   r22,CYGARC_REG_R22[ep]        
        sst.w   r23,CYGARC_REG_R23[ep]        
        sst.w   r24,CYGARC_REG_R24[ep]        
        sst.w   r25,CYGARC_REG_R25[ep]        
        sst.w   r26,CYGARC_REG_R26[ep]        
        sst.w   r27,CYGARC_REG_R27[ep]        
        sst.w   r28,CYGARC_REG_R28[ep]        
#endif
        sst.w   r29,CYGARC_REG_R29[ep] // NB frame pointer
        sst.w   lp,CYGARC_REG_LP[ep]
        cmp     CYGNUM_HAL_VECTOR_TRAP00,r8  // NMI?
        bge     05f
        stsr    FEPC,r6                 // saved state differs
        stsr    FEPSW,r7
        lea     __allow_nmi,r1          // is the system ready for NMIs?
        tst1    0, 0[r1]
        bne     10f
        // if not processing NMIs, allow restore
        sst.w   r6,CYGARC_REG_PC[ep]
        sst.w   r7,CYGARC_REG_PSW[ep]
        // Reenable exception processing
        stsr    PSW,r6
        andi    ~(CYGARC_PSW_EP|CYGARC_PSW_NP),r6,r6
        ldsr    r6,PSW
        lea     return_from_exception_or_interrupt,r1
        jmp     [r1]

05:     stsr    EIPC,r6
        stsr    EIPSW,r7        
        cmp     CYGNUM_HAL_VECTOR_ILGOP,r8 // Illegal opcode?
        bne     10f
        addi    -4,r6,r6                // yes, adjust PC
10:     sst.w   r6,CYGARC_REG_PC[ep]
        sst.w   r7,CYGARC_REG_PSW[ep]
        stsr    ECR,r6
        sst.w   r6,CYGARC_REG_CAUSE[ep]
        // Reenable exception processing
        stsr    PSW,r6
        andi    ~(CYGARC_PSW_EP|CYGARC_PSW_NP),r6,r6
        ldsr    r6,PSW
        shl     2,r8
        lea     _hal_vsr_table,r1
        add     r1,r8
        ld.w    0[r8],r1
        jmp     [r1]
#endif
        
do_exception:
        // pass in saved registers
        mov     sp,r6
        
        // leave space for the parameter flush back area (as per calling
        // conventions)
        addi    -16,sp,sp
        
        jarl    _exception_handler,r31