vectors.s

eCos操作系统源码

        
        # call c++ constructors
        l.jal   _cyg_hal_invoke_constructors
        l.nop   # delay slot

#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
        l.jal   _initialize_stub
        l.nop   # delay slot
#endif

#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \
    || defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
        .extern _hal_ctrlc_isr_init
        l.jal   _hal_ctrlc_isr_init
        l.nop   # delay slot
#endif
        
        l.jal   _cyg_start       # call cyg_start()
        l.nop   # delay slot
9:      
        l.j     9b              # if we return, loop

FUNC_END(start)
        
#---------------------------------------------------------------------------
# This code handles the common part of all exception handlers.
# On entry, the machine state is already saved on the stack.
#
# R3 = pointer to HAL_SavedRegisters struct containing saved machine state
# R4 = Vector number
#       
# It calls a C routine to do any work, which may result in
# thread switches and changes to the saved state. When we return
# here, the saved state is restored and execution is continued.
        
        .text

FUNC_START(cyg_hal_default_exception_vsr)

        .extern _cyg_hal_exception_handler

        # Call C code

        # When cyg_hal_exception_handler() returns, it will jump
	# directly to restore_state(), which will resume execution
	# at the location of the exception.
        l.movhi r9, hi(restore_state)
        l.j     _cyg_hal_exception_handler
        l.ori   r9,r9,lo(restore_state) #Delay slot

        # Control never reaches this point, 

FUNC_END(cyg_hal_default_exception_vsr)

#---------------------------------------------------------------------------
# This code handles all interrupts and dispatches to a C ISR function
# On entry, the machine state is already saved on the stack.
#
# R3 = pointer to HAL_SavedRegisters struct containing saved machine state
# R4 = Vector number
#       
# After we return here, the saved state is restored and execution is continued.
        
#ifdef CYGIMP_FORCE_INTERRUPT_HANDLING_CODE_IN_RAM
	.section .text.ram,"ax"
#else
	.section .text,"ax"
#endif
	
FUNC_START(cyg_hal_default_interrupt_vsr)

        # Stash away pointer to saved regs for later
        l.or    r31,r3,r3
        
        # Set scheduler lock to prevent thread rescheduling while the ISR runs
#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT                 
        .extern _cyg_scheduler_sched_lock
        load32i r5, _cyg_scheduler_sched_lock
        l.lwz   r6,0(r5)
        l.addi  r6,r6,1
        l.sw    0(r5),r6
#endif
        
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
        # Interrupts execute on their own dedicated stack.
        # If we're on a thread stack, switch to the interrupt stack.
        # If we're called inside a nested interrupt, do nothing.
        l.or    r6,sp,sp                        # Stash SP for later
        load32i r7,__interrupt_stack            # stack top (highest addr + 1)
        load32i r8,__interrupt_stack_base       # stack base (lowest addr)
        l.sfltu sp,r8                           # if (sp < __interrupt_stack_base) 
        l.bf    1f                              #    switch to interrupt stack
        l.sfltu sp,r7                           # if (sp < __interrupt_stack_top)
        l.bf   2f                               #    already on interrupt stack
        l.nop                                   # delay slot
1:      l.or    sp,r7,r7                        # Switch to interrupt stack
2:      l.addi  sp,sp,-8                        # Make space to save old SP...
        l.sw    0(sp),r6                        # ...and save it on the stack           
#endif

        # Call C code

#if defined(CYGPKG_KERNEL_INSTRUMENT) && defined(CYGDBG_KERNEL_INSTRUMENT_INTR)
        # Log the interrupt if kernel tracing is enabled
        l.ori   r3,r0,0x0301                    # arg1 = type = INTR,RAISE
                                                # arg2 = vector number
        l.ori   r5,r0,r0                        # arg3 = 0
        l.jal   _cyg_instrument                  # call instrument function
        
#endif

#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \
    || defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
        # If we are supporting Ctrl-C interrupts from GDB, we must squirrel
        # away a pointer to the save interrupt state here so that we can
        # plant a breakpoint at some later time.
        
        .extern _hal_saved_interrupt_state
        load32i r8,_hal_saved_interrupt_state
        l.sw    0(r8),r31
        
#endif

        # In the event of multiple pending interrupts, determine which
        # one will be serviced first.  By software convention, the lowest
        # numbered external interrupt gets priority.
        #
        # The (internal) tick timer interrupt is serviced only if no
        # external interrupts are pending.

        # Read the PIC interrupt controller's status register
        l.mfspr r9,r0,SPR_PICSR

        # Any pending external interrupts ?
        l.sfnei r9,0
        l.bf    check_for_external_interrupts

        # Theoretically, the only way we could get here is if the tick timer
        # interrupt fired, but we check to be sure that's what happened.
        l.sfeqi r4,CYGNUM_HAL_VECTOR_TICK_TIMER
        l.bf    3f
        l.ori   r3,r0,CYGNUM_HAL_INTERRUPT_RTC  # delay slot
        
#ifndef CYGIMP_HAL_COMMON_INTERRUPTS_IGNORE_SPURIOUS
        l.jal   _hal_spurious_IRQ
        l.nop
#endif // CYGIMP_HAL_COMMON_INTERRUPTS_IGNORE_SPURIOUS
        l.j     ignore_spurious_interrupt
        
        # Identify the lowest numbered interrupt bit in the PIC's PSR,
        # numbering the MSB as 31 and the LSB as 0
check_for_external_interrupts:  
        l.ori   r3,r0,0
2:      l.andi  r11,r9,1                        # Test low bit
        l.sfnei r11,0
        l.bf    3f
        l.srli  r9,r9,1                         # Shift right 1 bit
        l.j     2b
        l.addi  r3,r3,1                         # Delay slot
3:              

        # At this point, r3 contains the ISR number, from 0-32
        # which will be used to index the table of ISRs
        l.slli  r15,r3,2
        load32i r9, _hal_interrupt_handlers     # get interrupt handler table
        l.add   r9,r9,r15
        l.lwz   r11,0(r9)                       # load ISR pointer
        load32i r9, _hal_interrupt_data         # get interrupt data table
        l.add   r9,r9,r15
        l.lwz   r4,0(r9)                        # load data arg to ISR

        # Call ISR
        #   arg0 = ISR #
        #   arg1 = data arg associated with interrupt
        l.jalr  r11
        l.nop

ignore_spurious_interrupt:
        
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK

        # If we are returning from the last nested interrupt, move back
        # to the thread stack. interrupt_end() must be called on the
        # thread stack since it potentially causes a context switch.
        # Since we have arranged for the top of stack location to
        # contain the sp we need to go back to here, just pop it off
        # and put it in SP.

        l.lwz   sp,0(sp)        
#endif  

#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT

        # We only need to call _interrupt_end() when there is a kernel
        # present to do any tidying up.
        
        # on return r11 bit 1 will indicate whether a DSR is
        # to be posted. Pass this together with a pointer to
        # the interrupt object we have just used to the
        # interrupt tidy up routine.
        l.or    r3,r11,r11

        # Get pointer to HAL_SavedRegisters struct, stashed earlier
        l.or    r5,r31,r31

        # Get opaque object associated w/ interrupt vector
        load32i r9, _hal_interrupt_objects          # get interrupt data table
        l.add   r9,r9,r15
        l.lwz   r4,0(r9)

        # Call interrupt_end() to execute any pending DSRs
        #   Arg 0 = return value from ISR
        #   Arg 1 = object associated with interrupt
        #   Arg 2 = HAL_SavedRegisters struct

        .extern _interrupt_end
        l.jal   _interrupt_end                   # call into C to finish off
        l.nop
#endif

        # Fall through to restore_state...

# Return from either an interrupt or an exception
#       
# On entry:     
#    SP = pointer to (HAL_SavedRegisters struct)
#
restore_state:

        # Restore General Purpose Registers (GPRs).
        # R0 is not restored because it is always zero-valued.
        # R1, R3, and R4 are used as temps, so they are restored a little later
        l.lwz   r5,   5 * OR1K_GPRSIZE(sp)
        l.lwz   r6,   6 * OR1K_GPRSIZE(sp)
        l.lwz   r7,   7 * OR1K_GPRSIZE(sp)
        l.lwz   r8,   8 * OR1K_GPRSIZE(sp)
        l.lwz   r9,   9 * OR1K_GPRSIZE(sp)
        l.lwz   r11, 11 * OR1K_GPRSIZE(sp)
        l.lwz   r13, 13 * OR1K_GPRSIZE(sp)
        l.lwz   r15, 15 * OR1K_GPRSIZE(sp)
        l.lwz   r17, 17 * OR1K_GPRSIZE(sp)
        l.lwz   r19, 19 * OR1K_GPRSIZE(sp)
        l.lwz   r21, 21 * OR1K_GPRSIZE(sp)
        l.lwz   r23, 23 * OR1K_GPRSIZE(sp)
        l.lwz   r25, 25 * OR1K_GPRSIZE(sp)
        l.lwz   r27, 27 * OR1K_GPRSIZE(sp)
        l.lwz   r29, 29 * OR1K_GPRSIZE(sp)
        l.lwz   r31, 31 * OR1K_GPRSIZE(sp)

#ifndef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
        # Callee-saved regs don't need to be preserved across a call into
        # an ISR, but we can do so to make debugging easier.

        l.lwz   r2,   2 * OR1K_GPRSIZE(sp)
        l.lwz   r10, 10 * OR1K_GPRSIZE(sp)
        l.lwz   r12, 12 * OR1K_GPRSIZE(sp)
        l.lwz   r14, 14 * OR1K_GPRSIZE(sp)
        l.lwz   r16, 16 * OR1K_GPRSIZE(sp)
        l.lwz   r18, 18 * OR1K_GPRSIZE(sp)
        l.lwz   r20, 20 * OR1K_GPRSIZE(sp)
        l.lwz   r22, 22 * OR1K_GPRSIZE(sp)
        l.lwz   r24, 24 * OR1K_GPRSIZE(sp)
        l.lwz   r26, 26 * OR1K_GPRSIZE(sp)
        l.lwz   r28, 28 * OR1K_GPRSIZE(sp)
        l.lwz   r30, 30 * OR1K_GPRSIZE(sp)

        # Restore MAC LO and HI regs
        l.lwz   r4, OR1KREG_MACLO(sp)
        l.mtspr r0,r4,SPR_MACLO
        l.lwz   r4, OR1KREG_MACHI(sp)
        l.mtspr r0,r4,SPR_MACHI
#endif

        # Must disable interrupts, since they could clobber ESR and EPC regs
        l.mfspr r3, r0, SPR_SR
        load32i r4,~(SPR_SR_TEE|SPR_SR_IEE)
        l.and   r3, r4, r3
        l.mtspr r0, r3, SPR_SR

        # At this point we've restored all the pre-interrupt GPRs except for the SP.
        # Restore pre-interrupt SR, SP, and PC
        l.lwz    r4,  OR1KREG_SR(sp)
        l.mtspr  r0, r4, SPR_ESR_BASE

        l.lwz    r4,  OR1KREG_PC(sp)
        l.mtspr  r0, r4, SPR_EPCR_BASE

        l.lwz   r4,   4 * OR1K_GPRSIZE(sp)
        l.lwz   r3,   3 * OR1K_GPRSIZE(sp)
        l.lwz    sp,  1 * OR1K_GPRSIZE(sp)

        # All done, restore CPU state and continue
        l.rfe
        l.nop           # Delay slot


##-----------------------------------------------------------------------------
## Execute pending DSRs on the interrupt stack with interrupts enabled.
## Note: this can only be called from code running on a thread stack

#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
        .extern _cyg_interrupt_call_pending_DSRs

	.text
FUNC_START(hal_interrupt_stack_call_pending_DSRs)
        # Switch to interrupt stack
        l.or    r3, sp, sp      # Stash entry SP
        load32i sp, __interrupt_stack
        l.addi  sp, sp, -16
        l.sw    0(sp), r3       # Save entry SP
        l.mfspr r4,r0,SPR_SR
        l.sw    4(sp), r4       # Save interrupt state
        l.ori   r4, r4, SPR_SR_IEE|SPR_SR_TEE
        l.sw    8(sp),lr
        
        l.jal   _cyg_interrupt_call_pending_DSRs
	# Enable interrupts before calling DSRs
	l.mtspr r0, r4, SPR_SR  # Delay slot

        l.lwz   r4, 4(sp)
        l.lwz   lr, 8(sp)
        l.lwz   sp, 0(sp)

        # Merge original interrupt state with (possibly altered) SR reg
        l.andi  r4, r4, SPR_SR_IEE|SPR_SR_TEE
        l.mfspr r5, r0, SPR_SR
        load32i r6, ~(SPR_SR_IEE|SPR_SR_TEE)
        l.and   r5, r5, r6
        l.or    r4, r4, r5
        
        l.jr    r9
        l.mtspr r0, r4, SPR_SR  # Delay slot
        
FUNC_END(hal_interrupt_stack_call_pending_DSRs)
#endif          

##-----------------------------------------------------------------------------
## Switch to a new stack.
## This is used in RedBoot to allow code to execute in a different
## stack context.

FUNC_START(hal_program_new_stack)
        # Arguments are:
        # r3 = function to call
        # r4 = stack pointer to use

        # Dummy prologue, so that debugger is fooled into thinking there
        # is a stack frame.  The debugger will use the offsets in the prologue
        # below to read the saved register values out of the *new* stack.
        l.addi  sp,sp,-8
        l.sw    0(sp),fp
        l.addi  fp,sp,8
        l.sw    4(sp),lr
        
        l.or    r5,sp,sp        # Remember original SP
        l.addi  r6,fp,-8        # Remember original FP
        l.or    sp,r4,r4        # Switch to new stack

        # "Real prologue" - Offsets here must match dummy prologue above
        l.addi  sp,sp,-16
        l.sw    0(sp),r6        # So debugger can know caller's FP
        l.sw    4(sp),lr        # So debugger can know caller's PC
        l.sw    8(sp),r5        # Save old SP on stack

        # Call function
        l.jalr  r3
        l.nop
        
        l.lwz   sp, 8(sp)       # Restore original SP
        l.lwz   lr, 4(sp)
        l.jr    lr              # Return to caller
        l.addi  sp,sp, 8        # Delay slot
        
FUNC_END(hal_program_new_stack)

#---------------------------------------------------------------------------
## Temporary interrupt stack
        
        .section ".bss"

        .balign 16
        .global _cyg_interrupt_stack_base
_cyg_interrupt_stack_base:
__interrupt_stack_base:
        .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
        .byte 0
        .endr
        .balign 16
        .global _cyg_interrupt_stack
_cyg_interrupt_stack:
__interrupt_stack:
        
        .long   0,0,0,0,0,0,0,0 

#--------------------------------------
        .data
        .extern _hal_default_isr

        .globl  _hal_interrupt_handlers
_hal_interrupt_handlers:
        .rept   CYGNUM_HAL_ISR_COUNT
        .long   _hal_default_isr
        .endr

        .globl  _hal_interrupt_data
_hal_interrupt_data:
        .rept   CYGNUM_HAL_ISR_COUNT
        .long   0
        .endr

        .globl  _hal_interrupt_objects
_hal_interrupt_objects:
        .rept   CYGNUM_HAL_ISR_COUNT
        .long   0
        .endr

#---------------------------------------------------------------------------
# end of vectors.S