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📄 hal_arch.h

📁 eCos操作系统源码
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// Execution reorder barrier.// When optimizing the compiler can reorder code. In multithreaded systems// where the order of actions is vital, this can sometimes cause problems.// This macro may be inserted into places where reordering should not happen.// The "memory" keyword is potentially unnecessary, but it is harmless to// keep it.#define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" )//--------------------------------------------------------------------------// Breakpoint support// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to//    occur if executed.// HAL_BREAKINST is the value of the breakpoint instruction and...// HAL_BREAKINST_SIZE is its size in bytes and...// HAL_BREAKINST_TYPE is its type.#define HAL_BREAKPOINT(_label_)                 \asm volatile (" .globl  _" #_label_ ";"         \              "_" #_label_ ":"                  \              " l.trap 1;"                      \    );#define HAL_BREAKINST           (0x21000001)    // l.trap 1 instruction#define HAL_BREAKINST_SIZE      4#define HAL_BREAKINST_TYPE      cyg_uint32//--------------------------------------------------------------------------// Thread register state manipulation for GDB support.// Default to a 32 bit register size for GDB register dumps.#ifndef CYG_HAL_GDB_REG#define CYG_HAL_GDB_REG CYG_WORD32#endif// Register layout expected by GDBtypedef struct {    CYG_HAL_OPENRISC_REG    r[32];          // GPR regs    CYG_HAL_OPENRISC_REG    pc;             // Program Counter    CYG_HAL_OPENRISC_REG    sr;             // Supervisor/Status Reg} GDB_Registers;// Copy a set of registers from a HAL_SavedRegisters structure into a// GDB_Registers structure.#define HAL_GET_GDB_REGISTERS( _aregval_, _regs_ )              \    CYG_MACRO_START                                             \    GDB_Registers *_gdb_ = (GDB_Registers *)(_aregval_);        \    int _i_;                                                    \                                                                \    for( _i_ = 0; _i_ <  32; _i_++ ) {                          \        _gdb_->r[_i_] = (_regs_)->r[_i_];                       \    }                                                           \                                                                \    _gdb_->pc = (_regs_)->pc;                                   \    _gdb_->sr = (_regs_)->sr;                                   \    CYG_MACRO_END// Copy a set of registers from a GDB_Registers structure into a// HAL_SavedRegisters structure.#define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ )             \    CYG_MACRO_START                                             \    GDB_Registers *_gdb_ = (GDB_Registers *)(_aregval_);        \    int _i_;                                                    \                                                                \    for( _i_ = 0; _i_ <  32; _i_++ )                            \        (_regs_)->r[_i_] = _gdb_->r[_i_];                       \                                                                \    (_regs_)->pc = _gdb_->pc;                                   \    (_regs_)->sr = _gdb_->sr;                                   \    CYG_MACRO_END//--------------------------------------------------------------------------// HAL setjmp// Note: These definitions are repeated in context.S. If changes are// required remember to update both sets.#define CYGARC_JMP_BUF_R1        0#define CYGARC_JMP_BUF_R2        1#define CYGARC_JMP_BUF_R9        2#define CYGARC_JMP_BUF_R10       3#define CYGARC_JMP_BUF_R12       4#define CYGARC_JMP_BUF_R14       5#define CYGARC_JMP_BUF_R16       6#define CYGARC_JMP_BUF_R18       7#define CYGARC_JMP_BUF_R20       8#define CYGARC_JMP_BUF_R22       9#define CYGARC_JMP_BUF_R24      10#define CYGARC_JMP_BUF_R26      11#define CYGARC_JMP_BUF_R28      12#define CYGARC_JMP_BUF_R30      13#define CYGARC_JMP_BUF_SIZE     14typedef CYG_HAL_OPENRISC_REG hal_jmp_buf[CYGARC_JMP_BUF_SIZE];externC int hal_setjmp(hal_jmp_buf env);externC void hal_longjmp(hal_jmp_buf env, int val);//-------------------------------------------------------------------------// Idle thread code.// This macro is called in the idle thread loop, and gives the HAL the// chance to run code when no threads are runnable. Typical idle// thread behaviour might be to halt the processor.externC void hal_idle_thread_action(cyg_uint32 loop_count);#define HAL_IDLE_THREAD_ACTION(_count_) hal_idle_thread_action(_count_)//--------------------------------------------------------------------------// Minimal and sensible stack sizes: the intention is that applications// will use these to provide a stack size in the first instance prior to// proper analysis.  Idle thread stack should be this big.// *** THESE ARE NOT INTENDED TO BE GUARANTEED SUFFICIENT STACK SIZES ***// They are, however, enough to start programming.// You might, for example, need to make your stacks larger if you have// large "auto" variables.// This is not a config option because it should not be adjusted except// under "enough rope to hang yourself" sort of disclaimers.// Typical case stack frame size: return link + 10 caller-saved temporaries + 4 locals.#define CYGNUM_HAL_STACK_FRAME_SIZE (15 * CYG_HAL_OPENRISC_REG_SIZE)// Stack needed for a context switch:#define CYGNUM_HAL_STACK_CONTEXT_SIZE (38 * 4)  // sizeof(HAL_SavedRegisters)// Interrupt + call to ISR, interrupt_end() and the DSR#define CYGNUM_HAL_STACK_INTERRUPT_SIZE (CYGNUM_HAL_STACK_CONTEXT_SIZE + 2*CYGNUM_HAL_STACK_FRAME_SIZE) // We define a minimum stack size as the minimum any thread could ever// legitimately get away with. We can throw asserts if users ask for less// than this. Allow enough for three interrupt sources - clock, serial and// one other// If interrupts are segregated onto their own stack...#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK // An interrupt stack which is large enough for all possible interrupt// conditions (and only used for that purpose) exists.  "User" stacks// can therefore be much smaller// NOTE - interrupt stack sizes can be smaller if we don't allow interrupts//         to nest.# define CYGNUM_HAL_STACK_SIZE_MINIMUM \         ((3 * 5)*CYGNUM_HAL_STACK_FRAME_SIZE + 2*CYGNUM_HAL_STACK_INTERRUPT_SIZE)#else// No separate interrupt stack exists.  Make sure all threads contain// a stack sufficiently large# define CYGNUM_HAL_STACK_SIZE_MINIMUM                  \        (( 3*CYGNUM_HAL_STACK_INTERRUPT_SIZE) +         \         (25*CYGNUM_HAL_STACK_FRAME_SIZE))#endif// Now make a reasonable choice for a typical thread size. Pluck figures// from thin air and say 40 call frames#define CYGNUM_HAL_STACK_SIZE_TYPICAL                \        (CYGNUM_HAL_STACK_SIZE_MINIMUM +             \         40 * (CYGNUM_HAL_STACK_FRAME_SIZE))#endif /* __ASSEMBLER__ *///--------------------------------------------------------------------------// Macros for switching context between two eCos instances (jump from// code in ROM to code in RAM or vice versa).// These are NOP's in the case of OpenRISC.#define CYGARC_HAL_SAVE_GP()#define CYGARC_HAL_RESTORE_GP()//--------------------------------------------------------------------------// Macro for finding return address of current function#define CYGARC_HAL_GET_RETURN_ADDRESS(_x_, _dummy_) \  asm volatile ( "l.ori %0,r9,0;" : "=r" (_x_) )#define CYGARC_HAL_GET_RETURN_ADDRESS_BACKUP(_dummy_)//--------------------------------------------------------------------------#endif // CYGONCE_HAL_HAL_ARCH_H// End of hal_arch.h

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