hal_powerpc_sim.cdl

来自「eCos操作系统源码」· CDL 代码 · 共 188 行

CDL
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# ====================================================================##      hal_powerpc_sim.cdl##      PSIM HAL package configuration data## ====================================================================#####ECOSGPLCOPYRIGHTBEGIN###### -------------------------------------------## This file is part of eCos, the Embedded Configurable Operating System.## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.#### eCos is free software; you can redistribute it and/or modify it under## the terms of the GNU General Public License as published by the Free## Software Foundation; either version 2 or (at your option) any later version.#### eCos is distributed in the hope that it will be useful, but WITHOUT ANY## WARRANTY; without even the implied warranty of MERCHANTABILITY or## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License## for more details.#### You should have received a copy of the GNU General Public License along## with eCos; if not, write to the Free Software Foundation, Inc.,## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.#### As a special exception, if other files instantiate templates or use macros## or inline functions from this file, or you compile this file and link it## with other works to produce a work based on this file, this file does not## by itself cause the resulting work to be covered by the GNU General Public## License. However the source code for this file must still be made available## in accordance with section (3) of the GNU General Public License.#### This exception does not invalidate any other reasons why a work based on## this file might be covered by the GNU General Public License.#### Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.## at http://sources.redhat.com/ecos/ecos-license/## -------------------------------------------#####ECOSGPLCOPYRIGHTEND##### ====================================================================######DESCRIPTIONBEGIN###### Author(s):      jskov# Original data:  bartv# Contributors:# Date:           1999-11-02######DESCRIPTIONEND###### ====================================================================cdl_package CYGPKG_HAL_POWERPC_SIM {    display       "PSIM minimal simulator"    parent        CYGPKG_HAL_POWERPC    requires      CYGPKG_HAL_POWERPC_PPC60x    requires      { CYGSEM_HAL_USE_ROM_MONITOR==0 }    define_header hal_powerpc_sim.h    include_dir   cyg/hal    description   "        The minimal simulator HAL package is provided for use when        only a simple simulation of the processor architecture is        desired, as opposed to detailed simulation of any specific        board. In particular it is not possible to simulate any of        the I/O devices, so device drivers cannot be used."    compile       sim.S hal_aux.c    implements CYGINT_HAL_DEBUG_GDB_CTRLC_UNSUPPORTED    define_proc {        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   <pkgconf/hal_powerpc_ppc60x.h>"        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_powerpc_sim.h>"    }    cdl_component CYG_HAL_STARTUP {        display       "Startup type"        flavor        data        legal_values  {"RAM"}        default_value {"RAM"}	no_define	define -file system.h CYG_HAL_STARTUP        description   "            Only RAM startup is supported at the moment."    }    cdl_option CYGHWR_HAL_POWERPC_FORCE_VECTORS {        display       "Force creation of vectors section."        calculated    1    }    cdl_option CYGHWR_HAL_POWERPC_DISABLE_MMU {        display       "Run with MMU disabled."        calculated    1        no_define        description   "            When building for SIM, don't enable MMU -- it's not needed            since caches are disabled, and there is a runtime simulation            overhead."    }    # Real-time clock/counter specifics    cdl_component CYGNUM_HAL_RTC_CONSTANTS {        display       "Real-time clock constants."        flavor        none            cdl_option CYGNUM_HAL_RTC_NUMERATOR {            display       "Real-time clock numerator"            flavor        data            default_value 1000000000        }        cdl_option CYGNUM_HAL_RTC_DENOMINATOR {            display       "Real-time clock denominator"            flavor        data            default_value 100        }        cdl_option CYGNUM_HAL_RTC_PERIOD {            display       "Real-time clock period"            flavor        data            default_value 9999        }    }        cdl_component CYGBLD_GLOBAL_OPTIONS {        display "Global build options"        flavor  none        parent  CYGPKG_NONE        description   "	    Global build options including control over	    compiler flags, linker flags and choice of toolchain."        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {            display "Global command prefix"            flavor  data            no_define            default_value { "powerpc-eabi" }            description "                This option specifies the command prefix used when                invoking the build tools."        }        cdl_option CYGBLD_GLOBAL_CFLAGS {            display "Global compiler flags"            flavor  data            no_define            default_value { "-mcpu=603 -msoft-float -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }            description   "                This option controls the global compiler flags which                are used to compile all packages by                default. Individual packages may define                options which override these global flags."        }        cdl_option CYGBLD_GLOBAL_LDFLAGS {            display "Global linker flags"            flavor  data            no_define            default_value { "-mcpu=603 -msoft-float -g -nostdlib -Wl,--gc-sections -Wl,-static" }            description   "                This option controls the global linker flags. Individual                packages may define options which override these global flags."        }    }    cdl_component CYGHWR_MEMORY_LAYOUT {        display "Memory layout"        flavor data        no_define        calculated { "powerpc_sim_ram" }        cdl_option CYGHWR_MEMORY_LAYOUT_LDI {            display "Memory layout linker script fragment"            flavor data            no_define            define -file system.h CYGHWR_MEMORY_LAYOUT_LDI            calculated { "<pkgconf/mlt_powerpc_sim_ram.ldi>" }        }        cdl_option CYGHWR_MEMORY_LAYOUT_H {            display "Memory layout header file"            flavor data            no_define            define -file system.h CYGHWR_MEMORY_LAYOUT_H            calculated { "<pkgconf/mlt_powerpc_sim_ram.h>" }        }    }}

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