mpc8xxx.h

来自「eCos操作系统源码」· C头文件 代码 · 共 1,318 行 · 第 1/5 页

    volatile CYG_WORD16 UeadOffset;       /* The offset in half-wordunits of the UEAD
                                 entry in the UDC extra header. Should be
                                 even address. If little-endian format is
                                 used, the UeadOffset is of the little-endian
                                 format. */
    volatile CYG_BYTE  reserved2[2];     /* Reserved */
    volatile CYG_WORD16 PmtBase;      /* Performance monitoring table base address */
    volatile CYG_WORD16 ApcParamBase;    /* APC Parameters table base address */
    volatile CYG_WORD16 FbpParamBase;    /* Free buffer pool parameters base address */
    volatile CYG_WORD16 IntQParamBase;   /* Interrupt queue parameters table base */
    volatile CYG_BYTE  reserved3[2];
    volatile CYG_WORD16 UniStatTableBase; /* UNI statistics table base */
    volatile CYG_WORD  BdBaseExt;        /* BD ring base address extension */
    union 
    {
       struct AddressCompressionPram   AddrCompression;
       struct ExtCamPram               ExtCam;
    } AddrMapping;            /* Address look-up mechanism */
    volatile CYG_WORD16 VciFiltering;     /* VCI filtering enable bits. If bit i is set,
                                 the cell with VCI=i will be sent to the
                                 raw cell queue. The bits 0-2 and 5 should
                                 be zero. */
    volatile CYG_WORD16 Gmode;            /* Global mode */
    volatile CYG_WORD16 CommInfo1;        /* The information field associated with the */
    volatile CYG_WORD  CommInfo2;        /* last host command */
    volatile CYG_BYTE  reserved4[4];     /* Reserved */
    volatile CYG_WORD  CRC32Preset;      /* Preset for CRC32 */
    volatile CYG_WORD  CRC32Mask;        /* Constant mask for CRC32 */
    volatile CYG_WORD16 AAL1SnpTableBase; /* AAl1 SNP protection look-up table base */
    volatile CYG_WORD16 reserved5;        /* Reserved */
    volatile CYG_WORD  SrtsBase;         /* External SRTS logic base address. For AAL1
                                 only. Should be 16 bytes aligned */
    volatile CYG_WORD16 IdleBase;         /* Idle cell base address */
    volatile CYG_WORD16 IdleSize;         /* Idle cell size: 52, 56, 60, 64 */
    volatile CYG_WORD  EmptyCellPayload; /* Empty cell payload (little-indian) */
    
    /* ABR specific only */
    volatile CYG_WORD  Trm; /* Upper bound on time between F-RM cells for active source */                                 
    volatile CYG_WORD16 Nrm; /* Controls the maximum data cells sent for each F-RM cell. */                           
    volatile CYG_WORD16 Mrm; /* Controls bandwidth between F-RM, B-RM and user data cell */
    volatile CYG_WORD16 Tcr;              /* Tag cell rate */
    volatile CYG_WORD16 AbrRxTcte;        /* ABR reserved area address (2-CYG_WORD16 aligned)*/
    volatile CYG_BYTE  reserved7[76];    /* Reserved */
} _PackedType t_Atm_Pram;



/*---------------------------------------------------------------------------*/
/*                     SERIAL MANAGEMENT CHANNEL  (SMC)                   */
/*---------------------------------------------------------------------------*/

typedef _Packed struct  
{
   CYG_WORD16   rbase;      /* Rx BD Base Address */
   CYG_WORD16   tbase;      /* Tx BD Base Address */
   CYG_BYTE    rfcr;    /* Rx function code */
   CYG_BYTE    tfcr;    /* Tx function code */
   CYG_WORD16   mrblr;      /* Rx buffer length */
   CYG_WORD    rstate;     /* Rx internal state */
   CYG_WORD    rptr;    /* Rx internal data pointer */
   CYG_WORD16   rbptr;      /* rb BD Pointer */
   CYG_WORD16   rcount;     /* Rx internal byte count */
   CYG_WORD    rtemp;      /* Rx temp */
   CYG_WORD    tstate;     /* Tx internal state */
   CYG_WORD    tptr;    /* Tx internal data pointer */
   CYG_WORD16   tbptr;      /* Tx BD pointer */
   CYG_WORD16   tcount;     /* Tx byte count */
   CYG_WORD    ttemp;       /* Tx temp */
  
   /* SMC UART-specific PRAM */
   CYG_WORD16   max_idl; /* Maximum IDLE Characters */
   CYG_WORD16   idlc;    /* Temporary IDLE Counter */
   CYG_WORD16   brkln;      /* Last Rx Break Length */
   CYG_WORD16   brkec;      /* Rx Break Condition Counter */
   CYG_WORD16   brkcr;      /* Break Count Register (Tx) */
   CYG_WORD16   r_mask;     /* Temporary bit mask */
  
} _PackedType t_Smc_Pram;



/*---------------------------------------------------------------------------*/
/*                      IDMA PARAMETER RAM                             */
/*---------------------------------------------------------------------------*/

typedef _Packed struct  
{
    CYG_WORD16      ibase;       /* IDMA BD Base Address               */
    CYG_WORD16      dcm;         /* DMA channel mode register          */
    CYG_WORD16      ibdptr;      /* next bd ptr                        */
    CYG_WORD16      DPR_buf;     /* ptr to internal 64 byte buffer     */
    CYG_WORD16      BUF_inv;     /* The quantity of data in DPR_buf    */
    CYG_WORD16      SS_max;      /* Steady State Max. transfer size    */
    CYG_WORD16      DPR_in_ptr;  /* write ptr for the internal buffer  */
    CYG_WORD16      sts;         /* Source Transfer Size               */
    CYG_WORD16      DPR_out_ptr; /* read ptr for the internal buffer   */
    CYG_WORD16      seob;        /* Source end of burst                */
    CYG_WORD16      deob;        /* Destination end of burst           */
    CYG_WORD16      dts;         /* Destination Transfer Size          */
    CYG_WORD16      RetAdd;      /* return address when ERM==1         */
    CYG_WORD16      Reserved;    /* reserved */
    CYG_WORD       BD_cnt;      /* Internal byte count                */
    CYG_WORD       S_ptr;       /* source internal data ptr           */
    CYG_WORD       D_ptr;       /* destination internal data ptr      */
    CYG_WORD       istate;      /* Internal state                     */

} _PackedType t_Idma_Pram;



/*-------------------------------------------------------------------*/
/*         INTER-INTEGRATED CIRCUIT  (I2C)                        */
/*-------------------------------------------------------------------*/

typedef _Packed struct 
{
   CYG_WORD16   rbase;      /* RX BD base address */
   CYG_WORD16   tbase;      /* TX BD base address */
   CYG_BYTE    rfcr;    /* Rx function code */
   CYG_BYTE    tfcr;    /* Tx function code */
   CYG_WORD16   mrblr;      /* Rx buffer length */
   CYG_WORD    rstate;     /* Rx internal state */
   CYG_WORD    rptr;    /* Rx internal data pointer */
   CYG_WORD16   rbptr;      /* rb BD Pointer */
   CYG_WORD16   rcount;     /* Rx internal byte count */
   CYG_WORD    rtemp;      /* Rx temp */
   CYG_WORD    tstate;     /* Tx internal state */
   CYG_WORD    tptr;    /* Tx internal data pointer */
   CYG_WORD16   tbptr;      /* Tx BD pointer */
   CYG_WORD16   tcount;     /* Tx byte count */
   CYG_WORD    ttemp;      /* Tx temp */

} _PackedType t_I2c_Pram;



/*---------------------------------------------------------------------------*/
/*                       SERIAL PERIPHERAL INTERFACE  (SPI)                  */
/*---------------------------------------------------------------------------*/

typedef _Packed struct  
{
   CYG_WORD16   rbase;      /* Rx BD Base Address */
   CYG_WORD16   tbase;      /* Tx BD Base Address */
   CYG_BYTE    rfcr;       /* Rx function code */
   CYG_BYTE    tfcr;       /* Tx function code */
   CYG_WORD16   mrblr;      /* Rx buffer length */
   CYG_WORD    rstate;     /* Rx internal state */
   CYG_WORD    rptr;       /* Rx internal data pointer */
   CYG_WORD16   rbptr;      /* Rx BD Pointer */
   CYG_WORD16   rcount;     /* Rx internal byte count */
   CYG_WORD    rtemp;      /* Rx temp */
   CYG_WORD    tstate;     /* Tx internal state */
   CYG_WORD    tptr;       /* Tx internal data pointer */
   CYG_WORD16   tbptr;      /* Tx BD pointer */
   CYG_WORD16   tcount;     /* Tx byte count */
   CYG_WORD    ttemp;      /* Tx temp */
   CYG_BYTE    reserved[8];

} _PackedType t_Spi_Pram;



/*---------------------------------------------------------------------------*/
/*                RISC TIMER PARAMETER RAM                             */
/*---------------------------------------------------------------------------*/

typedef _Packed struct  
{
 
   CYG_WORD16   tm_base;    /* RISC timer table base adr */
   CYG_WORD16   tm_ptr;     /* RISC timer table pointer */
   CYG_WORD16   r_tmr;      /* RISC timer mode register */
   CYG_WORD16   r_tmv;      /* RISC timer valid register */
   CYG_WORD tm_cmd;     /* RISC timer cmd register */
   CYG_WORD tm_cnt;     /* RISC timer internal cnt */
} _PackedType t_timer_pram;



/*--------------------------------------------------------------------------*/
/*                  ROM MICROCODE PARAMETER RAM AREA                        */
/*--------------------------------------------------------------------------*/

typedef _Packed struct  
{
   CYG_WORD16   rev_num;    /* Ucode Revision Number */
   CYG_WORD16   d_ptr;      /* MISC Dump area pointer */
} _PackedType t_ucode_pram;

/*--------------------------------------------------------------------------*/
/*                MAIN DEFINITION OF MPC8260 INTERNAL MEMORY MAP            */
/*--------------------------------------------------------------------------*/

typedef _Packed struct 
{

/* cpm_ram */
    t_Mch_Pram    mch_pram[256]; /* MCC logical channels parameter ram */
    volatile CYG_BYTE reserved0[0x4000];    /* Reserved area */
    
/* DPR_BASE+0x8000*/
    union 
    {
    
    /*for access to the PRAM structs for SCCs, FCCs, and MCCs */ 
       struct serials 
       {
           t_Scc_Pram scc_pram[4];
           t_Fcc_Pram fcc_pram[3];
           t_Mcc_Pram mcc_pram[2];
           volatile CYG_BYTE reserved1[0x700];
       } serials;
        
    /* for access to ATM PRAM structs */
       struct atm
       {
           volatile CYG_BYTE reserved2[0x400];
           t_Atm_Pram atm_pram[2];
           volatile CYG_BYTE reserved3[0xa00];
       } atm;
        
    /* for access to the memory locations holding user-defined 
       base addresses of PRAM for SMCs, IDMA, SPI, and I2C. */     
       struct standard
       {
            volatile CYG_BYTE scc1[0x100];
            volatile CYG_BYTE scc2[0x100];
            volatile CYG_BYTE scc3[0x100];
            volatile CYG_BYTE scc4[0x100];
            volatile CYG_BYTE fcc1[0x100];
            volatile CYG_BYTE fcc2[0x100];
            volatile CYG_BYTE fcc3[0x100];
            volatile CYG_BYTE mcc1[0x80];
            volatile CYG_BYTE reserved_0[0x7c];
            volatile CYG_WORD16 smc1;  // Pointer to SMC1 DPRAM
            volatile CYG_BYTE idma1[0x2];
            volatile CYG_BYTE mcc2[0x80];
            volatile CYG_BYTE reserved_1[0x7c];
            volatile CYG_WORD16 smc2;  // Pointer to SMC2 DPRAM
            volatile CYG_BYTE idma2[0x2];
            volatile CYG_BYTE reserved_2[0xfc];
            volatile CYG_BYTE spi[0x2];
            volatile CYG_BYTE idma3[0x2];
            volatile CYG_BYTE reserved_3[0xe0];
            volatile CYG_BYTE timers[0x10];
            volatile CYG_BYTE Rev_num[0x2];
            volatile CYG_BYTE D_ptr[0x2];
            volatile CYG_BYTE reserved_4[0x4];
            volatile CYG_BYTE rand[0x4];
            volatile CYG_BYTE i2c[0x2];
            volatile CYG_BYTE idma4[0x2];
            volatile CYG_BYTE reserved_5[0x500];
       } standard;
        
    } pram;
    
    volatile CYG_BYTE reserved11[0x2000];      /* Reserved area */
    volatile CYG_BYTE cpm_ram_dpram_2[0x1000]; /* Internal RAM */
    volatile CYG_BYTE reserved12[0x4000];      /* Reserved area */

/* siu */
    volatile CYG_WORD siu_siumcr;        /* SIU Module Configuration Register */
    volatile CYG_WORD siu_sypcr;         /* System Protection Control Register */