hal_diag.c

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//=============================================================================
//
//      hal_diag.c
//
//      HAL diagnostic output code
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):   Patrick Doyle <[e-mail]>
// Contributors:Patrick Doyle <[e-mail]>
// Date:        2002-12-17
// Purpose:     HAL diagnostic output
//      This file contains the type definitions, constants, and function
//      prototoypes that implement very simple access to the UART on the
//      OMAP part.
// Description: Implementations of HAL diagnostic output support.
//
//####DESCRIPTIONEND####
//
//=============================================================================

#include <pkgconf/hal.h>
#include CYGBLD_HAL_VARIANT_H           // Variant specific configuration
#include CYGBLD_HAL_PLATFORM_H          // Platform specific configuration

#include <cyg/infra/cyg_type.h>         // base types
#include <cyg/infra/cyg_trac.h>         // tracing macros
#include <cyg/infra/cyg_ass.h>          // assertion macros

#include <cyg/hal/hal_arch.h>           // basic machine info
#include <cyg/hal/hal_intr.h>           // interrupt macros
#include <cyg/hal/hal_io.h>             // IO macros
#include <cyg/hal/hal_diag.h>
#include <cyg/hal/drv_api.h>
#include <cyg/hal/hal_if.h>             // interface API
#include <cyg/hal/hal_misc.h>           // Helper functions
#include <cyg/hal/innovator.h>          // platform definitions

//-----------------------------------------------------------------------------

#define CYG_DEVICE_SERIAL_BAUD_DIV (CYGNUM_HAL_ARM_INNOVATOR_PERIPHERAL_CLOCK/CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD/16)
#define CYG_DEVICE_SERIAL_BAUD_LSB (CYG_DEVICE_SERIAL_BAUD_DIV&0xff)
#define CYG_DEVICE_SERIAL_BAUD_MSB ((CYG_DEVICE_SERIAL_BAUD_DIV>>8)&0xff)

//-----------------------------------------------------------------------------
typedef struct {
    cyg_int32 msec_timeout;
#ifdef LATER
    cyg_uint32 base;
    int isr_vector;
#endif
} channel_data_t;

/************************************************************************
 * Useful definitions -- note that 'USE_MODEM_UART' has not been extensively
 * tested nor debugged (read -- it probably doesn't work).
 ************************************************************************/
/*#define USE_MODEM_UART*/
#ifdef USE_MODEM_UART
#define BASE_ADDR 0xfffce800
#define STRIDE    1
#else
#define BASE_ADDR 0xfffb0000
#define STRIDE    4
#endif

#define RHR   0x00
#define THR   0x00
#define DLL   0x00
#define DLH   0x01
#define IER   0x01
#define FCR   0x02
#define EFR   0x02
#define IIR   0x02
#define LCR   0x03
#define MCR   0x04
#define XON1  0x04
#define LSR   0x05
#define XON2  0x05
#define MSR   0x06
#define TCR   0x06
#define XOFF1 0x06
#define SPR   0x07
#define TLR   0x07
#define XOFF2 0x07
#define MDR1  0x08
#define UASR  0x0e
#define SCR   0x10
#define SSR   0x11
#define OSC_12M 0x13


/************************************************************************
 * Data local to this file
 ************************************************************************/
#define write_serial(offset, value) \
  *(volatile char *)(BASE_ADDR + STRIDE * (offset)) = value

#define read_serial(offset) \
  (*(volatile char *)(BASE_ADDR + STRIDE * (offset)))

/************************************************************************
 * Forward References
 ************************************************************************/

/************************************************************************
 * Function:
 *      init_uart()
 *
 * Purpose:
 *      This procedure may be called in order to initialize the UART
 *      prior to use.
 *
 * Operation:
 *      Set up the UART for 115,200 baud, 8 bits, 1 stop bit, no parity.
 *
 *      The UART is defined by the 'BASE_ADDR' macro.
 *
 * Notes/Issues:
 *      This pays some lip service to being able to use UART3, but since
 *      it seems to me that the use of UART3 requires that the DSP do
 *      some setup (at least, until I learn more), it probably won't
 *      work for UART3.
 ************************************************************************/
static void
quick_init_uart(void)
{
  /* UART Software Reset */ 
  write_serial(LCR, 0xBF); /* Access to EFR & UART break is removed */
  write_serial(EFR, BIT_04); /* Set EFR[4] = 0x1 */
  write_serial(LCR, 0x00); /* Access to IER & MCR is allowed */

  write_serial(IER, 0x00); /* Disable all interrupts */
  write_serial(MCR, 0x00); /* DTR, RTS, XON, loopbback inactive */

  write_serial(MDR1,0x07); /* UART is in reset */

  /* UART FIFO Configuration */
  write_serial(MCR, read_serial(MCR) | BIT_06); /* Set MCR[6] = 1 */
  write_serial(TCR, 0x0F); /* RTS off when Rx FIFO at 60 bytes, on at 0 */
  write_serial(TLR, 0x88); /* set TX & RX trigger levels each to 32 */
  write_serial(FCR, 0x07); /* Enable & reset FIFOs, triggers at 8 */
  write_serial(LCR, 0xBF); /* Access EFR */
  write_serial(EFR, 0xC0); /* Enable auto RTS & CTS */
  write_serial(LCR, 0x00); /* Access to IER & MCR is allowed */
  write_serial(MCR, read_serial(MCR) & ~BIT_06); /* Clear MCR[6] */

  /* Baud Rate and Stop Configuration */
  write_serial(LCR, 0x03); /* 8,N,1 */
#ifdef USE_MODEM_UART
  write_serial(LCR, 0x83); /* gain access to DLH and DLL */
  write_serial(DLH, 0x00); /* Divisor value = Operating Freq/(16 x Baud Rate) */
  write_serial(DLL, 0x0D); /* DPLL2 configured for Operating Freq = 24 MHz */
			   /* Baud Rate = 115,200 bps */
#else
  write_serial(OSC_12M, 1);/* Set divisor value to 6.5 */
  write_serial(LCR, 0x83); /* gain access to DLH and DLL */
  write_serial(DLH, 0x00); /* Divisor value =
                            *     Operating Freq/(16 x 6.5 x Baud Rate) */
  write_serial(DLL, 0x01); /* DPLL2 configured for Operating Freq = 12 MHz */
			   /* Baud Rate = 115,200 bps */
#endif
  write_serial(LCR, 0x03); /* restore LCR */

  write_serial(MDR1,0x00); /* enable UART */
}

/************************************************************************
 * Function:
 *      putchar(c)
 *
 * Purpose:
 *      This procedure may be called in order to output a character on
 *      the serial port.  It blocks until the serial port TX FIFO is
 *      empty.
 *
 * Operation:
 *      Write character to the Transmit Holding Register (THR).  Can
 *      optionally map the Linefeed character to a Carriage Return
 *      character and/or output a Carriage Return character whenever
 *      a Linefeed character is seen, depending on #ifdefs.
 *
 * Notes/Issues:
 *      This could be optimized to block only when the serial port TX
 *      FIFO is full.
 ************************************************************************/
static void
quick_putchar(char c)
{
/* #define MAP_LF_TO_CR */
#ifdef MAP_LF_TO_CR
  if (c == '\n') {
    c = '\r';
  }
#endif
  while ((read_serial(LSR) & 0x20) == 0) ;
  write_serial(THR, c);

/*  #define DO_CRLF */
#ifdef DO_CRLF
  if (c == '\n') {
    quick_putchar('\r');
  }
#endif
}

/************************************************************************
 * Function:
 *      getchar()
 *
 * Purpose:
 *      This function may be called in order to read a character from
 *      the serial port.
 *
 * Operation:
 *      Poll the Line Status register until it indicates a character has
 *      been received.  Return the character to the caller.
 *
 * Notes/Issues:
 *
 ************************************************************************/
static int
quick_getchar(void)
{
  while ((read_serial(LSR) & 0x01) == 0) ;
  return(read_serial(RHR));
}

/************************************************************************
 * Function:
 *      getchar_nonblock()
 *
 * Purpose:
 *      This function may be called in order to read a character from
 *      the serial port.
 *
 * Operation:
 *      Poll the Line Status register until it indicates a character has
 *      been received.  Return the character to the caller.
 *
 * Notes/Issues:
 *
 ************************************************************************/
static int
quick_getchar_nonblock(char *c)
{
  if ((read_serial(LSR) & 0x01) == 0) {
    return(0);
  } else {
    *c = read_serial(RHR);
    return(1);
  }
}