hal_arm_sa11x0_nano.cdl

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# ====================================================================##      hal_arm_sa11x0_nano.cdl##      ARM SA1110/nanoEngine platform HAL package configuration data## ====================================================================#####ECOSGPLCOPYRIGHTBEGIN###### -------------------------------------------## This file is part of eCos, the Embedded Configurable Operating System.## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.#### eCos is free software; you can redistribute it and/or modify it under## the terms of the GNU General Public License as published by the Free## Software Foundation; either version 2 or (at your option) any later version.#### eCos is distributed in the hope that it will be useful, but WITHOUT ANY## WARRANTY; without even the implied warranty of MERCHANTABILITY or## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License## for more details.#### You should have received a copy of the GNU General Public License along## with eCos; if not, write to the Free Software Foundation, Inc.,## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.#### As a special exception, if other files instantiate templates or use macros## or inline functions from this file, or you compile this file and link it## with other works to produce a work based on this file, this file does not## by itself cause the resulting work to be covered by the GNU General Public## License. However the source code for this file must still be made available## in accordance with section (3) of the GNU General Public License.#### This exception does not invalidate any other reasons why a work based on## this file might be covered by the GNU General Public License.#### Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.## at http://sources.redhat.com/ecos/ecos-license/## -------------------------------------------#####ECOSGPLCOPYRIGHTEND##### ====================================================================######DESCRIPTIONBEGIN###### Author(s):      gthomas# Original data:  gthomas# Contributors:   hmt# Date:           2001-02-12######DESCRIPTIONEND###### ====================================================================cdl_package CYGPKG_HAL_ARM_SA11X0_NANO {    display       "ARM SA1110/nanoEngine evaluation board"    parent        CYGPKG_HAL_ARM_SA11X0    hardware    include_dir   cyg/hal    define_header hal_arm_sa11x0_nano.h    description   "        This HAL platform package provides         support for the Intel StrongARM SA1110 based evalation board, 	made by Bright Star Engineering (BSE), known as 'nanoEngine'."    compile       nano_misc.c    implements    CYGINT_HAL_DEBUG_GDB_STUBS    implements    CYGINT_HAL_DEBUG_GDB_STUBS_BREAK    implements    CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT    implements    CYGINT_HAL_ARM_MEM_REAL_REGION_TOP    implements    CYGHWR_HAL_ARM_SA11X0_UART1    implements    CYGHWR_HAL_ARM_SA11X0_UART3    define_proc {        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   <pkgconf/hal_arm.h>"        puts $::cdl_system_header "#define CYGBLD_HAL_VARIANT_H  <pkgconf/hal_arm_sa11x0.h>"        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_arm_sa11x0_nano.h>"	puts $::cdl_header "#define HAL_PLATFORM_CPU    \"StrongARM 1110\""        puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"nanoEngine\""        puts $::cdl_header "#define HAL_PLATFORM_EXTRA  \"by Bright Star Engineering\""        puts $::cdl_header "#define HAL_ARCH_PROGRAM_NEW_STACK nano_program_new_stack"    }    cdl_component CYG_HAL_STARTUP {        display       "Startup type"        flavor        data        default_value {"RAM"}        legal_values  {"RAM" "ROM"}	no_define	define -file system.h CYG_HAL_STARTUP        description   "           When targetting the nanoEngine it is possible to build           the system for either RAM bootstrap or ROM bootstrap(s). Select           'ram' when building programs to load into RAM using eCos GDB           stubs.  Select 'rom' when building a stand-alone application           which will be put into ROM, or for the special case of           building the eCos GDB stubs themselves."	cdl_component CYGBLD_HAL_STARTUP_ROM_POST_BEFORE_ECOS {	    display "POST code exists at base of flash"	    active_if  { CYG_HAL_STARTUP == "ROM" }	    calculated 1 ; # REQUIRED for BSE BOOT PROM	    description "	    To accommodate POST (power-on self-test) code,	    or other preboot loader code such as the BSE nanoEngine Firmware,	    in the start of            the flash, that is run at startup, we can link RedBoot (or any            ROM start eCos application) for a higher address, specifically            256kBytes higher than usual in this case."	    cdl_option CYGBLD_HAL_STARTUP_ROM_POST_OMIT_SDRAM_INIT {		display "Omit SDRAM initialization if already set up"		calculated 1 ; # REQUIRED for BSE BOOT PROM		description "	    POST code will likely already initialize SDRAM.  This option            enables code that omits SDRAM initialization, if it appears            already to be set up."	    }	}    }    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD {        display       "Diagnostic serial port baud rate"        flavor        data        legal_values  9600 19200 38400 115200        default_value 38400 ; # BUT BSE BOOT PROM IS 9600        description   "            This option selects the baud rate used for the diagnostic port.            Note: this should match the value chosen for the GDB port if the            diagnostic and GDB port are the same."    }    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD {        display       "GDB serial port baud rate"        flavor        data        legal_values  9600 19200 38400 115200        default_value 38400 ; # BUT BSE BOOT PROM IS 9600        description   "            This option selects the baud rate used for the diagnostic port.            Note: this should match the value chosen for the GDB port if the            diagnostic and GDB port are the same."    }    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {        display      "Number of communication channels on the board"        flavor       data        calculated   2	description "	    Channel 1 is the little 6-way phone socket, connected to UART3.	    Channel 0 is the little 6-way phone socket, connected to UART1.	    Channel 0 is nearest the power socket and reset button.	    Channel 0 is the default for all serial I/O."    }     cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {        display          "Debug serial port"        active_if        CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE        flavor data        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1        default_value    0        description      "            The nanoEngine board has two serial ports. This option            chooses which port will be used to connect to a host            running GDB."    }    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT {        display      "Default console channel."        flavor       data        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1        calculated   0    }     cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {	display          "Diagnostic serial port"        active_if        CYGPRI_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_CONFIGURABLE	flavor data	legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1	default_value    CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT	description      "	The nanoEngine board has two serial ports.  This option	chooses which port will be used for diagnostic output."    }        cdl_component CYGBLD_GLOBAL_OPTIONS {        display "Global build options"        flavor  none        no_define        description   "	    Global build options including control over	    compiler flags, linker flags and choice of toolchain."        parent  CYGPKG_NONE        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {

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