hal_platform_setup.h

来自「eCos操作系统源码」· C头文件 代码 · 共 329 行 · 第 1/2 页

                |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))         ;\
        /* .long   KS32C_ROMCON4 */                                       ;\
        .long  ( (KS32C_ROMCON_PMC_ROM)                                    \
                |(KS32C_ROMCON_TPA_5C)                                     \
                |(KS32C_ROMCON_TACC_5C)                                    \
                |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift)           \
                |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))         ;\
        /* .long   KS32C_ROMCON5 */                                       ;\
        .long  ( (KS32C_ROMCON_PMC_ROM)                                    \
                |(KS32C_ROMCON_TPA_5C)                                     \
                |(KS32C_ROMCON_TACC_5C)                                    \
                |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift)           \
                |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))         ;\
        /* .long   KS32C_DRAMCON0 */                                      ;\
        .long  ( (KS32C_DRAMCON_RESERVED)                                  \
                |(KS32C_DRAMCON_CAN_10)                                    \
                |(KS32C_DRAMCON_TRP_3C)                                    \
                |(KS32C_DRAMCON_TRC_1C)                                    \
                |(KS32C_DRAMCON_TCP_1C)                                    \
                |(KS32C_DRAMCON_TCS_2C)                                    \
                |(KS32C_DRAMCON_EDO)                                       \
                |((0x00000000 >> 16) << KS32C_DRAMCON_BASE_shift)          \
                |((0x00400000 >> 16) << KS32C_DRAMCON_NEXT_shift))        ;\
        /* .long   KS32C_DRAMCON1 */                                      ;\
        .long  ( (KS32C_DRAMCON_RESERVED)                                  \
                |(KS32C_DRAMCON_CAN_10)                                    \
                |(KS32C_DRAMCON_TRP_1C)                                    \
                |(KS32C_DRAMCON_TRC_1C)                                    \
                |(KS32C_DRAMCON_TCP_1C)                                    \
                |(KS32C_DRAMCON_TCS_2C)                                    \
                |(KS32C_DRAMCON_EDO)                                       \
                |((0x00400000 >> 16) << KS32C_DRAMCON_BASE_shift)          \
                |((0x00800000 >> 16) << KS32C_DRAMCON_NEXT_shift))        ;\
        /* .long   KS32C_DRAMCON2 */                                      ;\
        .long  ( (KS32C_DRAMCON_RESERVED)                                  \
                |(KS32C_DRAMCON_CAN_10)                                    \
                |(KS32C_DRAMCON_TRP_1C)                                    \
                |(KS32C_DRAMCON_TRC_1C)                                    \
                |(KS32C_DRAMCON_TCP_1C)                                    \
                |(KS32C_DRAMCON_TCS_2C)                                    \
                |((0x00800000 >> 16) << KS32C_DRAMCON_BASE_shift)          \
                |((0x00c00000 >> 16) << KS32C_DRAMCON_NEXT_shift))        ;\
        /* .long   KS32C_DRAMCON3 */                                      ;\
        .long  ( (KS32C_DRAMCON_RESERVED)                                  \
                |(KS32C_DRAMCON_CAN_10)                                    \
                |(KS32C_DRAMCON_TRP_1C)                                    \
                |(KS32C_DRAMCON_TRC_1C)                                    \
                |(KS32C_DRAMCON_TCP_1C)                                    \
                |(KS32C_DRAMCON_TCS_2C)                                    \
                |((0x00c00000 >> 16) << KS32C_DRAMCON_BASE_shift)          \
                |((0x01000000 >> 16) << KS32C_DRAMCON_NEXT_shift))        ;\
        /* .long   KS32C_REFEXTCON */                                     ;\
        .long   (((2048+1-(16*CYGNUM_HAL_CPUCLOCK/1000000)) << KS32C_REFEXTCON_RCV_shift) \
                 |(KS32C_REFEXTCON_TCSR_1C)                                \
                 |(KS32C_REFEXTCON_TCHR_1C)                                \
                 |(KS32C_REFEXTCON_REN)                                    \
                 |(KS32C_REFEXTCON_VSF)                                    \
                 |(KS32C_REFEXTCON_BASE))                                 ;\
                                                                          ;\
        /* Sync DRAM setup */                                             ;\
        /* Flash is 16 bit, everything else 32 bit */                     ;\
        /* .long   KS32C_EXTDBWTH */                                      ;\
40:     .long  ( (KS32C_EXTDBWTH_16BIT<<KS32C_EXTDBWTH_DSR0_shift)         \
                |(KS32C_EXTDBWTH_16BIT<<KS32C_EXTDBWTH_DSR1_shift)         \
                |(KS32C_EXTDBWTH_32BIT<<KS32C_EXTDBWTH_DSR2_shift)         \
                |(KS32C_EXTDBWTH_32BIT<<KS32C_EXTDBWTH_DSR3_shift)         \
                |(KS32C_EXTDBWTH_32BIT<<KS32C_EXTDBWTH_DSR4_shift)         \
                |(KS32C_EXTDBWTH_32BIT<<KS32C_EXTDBWTH_DSR5_shift)         \
                |(KS32C_EXTDBWTH_32BIT<<KS32C_EXTDBWTH_DSD0_shift)         \
                |(KS32C_EXTDBWTH_32BIT<<KS32C_EXTDBWTH_DSD1_shift)         \
                |(KS32C_EXTDBWTH_32BIT<<KS32C_EXTDBWTH_DSD2_shift)         \
                |(KS32C_EXTDBWTH_32BIT<<KS32C_EXTDBWTH_DSD3_shift)         \
                |(KS32C_EXTDBWTH_32BIT<<KS32C_EXTDBWTH_DSX0_shift)         \
                |(KS32C_EXTDBWTH_32BIT<<KS32C_EXTDBWTH_DSX1_shift)         \
                |(KS32C_EXTDBWTH_32BIT<<KS32C_EXTDBWTH_DSX2_shift)         \
                |(KS32C_EXTDBWTH_32BIT<<KS32C_EXTDBWTH_DSX3_shift) )      ;\
        /* Flash at 0x01800000-0x01880000, 5 cycles, 7 cycles */          ;\
        /* .long   KS32C_ROMCON0 */                                       ;\
        .long  ( (KS32C_ROMCON_PMC_ROM)                                    \
                |(KS32C_ROMCON_TPA_5C)                                     \
                |(KS32C_ROMCON_TACC_7C)                                    \
                |((0x01800000 >> 16) << KS32C_ROMCON_BASE_shift)           \
                |((0x01880000 >> 16) << KS32C_ROMCON_NEXT_shift))         ;\
        /* .long   KS32C_ROMCON1 */                                       ;\
        .long  ( (KS32C_ROMCON_PMC_ROM)                                    \
                |(KS32C_ROMCON_TPA_5C)                                     \
                |(KS32C_ROMCON_TACC_5C)                                    \
                |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift)           \
                |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))         ;\
        /* .long   KS32C_ROMCON2 */                                       ;\
        .long  ( (KS32C_ROMCON_PMC_ROM)                                    \
                |(KS32C_ROMCON_TPA_5C)                                     \
                |(KS32C_ROMCON_TACC_5C)                                    \
                |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift)           \
                |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))         ;\
        /* .long   KS32C_ROMCON3 */                                       ;\
        .long  ( (KS32C_ROMCON_PMC_ROM)                                    \
                |(KS32C_ROMCON_TPA_5C)                                     \
                |(KS32C_ROMCON_TACC_5C)                                    \
                |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift)           \
                |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))         ;\
        /* .long   KS32C_ROMCON4 */                                       ;\
        .long  ( (KS32C_ROMCON_PMC_ROM)                                    \
                |(KS32C_ROMCON_TPA_5C)                                     \
                |(KS32C_ROMCON_TACC_5C)                                    \
                |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift)           \
                |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))         ;\
        /* .long   KS32C_ROMCON5 */                                       ;\
        .long  ( (KS32C_ROMCON_PMC_ROM)                                    \
                |(KS32C_ROMCON_TPA_5C)                                     \
                |(KS32C_ROMCON_TACC_5C)                                    \
                |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift)           \
                |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))         ;\
        /* .long   KS32C_DRAMCON0 */                                      ;\
        .long  ( (KS32C_DRAMCON_RESERVED)                                  \
                |(KS32C_DRAMCON_CAN_8)                                     \
                |(KS32C_DRAMCON_TRP_4C)                                    \
                |(KS32C_DRAMCON_TRC_2C)                                    \
                |((0x00000000 >> 16) << KS32C_DRAMCON_BASE_shift)          \
                |((0x00400000 >> 16) << KS32C_DRAMCON_NEXT_shift))        ;\
        /* .long   KS32C_DRAMCON1 */                                      ;\
        .long  ( (KS32C_DRAMCON_RESERVED)                                  \
                |(KS32C_DRAMCON_CAN_8)                                     \
                |(KS32C_DRAMCON_TRP_2C)                                    \
                |(KS32C_DRAMCON_TRC_2C)                                    \
                |((0x00400000 >> 16) << KS32C_DRAMCON_BASE_shift)          \
                |((0x00800000 >> 16) << KS32C_DRAMCON_NEXT_shift))        ;\
        /* .long   KS32C_DRAMCON2 */                                      ;\
        .long  ( (KS32C_DRAMCON_RESERVED)                                  \
                |(KS32C_DRAMCON_CAN_8)                                     \
                |(KS32C_DRAMCON_TRP_2C)                                    \
                |(KS32C_DRAMCON_TRC_2C)                                    \
                |((0x00800000 >> 16) << KS32C_DRAMCON_BASE_shift)          \
                |((0x00c00000 >> 16) << KS32C_DRAMCON_NEXT_shift))        ;\
        /* .long   KS32C_DRAMCON3 */                                      ;\
        .long  ( (KS32C_DRAMCON_RESERVED)                                  \
                |(KS32C_DRAMCON_CAN_8)                                     \
                |(KS32C_DRAMCON_TRP_2C)                                    \
                |(KS32C_DRAMCON_TRC_2C)                                    \
                |((0x00c00000 >> 16) << KS32C_DRAMCON_BASE_shift)          \
                |((0x01000000 >> 16) << KS32C_DRAMCON_NEXT_shift))        ;\
        /* .long   KS32C_REFEXTCON */                                     ;\
        .long  (((2048+1-(8*CYGNUM_HAL_CPUCLOCK/1000000)) << KS32C_REFEXTCON_RCV_shift) \
                 |(KS32C_REFEXTCON_TRC_4C)                                 \
                 |(KS32C_REFEXTCON_REN)                                    \
                 |(KS32C_REFEXTCON_VSF)                                    \
                 |(KS32C_REFEXTCON_BASE))                                 ;\
99:     LED 0x82                                                          ;\
        ldr     r3,=0x00000000                                            ;\
        str     r3,[r3]                                                   ;\
        ldr     r4,[r3]                                                   ;\
        cmp     r4,r3                                                     ;\
        beq     15f                                                       ;\
11:     LED 0x83                                                          ;\
        b 11b                                                             ;\
15:     LED 0x84
#else
#define PLATFORM_SETUP1
#endif

//-----------------------------------------------------------------------------
// end of hal_platform_setup.h
#endif // CYGONCE_HAL_PLATFORM_SETUP_H