📄 mips_mips32.ld
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//===========================================================================//// MLT linker script for MIPS32////===========================================================================//####ECOSGPLCOPYRIGHTBEGIN####// -------------------------------------------// This file is part of eCos, the Embedded Configurable Operating System.// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.//// eCos is free software; you can redistribute it and/or modify it under// the terms of the GNU General Public License as published by the Free// Software Foundation; either version 2 or (at your option) any later version.//// eCos is distributed in the hope that it will be useful, but WITHOUT ANY// WARRANTY; without even the implied warranty of MERCHANTABILITY or// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License// for more details.//// You should have received a copy of the GNU General Public License along// with eCos; if not, write to the Free Software Foundation, Inc.,// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.//// As a special exception, if other files instantiate templates or use macros// or inline functions from this file, or you compile this file and link it// with other works to produce a work based on this file, this file does not// by itself cause the resulting work to be covered by the GNU General Public// License. However the source code for this file must still be made available// in accordance with section (3) of the GNU General Public License.//// This exception does not invalidate any other reasons why a work based on// this file might be covered by the GNU General Public License.//// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.// at http://sources.redhat.com/ecos/ecos-license/// -------------------------------------------//####ECOSGPLCOPYRIGHTEND####//===========================================================================#include <pkgconf/system.h>OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-littlemips")/* The preprocessor defines mips, but we know we're mips :-) */#undef mipsOUTPUT_ARCH(mips:isa32)STARTUP(vectors.o)ENTRY(reset_vector)#ifdef EXTRASINPUT(extras.o)#endif#if (__GNUC__ >= 3)GROUP(libtarget.a libgcc.a libsupc++.a)#elseGROUP(libtarget.a libgcc.a)#endif/* FIXME: The MLT should pass in the required alignment since it must be * the same as the VMA's alignment. As a result of this bug, all the MIPS32 * ROM mlt files have alignment 8, when some should have alignment 4 * (902557-CR) */#define ALIGN_LMA 0x40#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1))#define LMA_EQ_VMA#define FORCE_OUTPUT . = .#define SECTIONS_BEGIN#if defined(CYG_HAL_STARTUP_RAM)/* this version for RAM startup */#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ .rom_vectors _vma_ : _lma_ \ { KEEP (*(.utlb_vector)) \ . = ALIGN(0x80); KEEP(*(.other_vector)) \ /* debug and reset vector not used in RAM version */ \ KEEP(*(.debug_vector)) \ KEEP (*(.reset_vector)) } \ > _region_#elif defined(CYG_HAL_STARTUP_ROM)/* this version for ROM startup */#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ .rom_vectors _vma_ : _lma_ \ { KEEP (*(.reset_vector)) \ . = ALIGN(0x200); KEEP (*(.utlb_vector)) \ . = . + 0x100; \ . = ALIGN(0x80); KEEP(*(.other_vector)) \ . = . + 0x80; \ . = ALIGN(0x80); KEEP(*(.debug_vector)) } \ > _region_#endif /* ROM startup version of ROM vectors */#define SECTION_ROMISC(_region_, _vma_, _lma_) \ .interp _vma_ : _lma_ { *(.interp) } > _region_ \ .hash : FOLLOWING(.interp) { *(.hash) } > _region_ \ .dynsym : FOLLOWING(.hash) { *(.dynsym) } > _region_ \ .dynstr : FOLLOWING(.dynsym) { *(.dynstr) } > _region_ \ .gnu.version : FOLLOWING(.dynstr) { *(.gnu.version) } > _region_ \ .gnu.version_d : FOLLOWING(.gnu.version) { *(.gnu.version_d) } > _region_ \ .gnu.version_r : FOLLOWING(.gnu.version_d) { *(.gnu.version_r) } > _region_ \ .plt : FOLLOWING(.gnu.version_r) { *(.plt) } > _region_#define SECTION_RELOCS(_region_, _vma_, _lma_) \ .rel.text : \ { \ *(.rel.text) \ *(.rel.text.*) \ *(.rel.gnu.linkonce.t*) \ } > _region_ \ .rela.text : \ { \ *(.rela.text) \ *(.rela.text.*) \ *(.rela.gnu.linkonce.t*) \ } > _region_ \ .rel.data : \ { \ *(.rel.data) \ *(.rel.data.*) \ *(.rel.gnu.linkonce.d*) \ } > _region_ \ .rela.data : \ { \ *(.rela.data) \ *(.rela.data.*) \ *(.rela.gnu.linkonce.d*) \ } > _region_ \ .rel.rodata : \ { \ *(.rel.rodata) \ *(.rel.rodata.*) \ *(.rel.gnu.linkonce.r*) \ } > _region_ \ .rela.rodata : \ { \ *(.rela.rodata) \ *(.rela.rodata.*) \ *(.rela.gnu.linkonce.r*) \ } > _region_ \ .rel.got : { *(.rel.got) } > _region_ \ .rela.got : { *(.rela.got) } > _region_ \ .rel.ctors : { *(.rel.ctors) } > _region_ \ .rela.ctors : { *(.rela.ctors) } > _region_ \ .rel.dtors : { *(.rel.dtors) } > _region_ \ .rela.dtors : { *(.rela.dtors) } > _region_ \ .rel.init : { *(.rel.init) } > _region_ \ .rela.init : { *(.rela.init) } > _region_ \ .rel.fini : { *(.rel.fini) } > _region_ \ .rela.fini : { *(.rela.fini) } > _region_ \ .rel.bss : { *(.rel.bss) } > _region_ \ .rela.bss : { *(.rela.bss) } > _region_ \ .rel.plt : { *(.rel.plt) } > _region_ \ .rela.plt : { *(.rela.plt) } > _region_ \ .rel.dyn : { *(.rel.dyn) } > _region_#define SECTION_init(_region_, _vma_, _lma_) \ .init _vma_ : _lma_ \ { \ FORCE_OUTPUT; KEEP (*(.init)) \ } > _region_ =0#define SECTION_text(_region_, _vma_, _lma_) \ .text _vma_ : _lma_ \ { \ _stext = .; _ftext = . ; \ *(.text) \ *(.text.*) \ *(.stub) \ *(.gnu.warning) \ *(.gnu.linkonce.t*) \ *(.mips16.fn.*) *(.mips16.call.*) \ } > _region_ =0 \ _etext = .; PROVIDE (etext = .);#define SECTION_fini(_region_, _vma_, _lma_) \ .fini _vma_ : _lma_ \ { \ FORCE_OUTPUT; KEEP (*(.fini)) \ } > _region_ =0#define SECTION_rodata(_region_, _vma_, _lma_) \ .rodata _vma_ : _lma_ \ { \ FORCE_OUTPUT; *(.rodata) *(.rodata.*) *(.gnu.linkonce.r*) \ } > _region_#define SECTION_rodata1(_region_, _vma_, _lma_) \ .rodata1 _vma_ : _lma_ \ { \
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