var_intr.h

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        exception_vector_int CYGNUM_HAL_INTERRUPT_MTU3_TGI3B   , 50  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_MTU3_TGI3C   , 51  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_MTU3_TGI3D   , 52  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_MTU3_TGI3V   , 53  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 54  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 55  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 56  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_MTU4_TGI4A   , 57  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_MTU4_TGI4B   , 58  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_MTU4_TGI4C   , 59  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_MTU4_TGI4D   , 60  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_MTU4_TGI4V   , 61  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 62  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 63  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 64  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_SCI0_ERI0    , 65  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_SCI0_RXI0    , 66  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_SCI0_TXI0    , 67  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_SCI0_TEI0    , 68  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_SCI1_ERI1    , 69  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_SCI1_RXI1    , 70  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_SCI1_TXI1    , 71  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_SCI1_TEI1    , 72  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_AD_ADI0      , 73  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_AD_ADI1      , 74  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 75  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 76  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_DTC_SWDTCE   , 77  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 78  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 79  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 80  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_CMT0_CMI0    , 81  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 82  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 83  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 84  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_CMT1_CMI1    , 85  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 86  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 87  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 88  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_WDT_ITI      , 89  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_BSC_CMI      , 90  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 91  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_VAR_RESERVED , 92  ;    \
        exception_vector_int CYGNUM_HAL_INTERRUPT_BSC_CMI      , 93  ;    \
        .set    vecno, CYGNUM_HAL_INTERRUPT_VAR_RESERVED             ;    \
        .rept   (256-CYGNUM_HAL_INTERRUPT_VAR_RESERVED)              ;    \
        exception_vector_int vecno                                   ;    \
        .set    vecno, vecno+1                                       ;    \
        .endr

// The vector used by the Real time clock
#ifndef CYGNUM_HAL_INTERRUPT_RTC
# define CYGNUM_HAL_INTERRUPT_RTC             CYGNUM_HAL_INTERRUPT_CMT0_CMI0
#endif

#else

# error "No vectors defined for this INTC type"

#endif

//----------------------------------------------------------------------------
// Platform may provide extensions to the interrupt configuration functions
// via these macros. The first macro is put inside the functions's
// switch statements, the last two called as functions.
#ifndef CYGPRI_HAL_INTERRUPT_UPDATE_LEVEL_PLF
# define CYGPRI_HAL_INTERRUPT_UPDATE_LEVEL_PLF(vec, level)
# define CYGPRI_HAL_INTERRUPT_ACKNOWLEDGE_PLF(vec)
# define CYGPRI_HAL_INTERRUPT_CONFIGURE_PLF(vec)
#endif

#ifndef __ASSEMBLER__
//--------------------------------------------------------------------------
// Clock control, using Free-running Timer to match on compare register A

#include <cyg/hal/sh_regs.h>            // register definitions
#include <cyg/hal/hal_io.h>             // io macros
#include <cyg/infra/cyg_ass.h>          // CYG_FAIL

#if defined(CYGARC_SH_MOD_FRT)
#define HAL_CLOCK_VAR_INITIALIZE( _period_ )                                \
    CYG_MACRO_START                                                         \
    register cyg_uint8 _tier_;                                              \
                                                                            \
    /* Disable interrupts while programming the timer */                    \
    HAL_READ_UINT8(CYGARC_REG_TIER, _tier_);                                \
    HAL_WRITE_UINT8(CYGARC_REG_TIER, 0);                                    \
                                                                            \
    /* Clear counter register */                                            \
    HAL_WRITE_UINT8(CYGARC_REG_FRC, 0);                                     \
    /* Set compare A register */                                            \
    HAL_WRITE_UINT8(CYGARC_REG_TOCR, CYGARC_REG_TOCR_OLVLA);                \
    HAL_WRITE_UINT16(CYGARC_REG_OCR, _period_);                             \
                                                                            \
    /* Enable match A counter clear */                                      \
    HAL_WRITE_UINT8(CYGARC_REG_FTCSR, CYGARC_REG_FTCSR_CCLRA);              \
    /* Set interrupt prescaling */                                          \
    HAL_WRITE_UINT8(CYGARC_REG_TCR,                                         \
                     ((8==CYGHWR_HAL_SH_FRT_PRESCALE) ?                     \
                          CYGARC_REG_TCR_CLK_8 :                            \
                      (32==CYGHWR_HAL_SH_FRT_PRESCALE) ?                    \
                          CYGARC_REG_TCR_CLK_32:                            \
                      (128==CYGHWR_HAL_SH_FRT_PRESCALE) ?                   \
                          CYGARC_REG_TCR_CLK_128:CYGARC_REG_TCR_CLK_EXT));  \
                                                                            \
                                                                            \
    CYG_MACRO_END

// HAL_CLOCK_VAR_INITIALIZE is called from hal_variant_init since the
// FRT is also used by the hal_delay_us code.
#define HAL_CLOCK_INITIALIZE( _period_ )                                    \
    CYG_MACRO_START                                                         \
    register cyg_uint8 _tier_;                                              \
                                                                            \
    CYG_ASSERT((cyg_uint16)(_period_) < (cyg_uint16)0xfffe,                 \
               "period too large for 16bit FRT");                           \
                                                                            \
    /* Disable interrupts while programming the timer */                    \
    HAL_READ_UINT8(CYGARC_REG_TIER, _tier_);                                \
    HAL_WRITE_UINT8(CYGARC_REG_TIER, 0);                                    \
                                                                            \
    /* Set compare A register */                                            \
    HAL_WRITE_UINT8(CYGARC_REG_TOCR, CYGARC_REG_TOCR_OLVLA);                \
    HAL_WRITE_UINT16(CYGARC_REG_OCR, _period_);                             \
                                                                            \
    /* Enable interrupt */                                                  \
    _tier_ |= CYGARC_REG_TIER_OCIAE;                                        \
    HAL_WRITE_UINT8(CYGARC_REG_TIER, _tier_);                               \
                                                                            \
    CYG_MACRO_END

#define HAL_CLOCK_RESET( _vector_, _period_ )   \
    CYG_MACRO_START                             \
    register cyg_uint8 _ftcsr_;                 \
                                                \
    /* Clear match flag */                      \
    HAL_READ_UINT8(CYGARC_REG_FTCSR, _ftcsr_);  \
    _ftcsr_ &= ~CYGARC_REG_FTCSR_OCFA;          \
    HAL_WRITE_UINT8(CYGARC_REG_FTCSR, _ftcsr_); \
                                                \
    CYG_MACRO_END

#define HAL_CLOCK_READ( _pvalue_ )              \
    CYG_MACRO_START                             \
    register cyg_uint16 _frc_;                  \
                                                \
    HAL_READ_UINT16(CYGARC_REG_FRC, _frc_);     \
                                                \
    *(_pvalue_) = _frc_;                        \
    CYG_MACRO_END

#elif defined(CYGARC_SH_MOD_CMT)

/* Compare Match Timer 0 is used for the eCos kernel RTC */
#define HAL_CLOCK_VAR_INITIALIZE( _period_ )                                \
    CYG_MACRO_START                                                         \
    register cyg_uint16 _tmp_;                                              \
                                                                            \
    /* Disable timer while programming it */                                \
    HAL_READ_UINT16(CYGARC_REG_CMSTR, _tmp_);                               \
    HAL_WRITE_UINT16(CYGARC_REG_CMSTR, _tmp_ & ~CYGARC_REG_CMSTR_STR0);     \
                                                                            \
    /* Clear counter register */                                            \
    HAL_WRITE_UINT16(CYGARC_REG_CMCNT0, 0);                                 \
    /* Set compare 0 register */                                            \
    HAL_WRITE_UINT16(CYGARC_REG_CMCOR0, _period_);                          \
                                                                            \
    /* Set prescaling and disable interrupts */                             \
    HAL_WRITE_UINT16(CYGARC_REG_CMCSR0,                                     \
                     ((8==CYGHWR_HAL_SH_CMT_PRESCALE) ?                     \
                          CYGARC_REG_CMCSR_CLK_8 :                          \
                      (32==CYGHWR_HAL_SH_CMT_PRESCALE) ?                    \
                          CYGARC_REG_CMCSR_CLK_32:                          \
                      (128==CYGHWR_HAL_SH_CMT_PRESCALE) ?                   \
                          CYGARC_REG_CMCSR_CLK_128:CYGARC_REG_CMCSR_CLK_512));  \
                                                                            \
    /* Start timer */                                                       \
    HAL_WRITE_UINT16(CYGARC_REG_CMSTR, _tmp_ | CYGARC_REG_CMSTR_STR0);      \
                                                                            \
    CYG_MACRO_END

// HAL_CLOCK_VAR_INITIALIZE is called from hal_variant_init since the
// CMT0 is also used by the hal_delay_us code.
#define HAL_CLOCK_INITIALIZE( _period_ )                                    \
    CYG_MACRO_START                                                         \
    register cyg_uint16 _tmp_;                                              \
                                                                            \
    CYG_ASSERT((cyg_uint16)(_period_) < (cyg_uint16)0xfffe,                 \
               "period too large for 16bit CMT");                           \
                                                                            \
    /* Disable timer while programming it */                                \
    HAL_READ_UINT16(CYGARC_REG_CMSTR, _tmp_);                               \
    HAL_WRITE_UINT16(CYGARC_REG_CMSTR, _tmp_ & ~CYGARC_REG_CMSTR_STR0);     \
                                                                            \
    /* Clear counter register */                                            \
    HAL_WRITE_UINT16(CYGARC_REG_CMCNT0, 0);                                 \
    /* Set compare 0 register */                                            \
    HAL_WRITE_UINT16(CYGARC_REG_CMCOR0, _period_);                          \
                                                                            \
    /* Set prescaling and enable interrupts */                              \
    HAL_WRITE_UINT16(CYGARC_REG_CMCSR0, CYGARC_REG_CMCSR_CMIE |             \
                     ((8==CYGHWR_HAL_SH_CMT_PRESCALE) ?                     \
                          CYGARC_REG_CMCSR_CLK_8 :                          \
                      (32==CYGHWR_HAL_SH_CMT_PRESCALE) ?                    \
                          CYGARC_REG_CMCSR_CLK_32:                          \
                      (128==CYGHWR_HAL_SH_CMT_PRESCALE) ?                   \
                          CYGARC_REG_CMCSR_CLK_128:CYGARC_REG_CMCSR_CLK_512));  \
                                                                            \
    /* Start timer */                                                       \
    HAL_WRITE_UINT16(CYGARC_REG_CMSTR, _tmp_ | CYGARC_REG_CMSTR_STR0);      \
                                                                            \
    CYG_MACRO_END

#define HAL_CLOCK_RESET( _vector_, _period_ )   \
    CYG_MACRO_START                             \
    register cyg_uint16 _tmp_;                  \
                                                \
    /* Clear match flag */                      \
    HAL_READ_UINT16(CYGARC_REG_CMCSR0, _tmp_);  \
    _tmp_ &= ~CYGARC_REG_CMCSR_CMF;             \
    HAL_WRITE_UINT16(CYGARC_REG_CMCSR0, _tmp_); \
                                                \
    CYG_MACRO_END

#define HAL_CLOCK_READ( _pvalue_ )              \
    CYG_MACRO_START                             \
    register cyg_uint16 _tmp_;                  \
                                                \
    HAL_READ_UINT16(CYGARC_REG_CMCNT0, _tmp_);  \
                                                \
    *(_pvalue_) = _tmp_;                        \
    CYG_MACRO_END



#else
# error "No RTC handling defined"
#endif



#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY
#define HAL_CLOCK_LATENCY( _pvalue_ ) HAL_CLOCK_READ(_pvalue_)
#endif


//----------------------------------------------------------------------------
// Reset.
#ifndef HAL_PLATFORM_RESET
#define HAL_PLATFORM_RESET()                                                                    \
 CYG_MACRO_START                                                                                \
 HAL_WRITE_UINT16(CYGARC_REG_RSTCSR_W, CYGARC_REG_RSTCSR_W_RSTx_MAGIC|CYGARC_REG_RSTCSR_RSTE);  \
 HAL_WRITE_UINT16(CYGARC_REG_WTCNT_W, CYGARC_REG_WTCNT_W_MAGIC|0xfe);                           \
 HAL_WRITE_UINT16(CYGARC_REG_WTCSR_W, CYGARC_REG_WTCSR_W_MAGIC|CYGARC_REG_WTCSR_TME|CYGARC_REG_WTCSR_WTIT);           \
 /* wait for it */                                                                              \
 for(;;) ;                                                                                      \
 CYG_MACRO_END
#else
#define HAL_PLATFORM_RESET()
#endif

#endif // __ASSEMBLER__

//--------------------------------------------------------------------------
#endif // ifndef CYGONCE_VAR_INTR_H
// End of var_intr.h