saa9730.h

来自「eCos操作系统源码」· C头文件 代码 · 共 365 行 · 第 1/2 页

#ifndef CYGONCE_DEVS_ETH_MIPS_ATLAS_SAA9730_H
#define CYGONCE_DEVS_ETH_MIPS_ATLAS_SAA9730_H
/*==========================================================================
//
//      saa9730.h
//      Philips SAA9730 IO Chip Ethernet Interface
//
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
// Copyright (C) 2003 Nick Garnett <[e-mail]>
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting the copyright
// holders.
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):     msalter
// Contributors:  msalter, nickg
// Date:          2000-12-09
// Description:   Definitions for Philips SAA9730 Ethernet module.
//
//####DESCRIPTIONEND####
*/

// QS6612 PHY definitions 

#define PHY_CONTROL                     0
#define PHY_STATUS                      1
#define PHY_REG31                       31

#define PHY_CONTROL_RESET               (1 << 15)
#define PHY_CONTROL_AUTO_NEG            (1 << 12)
#define PHY_CONTROL_RESTART_AUTO_NEG    (1 <<  9)

#define PHY_STATUS_LINK_UP              (1 << 2)

#define PHY_REG31_OPMODE_SHIFT           2
#define PHY_REG31_OPMODE_MSK             (7 << PHY_REG31_OPMODE_SHIFT)

#define OPMODE_AUTONEGOTIATE             0
#define OPMODE_10BASET_HALFDUPLEX        1
#define OPMODE_100BASEX_HALFDUPLEX       2
#define OPMODE_REPEATER_MODE             3
#define OPMODE_UNDEFINED                 4
#define OPMODE_10BASET_FULLDUPLEX        5
#define OPMODE_100BASEX_FULLDUPLEX       6
#define OPMODE_ISOLATE                   7

#define QS6612_PHY_ADDRESS              0
#define PHY_ADDRESS                     QS6612_PHY_ADDRESS

// Number of 6-byte entries in the CAM
#define SAA9730_CAM_ENTRIES                       10

// TX and RX packet size fixed at 2k bytes by hw
#define SAA9730_PACKET_SIZE   2048

// Number of TX buffers = number of RX buffers = 2,
// which is fixed according to HW requirements
#define SAA9730_BUFFERS                           2

// Number of RX packets per RX buffer
#define SAA9730_RXPKTS_PER_BUFFER                2

// Number of TX packets per TX buffer
#define SAA9730_TXPKTS_PER_BUFFER                1

// Minimum packet size
#define SAA9730_MIN_PACKET_SIZE                   60

// owner ship bit
#define SAA9730_BLOCK_OWNED_BY_SYSTEM             0
#define SAA9730_BLOCK_OWNED_BY_HARDWARE           1

// Default Rcv interrupt count
#define SAA9730_DEFAULT_RCV_INTERRUPT_CNT         4

// Default maxium transmit retry
#define SAA9730_DEFAULT_MAX_TXM_RETRY	      16

// Default time out value
#define SAA9730_DEFAULT_TIME_OUT_CNT              200

// MAX map registers
#define SAA9730__MAX_MAP_REGISTERS		      64

// Defines used by Interrupt code
#define  SAA9730_DMA_PACKET_SIZE                  2048
#define  SAA9730_VALID_PACKET                     0xC0000000
#define  SAA9730_FRAME_TYPELEN_OFFSET             12
#define  SAA9730_ETH_MIN_FRAME_SIZE               60
#define  SAA9730_DEST_ADDR_SIZE                   6
#define  SAA9730_SRC_ADDR_SIZE                    6
#define  SAA9730_TYPE_LEN_SIZE                    2

// MAC receive error
#define  SAA9730_MAC_GOOD_RX                      (0x00004000) << 11
#define  SAA9730_MAC_RCV_ALIGN_ERROR              (0x00000100) << 11
#define  SAA9730_MAC_RCV_CRC_ERROR                (0x00000200) << 11
#define  SAA9730_MAC_RCV_OVERFLOW                 (0x00000400) << 11

// This number is arbitrary and can be increased if needed
#define SAA9730_MAX_MULTICAST_ADDRESSES           20 

// SAA9730 Event Manager Registers
#define SAA9730_EVM_ISR         *((volatile unsigned *)(__base + 0x02000))
#define SAA9730_EVM_IER         *((volatile unsigned *)(__base + 0x02004))
#define SAA9730_EVM_IMR         *((volatile unsigned *)(__base + 0x02008))

#define SAA9730_EVM_IER_SW      *((volatile unsigned *)(__base + 0x0202c))

#define SAA9730_EVM_LAN_INT     (1<<16)         // LAN interrupt bit
#define SAA9730_EVM_MASTER      (1<<0)          // Master interrupt bit

//  SAA9730 LAN Registers
#define SAA9730_TXBUFA          *((volatile unsigned *)(__base + 0x20400)) // TX buffer A

#define SAA9730_TXBUFB          *((volatile unsigned *)(__base + 0x20404)) // TX buffer B

#define SAA9730_RXBUFA          *((volatile unsigned *)(__base + 0x20408)) // RX buffer A

#define SAA9730_RXBUFB          *((volatile unsigned *)(__base + 0x2040C)) // RX buffer B

#define SAA9730_PKTCNT          *((volatile unsigned *)(__base + 0x20410)) // Packet count

#define SAA9730_OK2USE          *((volatile unsigned *)(__base + 0x20414)) // OK-to-use
#  define SAA9730_OK2USE_TXA  8 	   
#  define SAA9730_OK2USE_TXB  4 	   
#  define SAA9730_OK2USE_RXA  2 	   
#  define SAA9730_OK2USE_RXB  1 	   

#define SAA9730_DMACTL          *((volatile unsigned *)(__base + 0x20418)) // DMA control
#  define SAA9730_DMACTL_BLKINT           (1 << 31)
#  define SAA9730_DMACTL_MAXXFER_ANY      (0 << 18)
#  define SAA9730_DMACTL_MAXXFER_8        (1 << 18)
#  define SAA9730_DMACTL_MAXXFER_32       (2 << 18)
#  define SAA9730_DMACTL_MAXXFER_64       (3 << 18)
#  define SAA9730_DMACTL_ENDIAN_LITTLE    (0 << 16)
#  define SAA9730_DMACTL_ENDIAN_2143      (1 << 16)
#  define SAA9730_DMACTL_ENDIAN_4321      (2 << 16)
#  define SAA9730_DMACTL_RXINTCNT_SHIFT   8
#  define SAA9730_DMACTL_RXINTCNT_MSK     (0xff << SAA9730_DMACTL_RXINTCNT_SHIFT)
#  define SAA9730_DMACTL_ENTX             (1 << 7)
#  define SAA9730_DMACTL_ENRX             (1 << 6)
#  define SAA9730_DMACTL_RXFULL           (1 << 5)
#  define SAA9730_DMACTL_RXTOINT          (1 << 4)
#  define SAA9730_DMACTL_RXINT            (1 << 3)
#  define SAA9730_DMACTL_TXINT            (1 << 2)
#  define SAA9730_DMACTL_MACTXINT         (1 << 1)
#  define SAA9730_DMACTL_MACRXINT         (1 << 0)

#define SAA9730_TIMOUT          *((volatile unsigned *)(__base + 0x2041C)) // Time out

#define SAA9730_DMASTA          *((volatile unsigned *)(__base + 0x20420)) // DMA status