dac.fnsim.qmsg

DDS知识解析

{ "Info" "ISGN_MEGAFN_DESCENDANT" "COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[1\]\|a_csnbuffer:result_node COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component " "Info: Elaborated megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[1\]\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\"" {  } { { "addcore.tdf" "" { Text "f:/altera/81/quartus/libraries/megafunctions/addcore.tdf" 123 6 0 } } { "COUNTER.v" "" { Text "G:/FPGA/DAC0802/DAC/COUNTER.v" 66 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "addcore COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\] " "Info: Elaborating entity \"addcore\" for hierarchy \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\"" {  } { { "lpm_add_sub.tdf" "adder1\[0\]" { Text "f:/altera/81/quartus/libraries/megafunctions/lpm_add_sub.tdf" 242 11 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\] COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component " "Info: Elaborated megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\", which is child of megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\"" {  } { { "lpm_add_sub.tdf" "" { Text "f:/altera/81/quartus/libraries/megafunctions/lpm_add_sub.tdf" 242 11 0 } } { "COUNTER.v" "" { Text "G:/FPGA/DAC0802/DAC/COUNTER.v" 66 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "a_csnbuffer COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:oflow_node " "Info: Elaborating entity \"a_csnbuffer\" for hierarchy \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:oflow_node\"" {  } { { "addcore.tdf" "oflow_node" { Text "f:/altera/81/quartus/libraries/megafunctions/addcore.tdf" 97 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:oflow_node COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component " "Info: Elaborated megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\"" {  } { { "addcore.tdf" "" { Text "f:/altera/81/quartus/libraries/megafunctions/addcore.tdf" 97 2 0 } } { "COUNTER.v" "" { Text "G:/FPGA/DAC0802/DAC/COUNTER.v" 66 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "a_csnbuffer COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:result_node " "Info: Elaborating entity \"a_csnbuffer\" for hierarchy \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:result_node\"" {  } { { "addcore.tdf" "result_node" { Text "f:/altera/81/quartus/libraries/megafunctions/addcore.tdf" 123 6 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:result_node COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component " "Info: Elaborated megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\"" {  } { { "addcore.tdf" "" { Text "f:/altera/81/quartus/libraries/megafunctions/addcore.tdf" 123 6 0 } } { "COUNTER.v" "" { Text "G:/FPGA/DAC0802/DAC/COUNTER.v" 66 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "addcore COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1_0\[1\] " "Info: Elaborating entity \"addcore\" for hierarchy \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1_0\[1\]\"" {  } { { "lpm_add_sub.tdf" "adder1_0\[1\]" { Text "f:/altera/81/quartus/libraries/megafunctions/lpm_add_sub.tdf" 247 14 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1_0\[1\] COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component " "Info: Elaborated megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1_0\[1\]\", which is child of megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\"" {  } { { "lpm_add_sub.tdf" "" { Text "f:/altera/81/quartus/libraries/megafunctions/lpm_add_sub.tdf" 247 14 0 } } { "COUNTER.v" "" { Text "G:/FPGA/DAC0802/DAC/COUNTER.v" 66 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "bypassff COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|bypassff:datab1_ff\[1\]\[1\] " "Info: Elaborating entity \"bypassff\" for hierarchy \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|bypassff:datab1_ff\[1\]\[1\]\"" {  } { { "lpm_add_sub.tdf" "datab1_ff\[1\]\[1\]" { Text "f:/altera/81/quartus/libraries/megafunctions/lpm_add_sub.tdf" 253 13 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|bypassff:datab1_ff\[1\]\[1\] COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component " "Info: Elaborated megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|bypassff:datab1_ff\[1\]\[1\]\", which is child of megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\"" {  } { { "lpm_add_sub.tdf" "" { Text "f:/altera/81/quartus/libraries/megafunctions/lpm_add_sub.tdf" 253 13 0 } } { "COUNTER.v" "" { Text "G:/FPGA/DAC0802/DAC/COUNTER.v" 66 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "bypassff COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|bypassff:datab1_ff\[0\]\[1\] " "Info: Elaborating entity \"bypassff\" for hierarchy \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|bypassff:datab1_ff\[0\]\[1\]\"" {  } { { "lpm_add_sub.tdf" "datab1_ff\[0\]\[1\]" { Text "f:/altera/81/quartus/libraries/megafunctions/lpm_add_sub.tdf" 253 13 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|bypassff:datab1_ff\[0\]\[1\] COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component " "Info: Elaborated megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|bypassff:datab1_ff\[0\]\[1\]\", which is child of megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\"" {  } { { "lpm_add_sub.tdf" "" { Text "f:/altera/81/quartus/libraries/megafunctions/lpm_add_sub.tdf" 253 13 0 } } { "COUNTER.v" "" { Text "G:/FPGA/DAC0802/DAC/COUNTER.v" 66 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altshift COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|altshift:result_ext_latency_ffs " "Info: Elaborating entity \"altshift\" for hierarchy \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|altshift:result_ext_latency_ffs\"" {  } { { "lpm_add_sub.tdf" "result_ext_latency_ffs" { Text "f:/altera/81/quartus/libraries/megafunctions/lpm_add_sub.tdf" 286 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|altshift:result_ext_latency_ffs COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component " "Info: Elaborated megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|altshift:result_ext_latency_ffs\", which is child of megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\"" {  } { { "lpm_add_sub.tdf" "" { Text "f:/altera/81/quartus/libraries/megafunctions/lpm_add_sub.tdf" 286 2 0 } } { "COUNTER.v" "" { Text "G:/FPGA/DAC0802/DAC/COUNTER.v" 66 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altshift COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|altshift:carry_ext_latency_ffs " "Info: Elaborating entity \"altshift\" for hierarchy \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|altshift:carry_ext_latency_ffs\"" {  } { { "lpm_add_sub.tdf" "carry_ext_latency_ffs" { Text "f:/altera/81/quartus/libraries/megafunctions/lpm_add_sub.tdf" 288 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|altshift:carry_ext_latency_ffs COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component " "Info: Elaborated megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\|altshift:carry_ext_latency_ffs\", which is child of megafunction instantiation \"COUNTER:inst4\|lpm_add_sub:lpm_add_sub_component\"" {  } { { "lpm_add_sub.tdf" "" { Text "f:/altera/81/quartus/libraries/megafunctions/lpm_add_sub.tdf" 288 2 0 } } { "COUNTER.v" "" { Text "G:/FPGA/DAC0802/DAC/COUNTER.v" 66 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ILPMS_INFERENCING_SUMMARY" "1 " "Info: Inferred 1 megafunctions from design logic" { { "Info" "ILPMS_LPM_ADD_SUB_INFERRED" "clk_div:inst\|Add0 lpm_add_sub " "Info: Inferred adder/subtractor megafunction (\"lpm_add_sub\") from the following logic: \"clk_div:inst\|Add0\"" {  } { { "clk_div.v" "Add0" { Text "G:/FPGA/DAC0802/DAC/clk_div.v" 26 -1 0 } }  } 0 0 "Inferred adder/subtractor megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0 0}  } {  } 0 0 "Inferred %1!llu! megafunctions from design logic" 0 0 "" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "clk_div:inst\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"clk_div:inst\|lpm_add_sub:Add0\"" {  } { { "clk_div.v" "" { Text "G:/FPGA/DAC0802/DAC/clk_div.v" 26 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "clk_div:inst\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"clk_div:inst\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 12 " "Info: Parameter \"LPM_WIDTH\" = \"12\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0}  } { { "clk_div.v" "" { Text "G:/FPGA/DAC0802/DAC/clk_div.v" 26 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "clk_div:inst\|lpm_add_sub:Add0\|addcore:adder clk_div:inst\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"clk_div:inst\|lpm_add_sub:Add0\|addcore:adder\", which is child of megafunction instantiation \"clk_div:inst\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "f:/altera/81/quartus/libraries/megafunctions/lpm_add_sub.tdf" 268 4 0 } } { "clk_div.v" "" { Text "G:/FPGA/DAC0802/DAC/clk_div.v" 26 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "clk_div:inst\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node clk_div:inst\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"clk_div:inst\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"clk_div:inst\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "f:/altera/81/quartus/libraries/megafunctions/addcore.tdf" 97 2 0 } } { "clk_div.v" "" { Text "G:/FPGA/DAC0802/DAC/clk_div.v" 26 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "clk_div:inst\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node clk_div:inst\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"clk_div:inst\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"clk_div:inst\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "f:/altera/81/quartus/libraries/megafunctions/addcore.tdf" 123 6 0 } } { "clk_div.v" "" { Text "G:/FPGA/DAC0802/DAC/clk_div.v" 26 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "clk_div:inst\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs clk_div:inst\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"clk_div:inst\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs\", which is child of megafunction instantiation \"clk_div:inst\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "f:/altera/81/quartus/libraries/megafunctions/lpm_add_sub.tdf" 286 2 0 } } { "clk_div.v" "" { Text "G:/FPGA/DAC0802/DAC/clk_div.v" 26 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "clk_div:inst\|lpm_add_sub:Add0\|altshift:carry_ext_latency_ffs clk_div:inst\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"clk_div:inst\|lpm_add_sub:Add0\|altshift:carry_ext_latency_ffs\", which is child of megafunction instantiation \"clk_div:inst\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "f:/altera/81/quartus/libraries/megafunctions/lpm_add_sub.tdf" 288 2 0 } } { "clk_div.v" "" { Text "G:/FPGA/DAC0802/DAC/clk_div.v" 26 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Functional Simulation Netlist Generation 0 s 1  Quartus II " "Info: Quartus II Functional Simulation Netlist Generation was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "164 " "Info: Peak virtual memory: 164 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Mon Aug 03 11:48:29 2009 " "Info: Processing ended: Mon Aug 03 11:48:29 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:03 " "Info: Total CPU time (on all processors): 00:00:03" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}