mux_ncb.tdf

采用DDS技术的波形发生器(FPGA实现)

--lpm_mux CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone" LPM_SIZE=4 LPM_WIDTH=58 LPM_WIDTHS=2 data result sel
--VERSION_BEGIN 6.0 cbx_lpm_mux 2006:01:09:11:16:16:SJ cbx_mgl 2006:04:14:11:14:36:SJ  VERSION_END


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--  without limitation, that your use is for the sole purpose of 
--  programming logic devices manufactured by Altera and sold by 
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--  applicable agreement for further details.



--synthesis_resources = lut 116 
SUBDESIGN mux_ncb
( 
	data[231..0]	:	input;
	result[57..0]	:	output;
	sel[1..0]	:	input;
) 
VARIABLE 
	result_node[57..0]	: WIRE;
	sel_node[1..0]	: WIRE;
	w_data1940w[3..0]	: WIRE;
	w_data1970w[3..0]	: WIRE;
	w_data1995w[3..0]	: WIRE;
	w_data2020w[3..0]	: WIRE;
	w_data2045w[3..0]	: WIRE;
	w_data2070w[3..0]	: WIRE;
	w_data2095w[3..0]	: WIRE;
	w_data2120w[3..0]	: WIRE;
	w_data2145w[3..0]	: WIRE;
	w_data2170w[3..0]	: WIRE;
	w_data2195w[3..0]	: WIRE;
	w_data2220w[3..0]	: WIRE;
	w_data2245w[3..0]	: WIRE;
	w_data2270w[3..0]	: WIRE;
	w_data2295w[3..0]	: WIRE;
	w_data2320w[3..0]	: WIRE;
	w_data2345w[3..0]	: WIRE;
	w_data2370w[3..0]	: WIRE;
	w_data2395w[3..0]	: WIRE;
	w_data2420w[3..0]	: WIRE;
	w_data2445w[3..0]	: WIRE;
	w_data2470w[3..0]	: WIRE;
	w_data2495w[3..0]	: WIRE;
	w_data2520w[3..0]	: WIRE;
	w_data2545w[3..0]	: WIRE;
	w_data2570w[3..0]	: WIRE;
	w_data2595w[3..0]	: WIRE;
	w_data2620w[3..0]	: WIRE;
	w_data2645w[3..0]	: WIRE;
	w_data2670w[3..0]	: WIRE;
	w_data2695w[3..0]	: WIRE;
	w_data2720w[3..0]	: WIRE;
	w_data2745w[3..0]	: WIRE;
	w_data2770w[3..0]	: WIRE;
	w_data2795w[3..0]	: WIRE;
	w_data2820w[3..0]	: WIRE;
	w_data2845w[3..0]	: WIRE;
	w_data2870w[3..0]	: WIRE;
	w_data2895w[3..0]	: WIRE;
	w_data2920w[3..0]	: WIRE;
	w_data2945w[3..0]	: WIRE;
	w_data2970w[3..0]	: WIRE;
	w_data2995w[3..0]	: WIRE;
	w_data3020w[3..0]	: WIRE;
	w_data3045w[3..0]	: WIRE;
	w_data3070w[3..0]	: WIRE;
	w_data3095w[3..0]	: WIRE;
	w_data3120w[3..0]	: WIRE;
	w_data3145w[3..0]	: WIRE;
	w_data3170w[3..0]	: WIRE;
	w_data3195w[3..0]	: WIRE;
	w_data3220w[3..0]	: WIRE;
	w_data3245w[3..0]	: WIRE;
	w_data3270w[3..0]	: WIRE;
	w_data3295w[3..0]	: WIRE;
	w_data3320w[3..0]	: WIRE;
	w_data3345w[3..0]	: WIRE;
	w_data3370w[3..0]	: WIRE;
	w_result1952w	: WIRE;
	w_result1982w	: WIRE;
	w_result2007w	: WIRE;
	w_result2032w	: WIRE;
	w_result2057w	: WIRE;
	w_result2082w	: WIRE;
	w_result2107w	: WIRE;
	w_result2132w	: WIRE;
	w_result2157w	: WIRE;
	w_result2182w	: WIRE;
	w_result2207w	: WIRE;
	w_result2232w	: WIRE;
	w_result2257w	: WIRE;
	w_result2282w	: WIRE;
	w_result2307w	: WIRE;
	w_result2332w	: WIRE;
	w_result2357w	: WIRE;
	w_result2382w	: WIRE;
	w_result2407w	: WIRE;
	w_result2432w	: WIRE;
	w_result2457w	: WIRE;
	w_result2482w	: WIRE;
	w_result2507w	: WIRE;
	w_result2532w	: WIRE;
	w_result2557w	: WIRE;
	w_result2582w	: WIRE;
	w_result2607w	: WIRE;
	w_result2632w	: WIRE;
	w_result2657w	: WIRE;
	w_result2682w	: WIRE;
	w_result2707w	: WIRE;
	w_result2732w	: WIRE;
	w_result2757w	: WIRE;
	w_result2782w	: WIRE;
	w_result2807w	: WIRE;
	w_result2832w	: WIRE;
	w_result2857w	: WIRE;
	w_result2882w	: WIRE;
	w_result2907w	: WIRE;
	w_result2932w	: WIRE;
	w_result2957w	: WIRE;
	w_result2982w	: WIRE;
	w_result3007w	: WIRE;
	w_result3032w	: WIRE;
	w_result3057w	: WIRE;
	w_result3082w	: WIRE;
	w_result3107w	: WIRE;