相对码到绝对码的转换.txt

psk to DPSK conversion (absolute phase shift keying to the relative phase shift keying conversion)

library ieee;
use ieee.std_logic_arith.all;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity PL_DPSK2 is
port(clk    :in std_logic;          --系统时钟
 start  :in std_logic;         --开始转换信号
     x    :in std_logic;       --相对码输入信号
     y    :out std_logic);     --绝对码输出信号
end PL_DPSK2;
architecture behav of PL_DPSK2 is
signal q:integer range 0 to 3;    --分频
signal xx:std_logic;              --寄存相对码
begin
process(clk,x)       --此进程完成相对码到绝对码的转换
begin
if clk'event and clk='1' then 
   if start='0' then q<=0;
   elsif q=0 then q<=1;
   elsif q=3 then q<=0; y<=xx xor x; xx<=x;  
                         --输入信号x与前一输入信号xx进行异或
   else q<=q+1;
   end if;
end if;
end process;
end behav;