temp.h

凌阳SPCE3200多媒体开发板自带源程序。共安排了32个子目录

#define TVINTL			0x0001
#define TVPAL			0x0002
#define TVVGA			0x0004
#define TVLPF0			0x0000
#define TVLPF1			0x0010
#define TVLPF2			0x0020
#define TVLPF3			0x0030
#define TVRGB2YUV		0x0100
#define TVEN			0x1000
#define Y4U4V4			0x0800

#define C2PEN			0x0001
#define DOUBLEBUF		0x0000
#define TRIPLEBUF		0x0002
#define CSI2PPU			0x0000
#define CSI2JPG			0x0004
#define CSI2TVE			0x0008
#define CSI2LCD			0x000C

#define CSI_SOFT		0x0000
#define CSI_HARD		0x0001
#define PPUT1_SOFT		0x0000
#define PPU_P2T_EN		0x0001
#define PPUT1_HARD		0x0002
#define PPUT2_SOFT		0x0000
#define PPUT2_HARD		0x0004
#define PPUT3_SOFT		0x0000
#define PPUT3_HARD		0x0008

#define PPU_SOFT		0x0000
#define PPU_P2T_HARD	0x0010
#define PPU_P2L_HARD	0x0020
#define PPU_P2L_HW4		0x0030

#define TVE_SOFT		0x0000
#define TVE_C2P_HARD	0x0040
#define TVE_P2T_HARD	0x0080
#define TVE_P2T_HW4		0x00C0

#define LCD_SOFT		0x0000
#define LCD_C2P_HARD	0x0100
#define LCD_P2L_HARD	0x0200
#define LCD_P2L_HW4		0x0300

//The following are called by os_isr.s (add by xydeng)
//specification define
 #define LINK_REG r3
 #define BASE_REG r2
 #define CNT_REG sr0
 #define LCR_REG sr1
 #define SCR_REG sr2

//New Instruction define
 #define pflush 0x8000800A

 #define sleep 0x980080c4
 #define cache_5 0xe2808000

//data memory address define
 #define GOLDEN_PTR 0x00002400
 #define DATA_PTR 0x00002000
 #define DATA_PTR1 0x00002200
 #define DATA_STACK_PTR1 0x00013000
 #define DATA_STACK_PTR2 0x00013004
 #define DATA_STACK_START1 0x00014000
 #define DATA_STACK_START2 0x00015000
 #define DATA_OFFSET 0x200

//IRQ define
 #define INT_MASK0  0x9c082800
 #define INT_MASK1  0x9c082804
 #define INT_CTL0   0x9c082808
 #define INT_CTL1   0x9c08280c

// MemCtrl define
 #define SDC_CFG0   0x9c010000


// Exception processing define
 #define k0 r30
 #define k1 r31
 #define EXCP_STACK 0x80004000
 #define RE_EXCP_STACK 0x80003000
 #define EXCP_STACK_PTR 0x80003000
 #define EXCP_STACK_START 0x80004000
 #define EXCP_CAUSE_OFFSET 0x8c
 #define FTLB_EXCP 0xfe
 #define NORM_DEBUG_EXCP 0xfd
 #define GENERAL_EXCP 0xfc
 #define HW_INT 0xfb
 #define DEBUG_EXCP 0xfa
 #define NORM_PREV  0x800000

// Cache Insturciton OP define
 #define IC_FETCH_LINE 			0x0
 #define IC_FETCH_LOCK_LINE 0x1
 #define IC_INVALID_LINE 		0x2
 #define IC_INVALID_ENTIRE 	0x10
 #define IC_LIM_FILL 				0x3
 #define DC_LDM_FILE 				0x0
 #define DC_FETCH_LINE 			0x8
 #define DC_FETCH_LOCK_LINE 0x9
 #define DC_INVALID_LINE 		0xA
 #define DC_INVALID_ENTIRE 	0x18
 #define DC_LDM_FILL 				0xB
 #define DC_LDM_WBACK 			0xC
 #define DC_DRAIN_WB 				0x1A
 #define DC_ENABLE_WB 			0x1B
 #define DC_DISABLE_WB 			0x1C

 #define PROFILE_COPROCESSOR

// syscall code
 #define CALL_FAIL        0xfff
 #define CALL_PASS        0xabc
 #define CALL_SEQ         0xeee
 #define CALL_END           257
 #define EXCP_RE_FLAG     0x80005000
 #define INT_GEN_ADDR     0x20000000
 #define INT_GEN_VPN      0x20000000
 #define INT_GEN_PFN      0x40000000
 

#define SR_IMASK         0x00ff0000
#define SR_IEC           0x1


// general registers symbolic
#define    SP        r0
#define    AT        r1
#define    BP        r2
#define    LR        r3
#define    A0        r4
#define    A1        r5
#define    A2        r6
#define    A3        r7
#define    T0        r8
#define    T1        r9
#define    T2        r10
#define    T3        r11
#define    S0        r12
#define    S1        r13
#define    S2        r14
#define    S3        r15
#define    S4        r16
#define    S5        r17
#define    S6        r18
#define    S7        r19
#define    S8        r20
#define    S9        r21
#define    T4        r22
#define    T5        r23
#define    T6        r24
#define    T7        r25
#define    T8        r26
#define    T9        r27
#define    R28       r28
#define    JP        r29
#define    K0        r30
#define    K1        r31

// CP0 register define
#define CP0_STATUS   cr0
#define CP0_COND     cr1
#define CP0_CAUSE    cr2
#define CP0_EXCPVEC  cr3
#define CP0_CCR      cr4
#define CP0_EPC      cr5
#define CP0_BADVA    cr6
#define CP0_WIRE     cr7
#define CP0_INDEX    cr8
#define CP0_CONTEXT  cr9
#define CP0_RANDOM   cr10
#define CP0_ENTRYHI  cr11
#define CP0_ENTRYLO  cr12
#define CP0_FMARLO   cr13
#define CP0_FMARHI   cr14
#define CP0_FMCR     cr15
#define CP0_FFMR     cr16
#define CP0_LLADDR   cr17
#define CP0_PREV     cr18
#define CP0_DREG     cr29
#define CP0_DEPC     cr30
#define CP0_DSAVE    cr31
#define SPR_HI	     sr1    		
#define SPR_LO	     sr2    		

#define    STACK_SIZE   32


/* uC/OS-specific stuff from here on.. */
#define E_SP            0*4
#define E_AT            1*4
#define E_BP            2*4
#define E_LR            3*4
#define E_A0            4*4
#define E_A1            5*4
#define E_A2            6*4
#define E_A3            7*4
#define E_T0            8*4
#define E_T1            9*4
#define E_T2            10*4
#define E_T3            11*4
#define E_S0            12*4
#define E_S1            13*4
#define E_S2            14*4
#define E_S3            15*4
#define E_S4            16*4
#define E_S5            17*4
#define E_S6            18*4
#define E_S7            19*4
#define E_S8            20*4
#define E_S9            21*4
#define E_T4            22*4
#define E_T5            23*4
#define E_T6            24*4
#define E_T7            25*4
#define E_T8            26*4
#define E_T9            27*4
#define E_R28           28*4
#define E_JP            29*4
#define E_K0            30*4
#define E_K1            31*4

#define E_CP0_STATUS    32*4
#define E_CP0_COND      33*4
#define E_CP0_CAUSE     34*4
#define E_CP0_EPC       35*4
#define E_SPR_HI        36*4
#define E_SPR_LO        37*4

#define E_SIZE          38*4 /* must be even */