📄 sys_register.h
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#define P_USBH_SoftRST (UV32*)(USBHOSTBASE+0x00000044)
#define P_USBH_SOFTimer (UV32*)(USBHOSTBASE+0x00000048)
#define P_USBH_FrameNum (UV32*)(USBHOSTBASE+0x0000004C)
#define P_USBH_OTGConfig (UV32*)(USBHOSTBASE+0x00000050)
#define P_USBH_VbusSet (UV32*)(USBHOSTBASE+0x00000054)
#define P_USBH_VbusStatus (UV32*)(USBHOSTBASE+0x00000058)
#define P_USBH_INAckCount (UV32*)(USBHOSTBASE+0x0000005C)
#define P_USBH_OutAckCount (UV32*)(USBHOSTBASE+0x00000060)
#define P_USBH_RSTAckCount (UV32*)(USBHOSTBASE+0x00000064)
#define P_USBH_Storage1_2 (UV32*)(USBHOSTBASE+0x00000068)
#define P_USBH_DReadBack (UV32*)(USBHOSTBASE+0x0000006C)
/**
* Reserved: 0x081D_0000 ~ 0x081D_FFFF
*/
/**
* Reserved: 0x081E_0000 ~ 0x081E_FFFF
*/
/**
* Reserved: 0x081F_0000 ~ 0x081F_FFFF
*/
/**
* SFTCFG: 0x0820_0000 ~ 0x0820_FFFF
*/
#define SFTCFGBASE 0x88200000
#define P_GPIO_DEVICE_SET (UV32*)(SFTCFGBASE + 0x00000000)
#define P_GPIO_FUNC_SET (UV32*)(SFTCFGBASE + 0x00000004)
#define P_GPIO_DRAM_SET (UV32*)(SFTCFGBASE + 0x00000008)
#define P_GPIO_OUTPUT (UV32*)(SFTCFGBASE + 0x0000000C)
#define P_GPIO_LIGHTPEN_PORT (UV32*)(SFTCFGBASE + 0x00000010)
#define P_GPIO_TFT_PORT (UV32*)(SFTCFGBASE + 0x00000014)
#define P_GPIO_TFT_OE (UV32*)(SFTCFGBASE + 0x00000018)
#define P_GPIO_TFT_PU (UV32*)(SFTCFGBASE + 0x0000001C)
#define P_GPIO_TFT_PD (UV32*)(SFTCFGBASE + 0x00000020)
#define P_GPIO_CSI_PORT (UV32*)(SFTCFGBASE + 0x00000024)
#define P_GPIO_CSI_PULL (UV32*)(SFTCFGBASE + 0x00000028)
#define P_GPIO_NFLASH_PORT (UV32*)(SFTCFGBASE + 0x0000002C)
#define P_GPIO_NFLASH_PULL (UV32*)(SFTCFGBASE + 0x00000030)
#define P_GPIO_JTAG_PORT (UV32*)(SFTCFGBASE + 0x00000034)
#define P_GPIO_GLOBAL_PORT (UV32*)(SFTCFGBASE + 0x00000038)
#define P_GPIO_USB_PORT (UV32*)(SFTCFGBASE + 0x0000003C)
#define P_GPIO_UART_PORT (UV32*)(SFTCFGBASE + 0x00000040)
#define P_GPIO_I2C_PORT (UV32*)(SFTCFGBASE + 0x00000044)
#define P_GPIO_ADC_PORT (UV32*)(SFTCFGBASE + 0x00000048)
#define P_GPIO_CDSERVO_PORT (UV32*)(SFTCFGBASE + 0x0000004C)
#define P_GPIO_DRAM_PORT (UV32*)(SFTCFGBASE + 0x00000050)
#define P_GPIO_ADC_AEN (UV32*)(SFTCFGBASE + 0x00000054)
#define P_GPIO_TFT_INPUT (UV32*)(SFTCFGBASE + 0x00000064)
#define P_GPIO_CSI_INPUT (UV32*)(SFTCFGBASE + 0x00000068)
#define P_GPIO_NFLASH_INPUT (UV32*)(SFTCFGBASE + 0x0000006C)
#define P_GPIO_JCD_INPUT (UV32*)(SFTCFGBASE + 0x00000070)
#define P_GPIO_GUUI_INPUT (UV32*)(SFTCFGBASE + 0x00000074)
#define P_GPIO_ADC_INPUT (UV32*)(SFTCFGBASE + 0x00000078)
#define P_GPIO_TFT_INT (UV32*)(SFTCFGBASE + 0x00000080)
#define P_GPIO_CSI_INT (UV32*)(SFTCFGBASE + 0x00000084)
#define P_GPIO_NFLASH_INT (UV32*)(SFTCFGBASE + 0x00000088)
#define P_GPIO_JTAG_INT (UV32*)(SFTCFGBASE + 0x0000008C)
#define P_GPIO_GLOBAL_INT (UV32*)(SFTCFGBASE + 0x00000090)
#define P_GPIO_UART_INT (UV32*)(SFTCFGBASE + 0x00000094)
#define P_GPIO_I2C_INT (UV32*)(SFTCFGBASE + 0x00000098)
#define P_GPIO_ADC_INT (UV32*)(SFTCFGBASE + 0x0000009C)
#define P_GPIO_USBDET_INT (UV32*)(SFTCFGBASE + 0x000000A0)
#define P_GPIO_NFSDSPI_EN (UV32*)(SFTCFGBASE + 0x000000A4)
#define P_GPIO_LVD_CTRL (UV32*)(SFTCFGBASE + 0x000000A8)
#define P_SYS_C2M_STBLENG (UV32*)(SFTCFGBASE + 0x000000c0)
/**
* CKG: 0x0821_0000 ~ 0x0821_FFFF
*/
#define CKGBASE 0x88210000
#define P_CPU_CONF (UV32*)(CKGBASE + 0x00000000)
#define P_CKG_SEL_CPU (UV32*)(CKGBASE + 0x00000004)
#define P_CPUAHB_CONF (UV32*)(CKGBASE + 0x00000008)
#define P_CKG_SEL_CPUAHB (UV32*)(CKGBASE + 0x0000000c)
#define P_MIU_CONF (UV32*)(CKGBASE + 0x00000010)
#define P_CSI_CONF (UV32*)(CKGBASE + 0x00000018)
#define P_CKG_SEL_CSI (UV32*)(CKGBASE + 0x0000001c)
#define P_PPU_CONF (UV32*)(CKGBASE + 0x00000020)
#define P_CKG_SEL_PPU (UV32*)(CKGBASE + 0x00000024)
#define P_JPG_CONF (UV32*)(CKGBASE + 0x00000028)
#define P_CKG_SEL_JPG (UV32*)(CKGBASE + 0x0000002c)
#define P_TVE_CONF (UV32*)(CKGBASE + 0x00000030)
#define P_LCD_CONF (UV32*)(CKGBASE + 0x00000034)
#define P_CKG_SEL_LCD (UV32*)(CKGBASE + 0x00000038)
#define P_SPU_CONF (UV32*)(CKGBASE + 0x0000003c)
#define P_CDS_CONF (UV32*)(CKGBASE + 0x00000044)
#define P_BLNDMA_CONF (UV32*)(CKGBASE + 0x00000050)
#define P_APBDMA_CONF (UV32*)(CKGBASE + 0x00000058)
#define P_UART_CONF (UV32*)(CKGBASE + 0x0000005C)
#define P_USB_CONF (UV32*)(CKGBASE + 0x00000064)
#define P_TIMER1_CONF (UV32*)(CKGBASE + 0x0000006C)
#define P_TIMER2_CONF (UV32*)(CKGBASE + 0x00000070)
#define P_TIMER3_CONF (UV32*)(CKGBASE + 0x00000074)
#define P_TIMER4_CONF (UV32*)(CKGBASE + 0x00000078)
#define P_TIMER5_CONF (UV32*)(CKGBASE + 0x0000007C)
#define P_TIMER6_CONF (UV32*)(CKGBASE + 0x00000080)
#define P_WDOG_CONF (UV32*)(CKGBASE + 0x00000084)
#define P_RTC_CONF (UV32*)(CKGBASE + 0x00000088)
#define P_I2S_CONF (UV32*)(CKGBASE + 0x0000008C)
#define P_CKG_SEL_I2S (UV32*)(CKGBASE + 0x00000090)
#define P_I2C_CONF (UV32*)(CKGBASE + 0x00000094)
#define P_SPI_CONF (UV32*)(CKGBASE + 0x00000098)
#define P_CKG_SEL_SPI (UV32*)(CKGBASE + 0x0000009C)
#define P_SIO_CONF (UV32*)(CKGBASE + 0x000000A0)
#define P_SD_CONF (UV32*)(CKGBASE + 0x000000A4)
#define P_FLASH_CONF (UV32*)(CKGBASE + 0x000000A8)
#define P_ADC_CONF (UV32*)(CKGBASE + 0x000000AC)
#define P_CKG_SEL_ADC (UV32*)(CKGBASE + 0x000000B0)
#define P_PLLV_EN (UV32*)(CKGBASE + 0x000000B4)
#define P_PLLV_FREQUENCY (UV32*)(CKGBASE + 0x000000B8)
#define P_PLLAU_CONF (UV32*)(CKGBASE + 0x000000BC)
#define P_CLR_KEY_CHANGE (UV32*)(CKGBASE + 0x000000C0)
#define P_LVR_EN (UV32*)(CKGBASE + 0x000000C4)
#define P_BUFCTL_CONF (UV32*)(CKGBASE + 0x000000C8)
#define P_LDMDMA_CONF (UV32*)(CKGBASE + 0x000000CC)
#define P_IRQ_CONF (UV32*)(CKGBASE + 0x000000D0)
#define P_EPP_CONF (UV32*)(CKGBASE + 0x000000D4)
#define P_CKG_SEL_CDS (UV32*)(CKGBASE + 0x000000D8)
#define P_CKG_CONF (UV32*)(CKGBASE + 0x000000DC)
#define P_TBASE_CONF (UV32*)(CKGBASE + 0x000000E0)
#define P_CKG_SEL_TIMER (UV32*)(CKGBASE + 0x000000E4)
#define P_WDOG_STATUS (UV32*)(CKGBASE + 0x000000E8)
#define P_MP4_CONF (UV32*)(CKGBASE + 0x000000EC)
#define P_CKG_SEL_MP4 (UV32*)(CKGBASE + 0x000000F0)
#define P_USB_DETECT_SET (UV32*)(CKGBASE + 0x000000F4)
#define P_UART_DETECT_SET (UV32*)(CKGBASE + 0x000000F8)
#define P_SFTCFG_CONF (UV32*)(CKGBASE + 0x000000FC)
#define P_PLL_STIME (UV32*)(CKGBASE + 0x00000104)
#define P_CKG_STATUS (UV32*)(CKGBASE + 0x00000110)
#define P_CRYSTAL_EN (UV32*)(CKGBASE + 0x00000114)
#define P_CKG_CFG_ADC (UV32*)(0x8821010C)
#define P_CKG_CFG_PLLA (UV32*)(CKGBASE + (47 << 2)) // added by Bruce
#define P_CKG_CFG_SFT (UV32*)(CKGBASE + (63 << 2)) // added by Bruce
/**
* MP4: 0x0822_0000 ~ 0x0822_FFFF
*/
#define MPEG4BASE 0x88220000
/////////////////////////////////////////////////////////////////////////////////
// MPEG Engine Register Definition
/////////////////////////////////////////////////////////////////////////////////
#define P_MP4_MJWIDTHL (UV32*)(MPEG4BASE + 0x00000000)
#define P_MP4_MJWIDTH (UV32*)(MPEG4BASE + 0x00000004)
#define P_MP4_MJHEIGHTL (UV32*)(MPEG4BASE + 0x00000008)
#define P_MP4_MJHEIGHT (UV32*)(MPEG4BASE + 0x0000000C)
#define P_MP4_MJHOFFSETL (UV32*)(MPEG4BASE + 0x00000010)
#define P_MP4_MJHOFFSET (UV32*)(MPEG4BASE + 0x00000014)
#define P_MP4_MJVOFFSETL (UV32*)(MPEG4BASE + 0x00000018)
#define P_MP4_MJVOFFSET (UV32*)(MPEG4BASE + 0x0000001C)
#define P_MP4_VLCOFFADDRL (UV32*)(MPEG4BASE + 0x00000020)
#define P_MP4_VLCOFFADDRM (UV32*)(MPEG4BASE + 0x00000024)
#define P_MP4_VLCOFFADDR (UV32*)(MPEG4BASE + 0x00000028)
#define P_MP4_TMBOFFADDRL (UV32*)(MPEG4BASE + 0x00000040)
#define P_MP4_TMBOFFADDRM (UV32*)(MPEG4BASE + 0x00000044)
#define P_MP4_TMBOFFADDR (UV32*)(MPEG4BASE + 0x00000048)
#define P_MP4_YUVSEL (UV32*)(MPEG4BASE + 0x0000004C)
#define P_MP4_CONTROL (UV32*)(MPEG4BASE + 0x00000050)
#define P_MP4_SETTING (UV32*)(MPEG4BASE + 0x00000054)
#define P_MP4_HSFACTOR (UV32*)(MPEG4BASE + 0x00000058)
#define P_MP4_VSFACTOR (UV32*)(MPEG4BASE + 0x0000005C)
#define P_MP4_GOPVAL (UV32*)(MPEG4BASE + 0x00000060)
#define P_MP4_SETEN (UV32*)(MPEG4BASE + 0x00000064)
#define P_MP4_VARDTHRL (UV32*)(MPEG4BASE + 0x00000068)
#define P_MP4_VARDTHRM (UV32*)(MPEG4BASE + 0x0000006C)
#define P_MP4_INIAVGACT (UV32*)(MPEG4BASE + 0x00000070)
#define P_MP4_AVGACTWEIL (UV32*)(MPEG4BASE + 0x00000078)
#define P_MP4_AVGACTWEIM (UV32*)(MPEG4BASE + 0x0000007C)
#define P_MP4_RESET (UV32*)(MPEG4BASE + 0x00000080)
#define P_MP4_BUFCTRL (UV32*)(MPEG4BASE + 0x00000084)
#define P_MP4_TBL (UV32*)(MPEG4BASE + 0x0000008C)
#define P_MP4_SOFCTRL (UV32*)(MPEG4BASE + 0x000000A0)
#define P_MP4_YUVMODE (UV32*)(MPEG4BASE + 0x000000C8)
#define P_MP4_INTMASK (UV32*)(MPEG4BASE + 0x000000D0)
#define P_MP4_INTCLR (UV32*)(MPEG4BASE + 0x000000D4)
#define P_MP4_DECWIDTHL (UV32*)(MPEG4BASE + 0x00000100)
#define P_MP4_DECWIDTH (UV32*)(MPEG4BASE + 0x00000104)
#define P_MP4_DECHEIGHTL (UV32*)(MPEG4BASE + 0x00000108)
#define P_MP4_DECHEIGHT (UV32*)(MPEG4BASE + 0x0000010C)
#define P_MP4_DVLCOFFADDRL (UV32*)(MPEG4BASE + 0x00000110)
#define P_MP4_DVLCOFFADDRM (UV32*)(MPEG4BASE + 0x00000114)
#define P_MP4_DVLCOFFADDR (UV32*)(MPEG4BASE + 0x00000118)
/////////////////////////////////////////////////////////////////////////////////
// Texture Engine Register Definition
/////////////////////////////////////////////////////////////////////////////////
// reg0100 ~ reg013f for Qtable1
// reg0140 ~ reg017f for Qtable2
#define P_MP4_QTABLE1_STR (UV32*)(MPEG4BASE + 0x00000400)
#define P_MP4_QTABLE2_STR (UV32*)(MPEG4BASE + 0x00000500)
#define P_MP4_QTBLSET (UV32*)(MPEG4BASE + 0x00000604)
#define P_MP4_QSRAMEN (UV32*)(MPEG4BASE + 0x00000608)
#define P_MP4_JFIF (UV32*)(MPEG4BASE + 0x00000610)
#define P_MP4_TRUNTRES (UV32*)(MPEG4BASE + 0x00000614)
#define P_MP4_RESTARTMCUL (UV32*)(MPEG4BASE + 0x00000620)
#define P_MP4_RESTARTMCU (UV32*)(MPEG4BASE + 0x00000624)
#define P_MP4_MATCHCNT (UV32*)(MPEG4BASE + 0x00000648)
#define P_MP4_MATCHCODE0 (UV32*)(MPEG4BASE + 0x0000064C)
#define P_MP4_MATCHCODE1 (UV32*)(MPEG4BASE + 0x00000650)
#define P_MP4_MATCHCODE2 (UV32*)(MPEG4BASE + 0x00000654)
#define P_MP4_MATCHCODE3 (UV32*)(MPEG4BASE + 0x00000658)
#define P_MP4_OFFSET (UV32*)(MPEG4BASE + 0x0000065C)
#define P_MP4_VOPTimeIncLen (UV32*)(MPEG4BASE + 0x00000690)
#define P_MP4_SRAM_CS_N (UV32*)(MPEG4BASE + 0x000006F8)
#define P_MP4_H263_CTRL (UV32*)(MPEG4BASE + 0x000007C8)
#define P_MP4_TSRAM_CTRL (UV32*)(MPEG4BASE + 0x000007E0)
// reg0200 ~ reg023f for HuffmanTable
#define P_MP4_Huffman_Str (UV32*)(MPEG4BASE + 0x00000800)
// reg0200 ~ reg023f for HuffmanTable
//////////////////////////////////////////////////////////////////////////////
#define P_MP4_YDCW_Str (UV32*)(MPEG4BASE + 0x00000800)
#define P_MP4_YDCS_Str (UV32*)(MPEG4BASE + 0x00000860)
#define P_MP4_YDCV_Str (UV32*)(MPEG4BASE + 0x00000880)
#define P_MP4_CDCW_Str (UV32*)(MPEG4BASE + 0x000008C0)
#define P_MP4_CDCS_Str (UV32*)(MPEG4BASE + 0x00000920)
#define P_MP4_CDCV_Str (UV32*)(MPEG4BASE + 0x00000940)
#define P_MP4_YACW_Str (UV32*)(MPEG4BASE + 0x00000980)
#define P_MP4_YACS_Str (UV32*)(MPEG4BASE + 0x000009E0)
#define P_MP4_CACW_Str (UV32*)(MPEG4BASE + 0x00000A40)
#define P_MP4_CACS_Str (UV32*)(MPEG4BASE + 0x00000AA0)
#endif //SCOREIDE_SPG290_H_11538_14771__INCLUDED_
#endif //_SYS_REGISTER_H
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