pcb_project1.prjpcb

一个功放的电路。可以自己制作。已经画好的PCB

[Design]
Version=1.0
HierarchyMode=0
ChannelRoomNamingStyle=0
OutputPath=
ChannelDesignatorFormatString=$Component_$RoomName
ChannelRoomLevelSeperator=_
OpenOutputs=1
ArchiveProject=0
TimestampOutput=0
SeparateFolders=0
PinSwapBy_Netlabel=1
PinSwapBy_Pin=1
AllowPortNetNames=0
AllowSheetEntryNetNames=1
AppendSheetNumberToLocalNets=0
DefaultConfiguration=
UserID=0xFFFFFFFF
DefaultPcbProtel=1
DefaultPcbPcad=0
ReorderDocumentsOnCompile=1
NameNetsHierarchically=0
PowerPortNamesTakePriority=0

[Document1]
DocumentPath=功放.PcbDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
AnnotateSuffix=
AnnotateScope=All
AnnotateOrder=-1
DoLibraryUpdate=1
DoDatabaseUpdate=1
ClassGenCCAutoEnabled=1
ClassGenCCAutoRoomEnabled=1
ClassGenNCAutoScope=None

[Document2]
DocumentPath=功放电路.SCHDOC
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
AnnotateSuffix=
AnnotateScope=All
AnnotateOrder=-1
DoLibraryUpdate=1
DoDatabaseUpdate=1
ClassGenCCAutoEnabled=1
ClassGenCCAutoRoomEnabled=1
ClassGenNCAutoScope=None

[Document3]
DocumentPath=CAMtastic2.Cam
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
AnnotateSuffix=
AnnotateScope=All
AnnotateOrder=-1
DoLibraryUpdate=1
DoDatabaseUpdate=1
ClassGenCCAutoEnabled=1
ClassGenCCAutoRoomEnabled=1
ClassGenNCAutoScope=None

[Document4]
DocumentPath=音频头连接图.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
AnnotateSuffix=
AnnotateScope=All
AnnotateOrder=-1
DoLibraryUpdate=1
DoDatabaseUpdate=1
ClassGenCCAutoEnabled=1
ClassGenCCAutoRoomEnabled=1
ClassGenNCAutoScope=None

[Document5]
DocumentPath=Project Outputs for PCB_PROJECT1\CAMtastic1.Cam
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
AnnotateSuffix=
AnnotateScope=All
AnnotateOrder=-1
DoLibraryUpdate=1
DoDatabaseUpdate=1
ClassGenCCAutoEnabled=1
ClassGenCCAutoRoomEnabled=1
ClassGenNCAutoScope=None

[Document6]
DocumentPath=Project Outputs for PCB_PROJECT1\CAMtastic3.Cam
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
AnnotateSuffix=
AnnotateScope=All
AnnotateOrder=-1
DoLibraryUpdate=1
DoDatabaseUpdate=1
ClassGenCCAutoEnabled=1
ClassGenCCAutoRoomEnabled=1
ClassGenNCAutoScope=None

[GeneratedDocument1]
DocumentPath=Project Outputs for PCB_Project1\功放.DRL

[GeneratedDocument2]
DocumentPath=Project Outputs for PCB_Project1\功放.DRR

[GeneratedDocument3]
DocumentPath=Project Outputs for PCB_Project1\功放.EXTREP

[GeneratedDocument4]
DocumentPath=Project Outputs for PCB_Project1\功放.GBL

[GeneratedDocument5]
DocumentPath=Project Outputs for PCB_Project1\功放.GBO

[GeneratedDocument6]
DocumentPath=Project Outputs for PCB_Project1\功放.GBP

[GeneratedDocument7]
DocumentPath=Project Outputs for PCB_Project1\功放.GBS

[GeneratedDocument8]
DocumentPath=Project Outputs for PCB_Project1\功放.GD1

[GeneratedDocument9]
DocumentPath=Project Outputs for PCB_Project1\功放.GG1

[GeneratedDocument10]
DocumentPath=Project Outputs for PCB_Project1\功放.GKO

[GeneratedDocument11]
DocumentPath=Project Outputs for PCB_Project1\功放.GPB

[GeneratedDocument12]
DocumentPath=Project Outputs for PCB_Project1\功放.GPT

[GeneratedDocument13]
DocumentPath=Project Outputs for PCB_Project1\功放.GTL

[GeneratedDocument14]
DocumentPath=Project Outputs for PCB_Project1\功放.GTO

[GeneratedDocument15]
DocumentPath=Project Outputs for PCB_Project1\功放.GTP

[GeneratedDocument16]
DocumentPath=Project Outputs for PCB_Project1\功放.GTS

[GeneratedDocument17]
DocumentPath=Project Outputs for PCB_Project1\功放.LDP

[GeneratedDocument18]
DocumentPath=Project Outputs for PCB_Project1\功放.REP

[GeneratedDocument19]
DocumentPath=Project Outputs for PCB_Project1\功放.TXT

[Generic_SmartPDF]
AutoOpenFile=-1

[Generic_SmartPDFSettings]
ProjectMode=-1
ZoomPrecision=50
AddNetsInformation=-1
AddNetPins=-1
AddNetNetLabels=-1
AddNetPorts=-1
PCB_PrintColor=2
SCH_PrintColor=0
SCH_ShowNoErc=-1
SCH_ShowParameter=-1
SCH_ShowProbes=-1
OutputFileName=PCB_Project1.PrjPCB=D:\工作资料\功放板文档\装配图\功放板装配1.pdf
SCH_ExpandLogicalToPhysical=-1
SCH_VariantName=
SCH_ExpandComponentDesignators=-1
SCH_ExpandNetlabels=0
SCH_ExpandPorts=0
SCH_ExpandSheetNumber=0
SCH_ExpandDocumentNumber=0
SCH_HasExpandLogicalToPhysicalSheets=0

[OutputGroup1]
Name=Netlist Outputs
Description=
TargetPrinter=HP LaserJet 3050 Series PCL 5e
PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1
OutputType1=EDIF
OutputName1=EDIF for PCB
OutputDocumentPath1=
OutputVariantName1=
OutputEnabled1=1
OutputDefault1=0
OutputType2=MultiWire
OutputName2=MultiWire
OutputDocumentPath2=
OutputVariantName2=
OutputEnabled2=1
OutputDefault2=0
OutputType3=Pcad
OutputName3=Pcad for PCB
OutputDocumentPath3=
OutputVariantName3=
OutputEnabled3=1
OutputDefault3=0
OutputType4=ProtelNetlist
OutputName4=Protel
OutputDocumentPath4=
OutputVariantName4=
OutputEnabled4=1
OutputDefault4=0
OutputType5=Verilog
OutputName5=Verilog File
OutputDocumentPath5=
OutputVariantName5=
OutputEnabled5=1
OutputDefault5=0
OutputType6=VHDL
OutputName6=VHDL File
OutputDocumentPath6=
OutputVariantName6=
OutputEnabled6=1
OutputDefault6=0
OutputType7=XSpiceNetlist
OutputName7=XSpice Netlist
OutputDocumentPath7=
OutputVariantName7=
OutputEnabled7=1
OutputDefault7=0

[OutputGroup2]
Name=Simulator Outputs
Description=
TargetPrinter=HP LaserJet 3050 Series PCL 5e
PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1
OutputType1=AdvSimNetlist
OutputName1=Mixed Sim
OutputDocumentPath1=
OutputVariantName1=
OutputEnabled1=1
OutputDefault1=0

[OutputGroup3]
Name=Documentation Outputs
Description=
TargetPrinter=HP LaserJet 3050 Series PCL 5e
PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1
OutputType1=Composite
OutputName1=Composite Drawing
OutputDocumentPath1=G:\PROJECT\音频功放\功放.PcbDoc
OutputVariantName1=
OutputEnabled1=1
OutputDefault1=0
PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=4.10|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1
Configuration1_Name1=OutputConfigurationParameter1
Configuration1_Item1=PrintArea=DesignExtent|PrintAreaLowerLeftCornerX=0|PrintAreaLowerLeftCornerY=0|PrintAreaUpperRightCornerX=0|PrintAreaUpperRightCornerY=0|Record=PcbPrintView
Configuration1_Name2=OutputConfigurationParameter2
Configuration1_Item2=IncludeBottomLayerComponents=True|IncludeMultiLayerComponents=True|IncludeTopLayerComponents=True|Index=0|Mirror=False|Name=Multilayer Composite Print|PadNumberFontSize=14|Record=PcbPrintOut|ShowHoles=False|ShowPadNets=False|ShowPadNumbers=False|SubstituteFonts=False
Configuration1_Name3=OutputConfigurationParameter3
Configuration1_Item3=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=TopOverlay|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer
Configuration1_Name4=OutputConfigurationParameter4
Configuration1_Item4=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=KeepOutLayer|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer
Configuration1_Name5=OutputConfigurationParameter5
Configuration1_Item5=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=MultiLayer|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer
Configuration1_Name6=OutputConfigurationParameter6
Configuration1_Item6=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=TopLayer|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer
OutputType2=Logic Analyser Print
OutputName2=Logic Analyser Prints
OutputDocumentPath2=
OutputVariantName2=
OutputEnabled2=1
OutputDefault2=0
PageOptions2=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1
OutputType3=PCB Print
OutputName3=PCB Prints
OutputDocumentPath3=
OutputVariantName3=
OutputEnabled3=1
OutputDefault3=0
PageOptions3=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1
OutputType4=Schematic Print
OutputName4=Schematic Prints
OutputDocumentPath4=G:\我的电路设计\音频功放\功放电路.SCHDOC
OutputVariantName4=
OutputEnabled4=1
OutputDefault4=0
PageOptions4=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1
Configuration4_Name1=OutputConfigurationParameter1
Configuration4_Item1=Record=SchPrintView|BooleanThing=False
OutputType5=SimView Print