📄 video_rgb.asm
字号:
MVKL .S1 0x1848204,A3 ; |350|
MVKH .S1 0x1848204,A3 ; |350|
LDW .D1T1 *A3,A3 ; |350|
NOP 2
MVKL .S2 0x1848204,B4 ; |350|
MVKH .S2 0x1848204,B4 ; |350|
OR .D1 1,A3,A3 ; |350|
STW .D2T1 A3,*B4 ; |350|
MVKL .S2 0x1848204,B4 ; |351|
MVKH .S2 0x1848204,B4 ; |351|
LDW .D2T2 *B4,B4 ; |351|
NOP 4
AND .D2 1,B4,B0 ; |351|
[ B0] B .S1 L8 ; |351|
[!B0] MVKL .S1 0x1848204,A3 ; |351| (P) <0,0>
[!B0] MVKH .S1 0x1848204,A3 ; |351| (P) <0,1>
[!B0] LDW .D1T1 *A3,A4 ; |351| (P) <0,2> ^
NOP 2
; BRANCH OCCURS ; |351|
;** --------------------------------------------------------------------------*
NOP 1
MVK .D2 0x1,B0
;*----------------------------------------------------------------------------*
;* SOFTWARE PIPELINE INFORMATION
;*
;* Loop source line : 351
;* Loop closing brace source line : 351
;* Known Minimum Trip Count : 1
;* Known Max Trip Count Factor : 1
;* Loop Carried Dependency Bound(^) : 7
;* Unpartitioned Resource Bound : 2
;* Partitioned Resource Bound(*) : 2
;* Resource Partition:
;* A-side B-side
;* .L units 0 0
;* .S units 2* 1
;* .D units 1 0
;* .M units 0 0
;* .X cross paths 0 0
;* .T address paths 1 0
;* Long read paths 0 0
;* Long write paths 0 0
;* Logical ops (.LS) 0 0 (.L or .S unit)
;* Addition ops (.LSD) 1 1 (.L or .S or .D unit)
;* Bound(.L .S .LS) 1 1
;* Bound(.L .S .D .LS .LSD) 2* 1
;*
;* Searching for software pipeline schedule at ...
;* ii = 7 Schedule found with 2 iterations in parallel
;*
;* Register Usage Table:
;* +-----------------------------------------------------------------+
;* |AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA|BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB|
;* |00000000001111111111222222222233|00000000001111111111222222222233|
;* |01234567890123456789012345678901|01234567890123456789012345678901|
;* |--------------------------------+--------------------------------|
;* 0: | * |* |
;* 1: |* ** |* |
;* 2: | ** |* |
;* 3: | * |* |
;* 4: | * |* |
;* 5: | * |* |
;* 6: | * |* |
;* +-----------------------------------------------------------------+
;*
;* Done
;*
;* Loop is interruptible
;* Collapsed epilog stages : 1
;* Prolog not removed
;* Collapsed prolog stages : 0
;*
;* Minimum required memory pad : 0 bytes
;*
;* Minimum safe trip count : 1
;*----------------------------------------------------------------------------*
;* SETUP CODE
;*
;* MVK 0x1,B0
;* ZERO A4
;*
;* SINGLE SCHEDULED ITERATION
;*
;* C16:
;* 0 MVKL .S1 0x1848204,A3 ; |351|
;* 1 MVKH .S1 0x1848204,A3 ; |351|
;* 2 [ B0] LDW .D1T1 *A3,A4 ; |351| ^
;* 3 NOP 4
;* 7 AND .D1 1,A4,A0 ; |351| ^
;* 8 [ A0] ZERO .D2 B0 ; ^
;* || [!A0] B .S2 C16 ; |351|
;* 9 NOP 5
;* ; BRANCH OCCURS ; |351|
;*----------------------------------------------------------------------------*
L5: ; PIPED LOOP PROLOG
;** --------------------------------------------------------------------------*
L6: ; PIPED LOOP KERNEL
AND .D1 1,A4,A0 ; |351| <0,7> ^
|| MVKL .S1 0x1848204,A3 ; |351| <1,0>
[!A0] B .S2 L6 ; |351| <0,8>
|| [ A0] ZERO .D2 B0 ; <0,8> ^
|| MVKH .S1 0x1848204,A3 ; |351| <1,1>
[ B0] LDW .D1T1 *A3,A4 ; |351| <1,2> ^
NOP 4
;** --------------------------------------------------------------------------*
L7: ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
L8:
.line 11
MVKL .S1 _DAT_open,A3 ; |230|
MVKH .S1 _DAT_open,A3 ; |230|
MVK .D1 0x1,A6 ; |230|
CALL .S2X A3 ; |230|
ADDKPC .S2 RL4,B3,2 ; |230|
MVK .D2 0x3,B4 ; |230|
ZERO .S1 A4 ; |230|
RL4: ; CALL OCCURS ; |230|
ZERO .D1 A4 ; |230|
.line 13
LDW .D2T2 *++SP(8),B3 ; |232|
NOP 4
RETNOP .S2 B3,5 ; |232|
; BRANCH OCCURS ; |232|
.endfunc 232,000080000h,8
.sect ".text"
.global _tskVideoLoopback
.sym _tskVideoLoopback,_tskVideoLoopback, 32, 2, 0
.func 238
;******************************************************************************
;* FUNCTION NAME: _tskVideoLoopback *
;* *
;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,A14, *
;* A15,B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12, *
;* B13,SP,A16,A17,A18,A19,A20,A21,A22,A23,A24,A25, *
;* A26,A27,A28,A29,A30,A31,B16,B17,B18,B19,B20,B21, *
;* B22,B23,B24,B25,B26,B27,B28,B29,B30,B31 *
;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,A14, *
;* A15,B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12, *
;* B13,SP,A16,A17,A18,A19,A20,A21,A22,A23,A24,A25, *
;* A26,A27,A28,A29,A30,A31,B16,B17,B18,B19,B20,B21, *
;* B22,B23,B24,B25,B26,B27,B28,B29,B30,B31 *
;* Local Frame Size : 48 Args + 176 Auto + 44 Save = 268 byte *
;******************************************************************************
;******************************************************************************
;* *
;* Using -g (debug) with optimization (-o2) may disable key optimizations! *
;* *
;******************************************************************************
_tskVideoLoopback:
;** --------------------------------------------------------------------------*
.line 2
.sym _status,52, 4, 1, 32
.sym _disChan,172, 24, 1, 32, _GIO_Obj
.sym _disFrameBuf,56, 24, 1, 32, _FVID_Frame
.sym _id0,3, 14, 4, 32
.sym _q_h,13, 4, 4, 32
.sym _q_v,11, 4, 4, 32
.sym _counter,15, 4, 4, 32
.sym _sign,14, 4, 4, 32
.sym _numLines,26, 4, 4, 32
.sym _capChan,168, 24, 1, 32, _GIO_Obj
.sym _capFrameBuf,60, 24, 1, 32, _FVID_Frame
.sym _capLinePitch,27, 4, 4, 32
.sym _disLinePitch,164, 13, 1, 32
.sym _in_image_luma_ev,64, 8, 1, 96, _image
.sym _in_image_Cr_ev,76, 8, 1, 96, _image
.sym _in_image_Cb_ev,88, 8, 1, 96, _image
.sym _in_image_luma_od,100, 8, 1, 96, _image
.sym _in_image_Cr_od,112, 8, 1, 96, _image
.sym _in_image_Cb_od,124, 8, 1, 96, _image
.sym _out_image,136, 8, 1, 96, _image
.sym _scratch_pad,148, 8, 1, 128, $$fake14
ADDK .S2 -272,SP ; |239|
|| MV .D1X SP,A31 ; |239|
STW .D2T1 A15,*+SP(272)
STW .D2T2 B12,*+SP(264)
STW .D2T2 B13,*+SP(268)
STW .D2T2 B10,*+SP(256)
|| STDW .D1T1 A13:A12,*-A31(32)
STW .D2T2 B11,*+SP(260)
|| STDW .D1T1 A11:A10,*-A31(40)
STW .D1T1 A14,*-A31(24)
|| STW .D2T2 B3,*+SP(252)
.line 49
MVKL .S1 _EVMDM642_vCapParamsChan+40,A3 ; |286|
MVKH .S1 _EVMDM642_vCapParamsChan+40,A3 ; |286|
|| MVKL .S2 _EVMDM642_vCapParamsChan+48,B4 ; |286|
LDHU .D1T1 *A3,A4 ; |286|
|| MVKH .S2 _EVMDM642_vCapParamsChan+48,B4 ; |286|
LDHU .D2T1 *B4,A3 ; |286|
NOP 4
SUB .D1 A3,A4,A3 ; |286|
NOP 1
ADD .D2X 1,A3,B11 ; |286|
.line 51
MVKL .S1 _EVMDM642_vDisParamsChan+48,A3 ; |288|
MVKH .S1 _EVMDM642_vDisParamsChan+48,A3 ; |288|
LDHU .D1T1 *A3,A3 ; |288|
NOP 4
STW .D2T1 A3,*+SP(164) ; |288|
.line 66
MVKL .S1 _EVMDM642_vCapParamsChan+42,A3 ; |303|
|| MVKL .S2 _EVMDM642_vCapParamsChan+50,B4 ; |303|
MVKH .S1 _EVMDM642_vCapParamsChan+42,A3 ; |303|
|| MVKH .S2 _EVMDM642_vCapParamsChan+50,B4 ; |303|
LDHU .D1T1 *A3,A3 ; |303|
|| LDHU .D2T2 *B4,B5 ; |303|
MVKL .S2 _EVMDM642_vDisParamsChan+50,B4 ; |303|
MVKH .S2 _EVMDM642_vDisParamsChan+50,B4 ; |303|
LDHU .D2T2 *B4,B4 ; |303|
NOP 1
SUB .S1X B5,A3,A3 ; |303|
NOP 1
ADD .D1 1,A3,A3 ; |303|
|| ADD .D2X 1,A3,B5 ; |303|
CMPGT .L1X B4,A3,A0 ; |303|
[!A0] MV .D2 B4,B5 ; |303|
ADD .D2 B5,B5,B10 ; |303|
.line 71
MVKL .S1 _EXTERNALHEAP,A3 ; |308|
MVKH .S1 _EXTERNALHEAP,A3 ; |308|
LDW .D1T1 *A3,A3 ; |308|
NOP 2
MVKL .S1 _EVMDM642_vCapParamsChan+72,A4 ; |308|
MVKH .S1 _EVMDM642_vCapParamsChan+72,A4 ; |308|
STW .D1T1 A3,*A4 ; |308|
.line 72
MVKL .S2 _EVMDM642_vDisParamsChan+140,B4 ; |309|
MVKH .S2 _EVMDM642_vDisParamsChan+140,B4 ; |309|
STW .D2T1 A3,*B4 ; |309|
.line 73
MVKL .S1 _EVMDM642_I2C_hI2C,A3 ; |310|
MVKH .S1 _EVMDM642_I2C_hI2C,A3 ; |310|
LDW .D1T1 *A3,A3 ; |310|
NOP 2
MVKL .S2 _EVMDM642_vDisParamsSAA7105+16,B4 ; |310|
MVKH .S2 _EVMDM642_vDisParamsSAA7105+16,B4 ; |310|
STW .D2T1 A3,*B4 ; |310|
.line 74
MVKL .S1 _EVMDM642_vCapParamsSAA7115+16,A4 ; |311|
MVKH .S1 _EVMDM642_vCapParamsSAA7115+16,A4 ; |311|
STW .D1T1 A3,*A4 ; |311|
.line 80
MVKL .S1 _GIO_create,A3 ; |317|
MVKH .S1 _GIO_create,A3 ; |317|
MVKL .S1 _EVMDM642_vCapParamsChan,A5 ; |317|
CALL .S2X A3 ; |317|
ADDAW .D2 SP,13,B5 ; |317|
MVKH .S1 _EVMDM642_vCapParamsChan,A5 ; |317|
MVKL .S1 SL1+0,A4 ; |317|
ADDKPC .S2 RL5,B3,0 ; |317|
MVK .D2 0x1,B4 ; |317|
|| MVKH .S1 SL1+0,A4 ; |317|
|| MV .D1X B5,A6 ; |317|
|| MV .L2X A5,B6 ; |317|
|| ZERO .L1 A8 ; |317|
RL5: ; CALL OCCURS ; |317|
STW .D2T1 A4,*+SP(168) ; |317|
.line 95
MVKL .S2 _GIO_create,B5 ; |332|
MVKH .S2 _GIO_create,B5 ; |332|
CALL .S2 B5 ; |332|
MVKL .S2 _EVMDM642_vDisParamsChan,B6 ; |332|
ADDAW .D2 SP,13,B4 ; |332|
MVKH .S2 _EVMDM642_vDisParamsChan,B6 ; |332|
MVKL .S1 SL2+0,A4 ; |332|
ADDKPC .S2 RL6,B3,0 ; |332|
|| MVK .D2 0x2,B4 ; |332|
|| MVKH .S1 SL2+0,A4 ; |332|
|| MV .D1X B4,A6 ; |332|
|| ZERO .L1 A8 ; |332|
RL6: ; CALL OCCURS ; |332|
STW .D2T1 A4,*+SP(172) ; |332|
.line 102
MVKL .S1 _GIO_control,A3 ; |339|
MVKH .S1 _GIO_control,A3 ; |339|
MVKL .S2 0x80000001,B4 ; |339|
CALL .S2X A3 ; |339|
MVKL .S2 _EVMDM642_vDisParamsSAA7105,B5 ; |339|
MVKH .S2 _EVMDM642_vDisParamsSAA7105,B5 ; |339|
MVKH .S2 0x80000001,B4 ; |339|
ADDKPC .S2 RL7,B3,0 ; |339|
MV .D1X B5,A6 ; |339|
RL7: ; CALL OCCURS ; |339|
.line 105
MVKL .S1 _GIO_control,A3 ; |342|
MVKH .S1 _GIO_control,A3 ; |342|
LDW .D2T1 *+SP(168),A4 ; |342|
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