fifo2_clk.cgp

来自「Reed-Solomon 信道编码广泛应用于DVB中」· CGP 代码 · 共 22 行

SET flowvendor = Other
SET vhdlsim = False
SET verilogsim = True
SET workingdirectory = "F:\ServU\zhaojia\RS\code version1\Fifo\ip_fifo\fifo2_clk\tmp"
SET speedgrade = -12
SET simulationfiles = Behavioral
SET asysymbol = False
SET addpads = False
# SET outputdirectory = "F:\ServU\zhaojia\RS\code version1\Fifo\ip_fifo\fifo2_clk\"
SET device = xc4vlx100
# SET projectname = fifo2_clk
SET implementationfiletype = Edif
SET busformat = BusFormatAngleBracketNotRipped
SET foundationsym = False
SET package = ff1513
SET createndf = False
SET designentry = Verilog
SET devicefamily = virtex4
SET formalverification = False
SET removerpms = False