idct_ia64_gcc.s

wince下的xvidcore开发库,可用于MP4等视频播放开发

addreg1 = r14
addreg2 = r15
c0 = f32
c1 = f33
c2 = f34
c3 = f35
c4 = f36
c5 = f37
c6 = f38
c7 = f39
c8 = f40
c9 = f41
c10 = f42
c11 = f43
c12 = f44
c13 = f45
c14 = f46
c15 = f47
.sdata
.align 16
.data_c0:
.single 0.353553390593273730857504233427, 0.353553390593273730857504233427
.data_c1:
.single -2.414213562373094923430016933708, -2.414213562373094923430016933708
.align 16
.data_c2:
.single -0.414213562373095034452319396223, -0.414213562373095034452319396223
.data_c3:
.single 0.198912367379658006072418174881, 0.198912367379658006072418174881
.align 16
.data_c4:
.single 5.027339492125848074977056967327, 5.027339492125848074977056967327
.data_c5:
.single 0.668178637919298878955487452913, 0.668178637919298878955487452913
.align 16
.data_c6:
.single 1.496605762665489169904731170391, 1.496605762665489169904731170391
.data_c7:
.single 0.461939766255643369241568052530, 0.461939766255643369241568052530
.align 16
.data_c8:
.single 0.191341716182544890889616340246, 0.191341716182544890889616340246
.data_c9:
.single 0.847759065022573476966272210120, 0.847759065022573476966272210120
.align 16
.data_c10:
.single 2.847759065022573476966272210120, 2.847759065022573476966272210120
.data_c11:
.single 5.027339492125848074977056967327, 5.027339492125848074977056967327
.align 16
.data_c12:
.single 0.490392640201615215289621119155, 0.490392640201615215289621119155
.data_c13:
.single 0.068974844820735750627882509889, 0.068974844820735750627882509889
.align 16
.data_c14:
.single 0.097545161008064124041894160655, 0.097545161008064124041894160655
.data_c15:
.single 1.000000000000000000000000000000, 1.000000000000000000000000000000

.text
.global idct_ia64
.global idct_ia64_init
.align 16
.proc idct_ia64_init
idct_ia64_init:
br.ret.sptk.few b0
.endp
.align 16
.proc idct_ia64
idct_ia64:

        addreg3 = r20
        addreg4 = r21
        addreg5 = r22
        addreg6 = r23
        
        one = f30
        alloc   r16 = ar.pfs, 1, 71, 0, 0
        addl    addreg1 = @gprel(.data_c0#), gp
        addl    addreg2 = @gprel(.data_c2#), gp
        ;;
        add     addreg3 = 32, addreg1
        add     addreg4 = 32, addreg2
        add     addreg5 = 64, addreg1
        add     addreg6 = 64, addreg2
        ;; 
        ldfp8   c0, c1 = [addreg1]
        ldfp8   c2, c3 = [addreg2]
        ;; 
        ldfp8   c4, c5 = [addreg3], 16
        ldfp8   c6, c7 = [addreg4], 16
        add     addreg1 = 96, addreg1
        add     addreg2 = 96, addreg2
        ;;
        ldfp8   c8, c9 = [addreg5], 16
        ldfp8   c10, c11 = [addreg6], 16
        ;; 
        ldfp8   c12, c13 = [addreg1]
        ldfp8   c14, c15 = [addreg2]
        ;;
        mov     addreg1 = in0
        fpack   one = f1, f1
        add     addreg2 = 2, in0
        ;; 

        ld2  r33 = [addreg1], 4
        ld2  r34 = [addreg2], 4
        ;;
        ld2  r35 = [addreg1], 4
        ld2  r36 = [addreg2], 4
        ;;
        ld2  r37 = [addreg1], 4
        ld2  r38 = [addreg2], 4
        ;;
        ld2  r39 = [addreg1], 4
        ld2  r40 = [addreg2], 4
        ;;
        ld2  r41 = [addreg1], 4
        ld2  r42 = [addreg2], 4
        ;;
        ld2  r43 = [addreg1], 4
        ld2  r44 = [addreg2], 4
        ;;
        ld2  r45 = [addreg1], 4
        ld2  r46 = [addreg2], 4
        ;;
        ld2  r47 = [addreg1], 4
        ld2  r48 = [addreg2], 4
        ;;
        ld2  r49 = [addreg1], 4
        ld2  r50 = [addreg2], 4
        ;;
        ld2  r51 = [addreg1], 4
        ld2  r52 = [addreg2], 4
        ;;
        ld2  r53 = [addreg1], 4
        ld2  r54 = [addreg2], 4
        ;;
        ld2  r55 = [addreg1], 4
        ld2  r56 = [addreg2], 4
        ;;
        ld2  r57 = [addreg1], 4
        ld2  r58 = [addreg2], 4
        ;;
        ld2  r59 = [addreg1], 4
        ld2  r60 = [addreg2], 4
        ;;
        ld2  r61 = [addreg1], 4
        ld2  r62 = [addreg2], 4
        ;;
        ld2  r63 = [addreg1], 4
        ld2  r64 = [addreg2], 4
        ;;
        ld2  r65 = [addreg1], 4
        ld2  r66 = [addreg2], 4
        ;;
        ld2  r67 = [addreg1], 4
        ld2  r68 = [addreg2], 4
        ;;
        ld2  r69 = [addreg1], 4
        ld2  r70 = [addreg2], 4
        ;;
        ld2  r71 = [addreg1], 4
        ld2  r72 = [addreg2], 4
        ;;
        ld2  r73 = [addreg1], 4
        ld2  r74 = [addreg2], 4
        ;;
        ld2  r75 = [addreg1], 4
        ld2  r76 = [addreg2], 4
        ;;
        ld2  r77 = [addreg1], 4
        ld2  r78 = [addreg2], 4
        ;;
        ld2  r79 = [addreg1], 4
        ld2  r80 = [addreg2], 4
        ;;
        ld2  r81 = [addreg1], 4
        ld2  r82 = [addreg2], 4
        ;;
        ld2  r83 = [addreg1], 4
        ld2  r84 = [addreg2], 4
        ;;
        ld2  r85 = [addreg1], 4
        ld2  r86 = [addreg2], 4
        ;;
        ld2  r87 = [addreg1], 4
        ld2  r88 = [addreg2], 4
        ;;
        ld2  r89 = [addreg1], 4
        ld2  r90 = [addreg2], 4
        ;;
        ld2  r91 = [addreg1], 4
        ld2  r92 = [addreg2], 4
        ;;
        ld2  r93 = [addreg1], 4
        ld2  r94 = [addreg2], 4
        ;;
        ld2  r95 = [addreg1], 4
        ld2  r96 = [addreg2], 4
        ;;
        sxt2  r33 = r33
        sxt2  r34 = r34
        sxt2  r35 = r35
        sxt2  r36 = r36
        sxt2  r37 = r37
        sxt2  r38 = r38
        sxt2  r39 = r39
        sxt2  r40 = r40
        sxt2  r41 = r41
        sxt2  r42 = r42
        sxt2  r43 = r43
        sxt2  r44 = r44
        sxt2  r45 = r45
        sxt2  r46 = r46
        sxt2  r47 = r47
        sxt2  r48 = r48
        sxt2  r49 = r49
        sxt2  r50 = r50
        sxt2  r51 = r51
        sxt2  r52 = r52
        sxt2  r53 = r53
        sxt2  r54 = r54
        sxt2  r55 = r55
        sxt2  r56 = r56
        sxt2  r57 = r57
        sxt2  r58 = r58
        sxt2  r59 = r59
        sxt2  r60 = r60
        sxt2  r61 = r61
        sxt2  r62 = r62
        sxt2  r63 = r63
        sxt2  r64 = r64
        sxt2  r65 = r65
        sxt2  r66 = r66
        sxt2  r67 = r67
        sxt2  r68 = r68
        sxt2  r69 = r69
        sxt2  r70 = r70
        sxt2  r71 = r71
        sxt2  r72 = r72
        sxt2  r73 = r73
        sxt2  r74 = r74
        sxt2  r75 = r75
        sxt2  r76 = r76
        sxt2  r77 = r77
        sxt2  r78 = r78
        sxt2  r79 = r79
        sxt2  r80 = r80
        sxt2  r81 = r81
        sxt2  r82 = r82
        sxt2  r83 = r83
        sxt2  r84 = r84
        sxt2  r85 = r85
        sxt2  r86 = r86
        sxt2  r87 = r87
        sxt2  r88 = r88
        sxt2  r89 = r89
        sxt2  r90 = r90
        sxt2  r91 = r91
        sxt2  r92 = r92
        sxt2  r93 = r93
        sxt2  r94 = r94
        sxt2  r95 = r95
        sxt2  r96 = r96
        ;;
        setf.sig  f48 = r33
        setf.sig  f49 = r34
        setf.sig  f50 = r35
        setf.sig  f51 = r36
        setf.sig  f52 = r37
        setf.sig  f53 = r38
        setf.sig  f54 = r39
        setf.sig  f55 = r40
        setf.sig  f56 = r41
        setf.sig  f57 = r42
        setf.sig  f58 = r43
        setf.sig  f59 = r44
        setf.sig  f60 = r45
        setf.sig  f61 = r46
        setf.sig  f62 = r47
        setf.sig  f63 = r48
        setf.sig  f64 = r49
        setf.sig  f65 = r50
        setf.sig  f66 = r51
        setf.sig  f67 = r52
        setf.sig  f68 = r53
        setf.sig  f69 = r54
        setf.sig  f70 = r55
        setf.sig  f71 = r56
        setf.sig  f72 = r57
        setf.sig  f73 = r58
        setf.sig  f74 = r59
        setf.sig  f75 = r60
        setf.sig  f76 = r61
        setf.sig  f77 = r62
        setf.sig  f78 = r63
        setf.sig  f79 = r64
        setf.sig  f80 = r65
        setf.sig  f81 = r66
        setf.sig  f82 = r67
        setf.sig  f83 = r68
        setf.sig  f84 = r69
        setf.sig  f85 = r70
        setf.sig  f86 = r71
        setf.sig  f87 = r72
        setf.sig  f88 = r73
        setf.sig  f89 = r74
        setf.sig  f90 = r75
        setf.sig  f91 = r76
        setf.sig  f92 = r77
        setf.sig  f93 = r78
        setf.sig  f94 = r79
        setf.sig  f95 = r80
        setf.sig  f96 = r81
        setf.sig  f97 = r82
        setf.sig  f98 = r83
        setf.sig  f99 = r84
        setf.sig  f100 = r85
        setf.sig  f101 = r86
        setf.sig  f102 = r87
        setf.sig  f103 = r88
        setf.sig  f104 = r89
        setf.sig  f105 = r90
        setf.sig  f106 = r91
        setf.sig  f107 = r92
        setf.sig  f108 = r93
        setf.sig  f109 = r94
        setf.sig  f110 = r95
        setf.sig  f111 = r96
        ;;
        fcvt.xf  f48 = f48
        fcvt.xf  f49 = f49
        fcvt.xf  f50 = f50
        fcvt.xf  f51 = f51
        fcvt.xf  f52 = f52
        fcvt.xf  f53 = f53
        fcvt.xf  f54 = f54
        fcvt.xf  f55 = f55
        fcvt.xf  f56 = f56
        fcvt.xf  f57 = f57
        fcvt.xf  f58 = f58
        fcvt.xf  f59 = f59
        fcvt.xf  f60 = f60
        fcvt.xf  f61 = f61
        fcvt.xf  f62 = f62
        fcvt.xf  f63 = f63
        fcvt.xf  f64 = f64
        fcvt.xf  f65 = f65
        fcvt.xf  f66 = f66
        fcvt.xf  f67 = f67
        fcvt.xf  f68 = f68
        fcvt.xf  f69 = f69
        fcvt.xf  f70 = f70
        fcvt.xf  f71 = f71
        fcvt.xf  f72 = f72
        fcvt.xf  f73 = f73
        fcvt.xf  f74 = f74
        fcvt.xf  f75 = f75
        fcvt.xf  f76 = f76
        fcvt.xf  f77 = f77
        fcvt.xf  f78 = f78
        fcvt.xf  f79 = f79
        fcvt.xf  f80 = f80
        fcvt.xf  f81 = f81
        fcvt.xf  f82 = f82
        fcvt.xf  f83 = f83
        fcvt.xf  f84 = f84
        fcvt.xf  f85 = f85
        fcvt.xf  f86 = f86
        fcvt.xf  f87 = f87
        fcvt.xf  f88 = f88
        fcvt.xf  f89 = f89
        fcvt.xf  f90 = f90
        fcvt.xf  f91 = f91
        fcvt.xf  f92 = f92
        fcvt.xf  f93 = f93
        fcvt.xf  f94 = f94
        fcvt.xf  f95 = f95
        fcvt.xf  f96 = f96
        fcvt.xf  f97 = f97
        fcvt.xf  f98 = f98
        fcvt.xf  f99 = f99
        fcvt.xf  f100 = f100
        fcvt.xf  f101 = f101
        fcvt.xf  f102 = f102
        fcvt.xf  f103 = f103
        fcvt.xf  f104 = f104
        fcvt.xf  f105 = f105
        fcvt.xf  f106 = f106
        fcvt.xf  f107 = f107
        fcvt.xf  f108 = f108
        fcvt.xf  f109 = f109
        fcvt.xf  f110 = f110
        fcvt.xf  f111 = f111
        ;;
        fpack    f48 = f48, f49
        ;;
        fpack    f49 = f50, f51
        ;;
        fpack    f50 = f52, f53
        ;;
        fpack    f51 = f54, f55
        ;;
        fpack    f52 = f56, f57
        ;;
        fpack    f53 = f58, f59
        ;;
        fpack    f54 = f60, f61
        ;;
        fpack    f55 = f62, f63
        ;;
        fpack    f56 = f64, f65
        ;;
        fpack    f57 = f66, f67
        ;;
        fpack    f58 = f68, f69
        ;;
        fpack    f59 = f70, f71
        ;;
        fpack    f60 = f72, f73
        ;;
        fpack    f61 = f74, f75
        ;;
        fpack    f62 = f76, f77
        ;;
        fpack    f63 = f78, f79
        ;;
        fpack    f64 = f80, f81
        ;;
        fpack    f65 = f82, f83
        ;;
        fpack    f66 = f84, f85
        ;;
        fpack    f67 = f86, f87
        ;;
        fpack    f68 = f88, f89
        ;;
        fpack    f69 = f90, f91
        ;;
        fpack    f70 = f92, f93
        ;;
        fpack    f71 = f94, f95
        ;;
        fpack    f72 = f96, f97
        ;;
        fpack    f73 = f98, f99
        ;;
        fpack    f74 = f100, f101
        ;;
        fpack    f75 = f102, f103
        ;;
        fpack    f76 = f104, f105
        ;;
        fpack    f77 = f106, f107
        ;;
        fpack    f78 = f108, f109
        ;;
        fpack    f79 = f110, f111
        ;;
        fpma    f48 = f48, c0, f0
        fpma    f49 = f49, c0, f0
        fpma    f50 = f50, c0, f0
        fpma    f51 = f51, c0, f0
        ;;

        // before pre shuffle
        //  48 49 50 51 
        //  52 53 54 55 
        //  56 57 58 59 
        //  60 61 62 63 
        //  64 65 66 67 
        //  68 69 70 71 
        //  72 73 74 75 
        //  76 77 78 79 

        // after pre shuffle
        //  48 49 50 51 
        //  64 53 54 55 
        //  56 57 58 59 
        //  72 61 62 63 
        //  52 65 66 67 
        //  76 69 70 71 
        //  60 73 74 75 
        //  68 77 78 79 
        // (f80, f64) = (f48, f64) $ (c0, c0), (line 0, 1)
        fpma    f80 = f64, c0, f48
        fpnma   f64 = f64, c0, f48
        ;;
        // (f48, f72) = (f56, f72) $ (c1, c2), (line 2, 3)
        fpma    f48 = f72, c1, f56
        fpnma   f72 = f72, c2, f56
        ;;
        // (f56, f76) = (f52, f76) $ (c3, c4), (line 4, 5)
        fpma    f56 = f76, c3, f52
        fpnma   f76 = f76, c4, f52
        ;;
        // (f52, f68) = (f60, f68) $ (c5, c6), (line 6, 7)
        fpma    f52 = f68, c5, f60
        fpnma   f68 = f68, c6, f60
        ;;
        ;;
        // (f60, f72) = (f80, f72) $ (c7, c7), (line 0, 3)
        fpma    f60 = f72, c7, f80
        fpnma   f72 = f72, c7, f80
        ;;
        // (f80, f48) = (f64, f48) $ (c8, c8), (line 1, 2)
        fpma    f80 = f48, c8, f64
        fpnma   f48 = f48, c8, f64
        ;;
        // (f64, f52) = (f56, f52) $ (c9, c9), (line 4, 6)
        fpma    f64 = f52, c9, f56
        fpnma   f52 = f52, c9, f56
        ;;
        // (f56, f68) = (f76, f68) $ (c10, c10), (line 5, 7)
        fpma    f56 = f68, c10, f76
        fpnma   f68 = f68, c10, f76
        ;;
        ;;
        // (f76, f52) = (f56, f52) $ (c11, c11), (line 5, 6)
        fpma    f76 = f52, c11, f56